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authorGregory Nutt <gnutt@nuttx.org>2014-01-28 16:39:08 -0600
committerGregory Nutt <gnutt@nuttx.org>2014-01-28 16:39:08 -0600
commit1563cb75e6ef5bcd67f5d17f9c25fa16634fd5bf (patch)
tree83627b57a199e8857846aa71ad02e21df6540933
parentaf40f98f2e251091131cea2058c33bc63228a73a (diff)
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ARMv7-A: Conditionally compile out more unneeded logic when .data and .bss are in SDRAM
-rw-r--r--nuttx/arch/arm/src/armv7-a/arm_head.S13
1 files changed, 2 insertions, 11 deletions
diff --git a/nuttx/arch/arm/src/armv7-a/arm_head.S b/nuttx/arch/arm/src/armv7-a/arm_head.S
index 7209b5ed1..e54770417 100644
--- a/nuttx/arch/arm/src/armv7-a/arm_head.S
+++ b/nuttx/arch/arm/src/armv7-a/arm_head.S
@@ -278,22 +278,13 @@ __start:
add r1, r1, #(1024*1024) /* R1: Increment the physical address */
bne .Lpgtextloop /* Loop while R4 is non-zero */
-#ifdef CONFIG_BOOT_RUNFROMFLASH
+#if defined(CONFIG_BOOT_RUNFROMFLASH) && !defined(CONFIG_BOOT_SDRAM_DATA)
/* If we are executing from FLASH, then we will need additional mappings for
* the primary RAM region that holds the .data, .bss, stack, and heap memory.
*
* Here we expect to have:
* r5 = Address of the base of the L1 table
*
- * REVISIT: We might need this second mapping under certain conditions
- * when executing from RAM too. When the RAM region is larger than 1MB
- * and the page table is in the high end of RAM, then the single mapping
- * above will not be sufficient.
- *
- * REVISIT: If the page table is not located in the primary RAM regions,
- * then we will also need an additional map the page table if the page
- * table resides in internal SRAM.
- *
* Load information needed to map the .text region. After the ldmia, we
* will have:
*
@@ -319,7 +310,7 @@ __start:
add r1, r1, #(1024*1024) /* R1: Increment the physical address */
bne .Lpgramloop /* Loop while R4 is non-zero */
-#endif /* CONFIG_BOOT_RUNFROMFLASH */
+#endif /* CONFIG_BOOT_RUNFROMFLASH && !CONFIG_BOOT_SDRAM_DATA */
#endif /* CONFIG_ARCH_ROMPGTABLE */
/* The following logic will set up the ARMv7-A for normal operation.