diff options
| author | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2013-03-25 17:33:41 +0000 |
|---|---|---|
| committer | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2013-03-25 17:33:41 +0000 |
| commit | 27c3eb5b66089e278ebace37fe2392a190f8edde (patch) | |
| tree | 0b7f8e8de7f36736f82b89b3b40f92bdaa7ed547 | |
| parent | 0f0ce3d8b2dfd3d7a8642c203f249dcd38738592 (diff) | |
| download | nuttx-27c3eb5b66089e278ebace37fe2392a190f8edde.tar.gz nuttx-27c3eb5b66089e278ebace37fe2392a190f8edde.tar.bz2 nuttx-27c3eb5b66089e278ebace37fe2392a190f8edde.zip | |
convert Kwikstik K40 configurations to use kconfig-frontends tools
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5784 42af7a65-404d-4744-a932-0658087f49c3
21 files changed, 1492 insertions, 795 deletions
diff --git a/nuttx/ChangeLog b/nuttx/ChangeLog index 55e9aedaf..bcb8a099e 100644 --- a/nuttx/ChangeLog +++ b/nuttx/ChangeLog @@ -4453,4 +4453,8 @@ LaunchPad now runs NuttX! (2013-03-24). * configs/lm4f120-launchpad/nsh: Add an NSH configuration for the LaunchPad (2013-03-24). + * configs/kwikstik-k40: Converted configurations to use the + konfig-frontends tool (2013-03-25). + * configs/twr-k60n512: Converted configurations to use the + konfig-frontends tool (2013-03-25). diff --git a/nuttx/arch/arm/src/common/up_internal.h b/nuttx/arch/arm/src/common/up_internal.h index 1a7c1e304..5f3f5e63b 100644 --- a/nuttx/arch/arm/src/common/up_internal.h +++ b/nuttx/arch/arm/src/common/up_internal.h @@ -211,7 +211,7 @@ extern uint32_t _ebss; /* End+1 of .bss */ #ifdef CONFIG_ARCH_RAMFUNCS -# define __ramfunc__ __attribute__ ((section(".ramfunc"))) +# define __ramfunc__ __attribute__ ((section(".ramfunc"),long_call)) /* Functions decleared in the .ramfunc section will be packaged together * by the linker script and stored in FLASH. During boot-up, the start diff --git a/nuttx/arch/arm/src/kinetis/Kconfig b/nuttx/arch/arm/src/kinetis/Kconfig index 210683f59..6c1e36425 100644 --- a/nuttx/arch/arm/src/kinetis/Kconfig +++ b/nuttx/arch/arm/src/kinetis/Kconfig @@ -4,3 +4,475 @@ # comment "Kinetis Configuration Options" + +choice + prompt "Kinetis Chip Selection" + default ARCH_CHIP_MK60N512VMD100 + depends on ARCH_CHIP_KINETIS + +config ARCH_CHIP_MK40N512VLQ100 + bool "MK40N512VLQ100" + select ARCH_FAMILY_K40 + +config ARCH_CHIP_MK40N512VMD100 + bool "MK40N512VMD100" + select ARCH_FAMILY_K40 + +config ARCH_CHIP_MK40X128VLQ100 + bool "MK40X128VLQ100" + select ARCH_FAMILY_K40 + +config ARCH_CHIP_MK40X128VMD100 + bool "MK40X128VMD100" + select ARCH_FAMILY_K40 + +config ARCH_CHIP_MK40X256VLQ100 + bool "MK40X256VLQ100" + select ARCH_FAMILY_K40 + +config ARCH_CHIP_MK40X256VMD100 + bool "MK40X256VMD100" + select ARCH_FAMILY_K40 + +config ARCH_CHIP_MK60N256VLQ100 + bool "MK60N256VLQ100" + select ARCH_FAMILY_K60 + +config ARCH_CHIP_MK60N256VMD100 + bool "MK60N256VMD100" + select ARCH_FAMILY_K60 + +config ARCH_CHIP_MK60N512VLQ100 + bool "MK60N512VLQ100" + select ARCH_FAMILY_K60 + +config ARCH_CHIP_MK60N512VMD100 + bool "MK60N512VMD100" + select ARCH_FAMILY_K60 + +config ARCH_CHIP_MK60X256VLQ100 + bool "MK60X256VLQ100" + select ARCH_FAMILY_K60 + +config ARCH_CHIP_MK60X256VMD100 + bool "MK60X256VMD100" + select ARCH_FAMILY_K60 + +endchoice + +# Chip families + +config ARCH_FAMILY_K40 + bool + default n + +config ARCH_FAMILY_K60 + bool + default n + +menu "Kinetis Peripheral Support" + +config KINETIS_TRACE + bool "Trace" + default n + ---help--- + Enable trace clocking on power up. + +config KINETIS_FLEXBUS + bool "FlexBus" + default n + ---help--- + Enable flexbus clocking on power up. + +config KINETIS_UART0 + bool "UART0" + default n + select ARCH_HAVE_UART0 + ---help--- + Support UART0 + +config KINETIS_UART1 + bool "UART1" + default n + select ARCH_HAVE_UART1 + ---help--- + Support UART1 + +config KINETIS_UART2 + bool "UART2" + default n + select ARCH_HAVE_UART2 + ---help--- + Support UART2 + +config KINETIS_UART3 + bool "UART3" + default n + select ARCH_HAVE_UART3 + ---help--- + Support UART3 + +config KINETIS_UART4 + bool "UART4" + default n + select ARCH_HAVE_UART4 + ---help--- + Support UART4 + +config KINETIS_UART5 + bool "UART5" + default n + select ARCH_HAVE_UART5 + ---help--- + Support UART5 + +config KINETIS_ENET + bool "Ethernet" + default n + depends on ARCH_FAMILY_K60 + select NET + ---help--- + Support Ethernet (K60 only) + +config KINETIS_RNGB + bool "Random number generator" + default n + depends on ARCH_FAMILY_K60 + ---help--- + Support the random number generator(K60 only) + +config KINETIS_FLEXCAN0 + bool "FlexCAN0" + default n + ---help--- + Support FlexCAN0 + +config KINETIS_FLEXCAN1 + bool "FlexCAN1" + default n + ---help--- + Support FlexCAN1 + +config KINETIS_SPI0 + bool "SPI0" + default n + ---help--- + Support SPI0 + +config KINETIS_SPI1 + bool "SPI1" + default n + ---help--- + Support SPI1 + +config KINETIS_SPI2 + bool "SPI2" + default n + ---help--- + Support SPI2 + +config KINETIS_I2C0 + bool "I2C0" + default n + ---help--- + Support I2C0 + +config KINETIS_I2C1 + bool "I2C1" + default n + ---help--- + Support I2C1 + +config KINETIS_I2S + bool "I2S" + default n + ---help--- + Support I2S + +config KINETIS_DAC0 + bool "DAC0" + default n + ---help--- + Support DAC0 + +config KINETIS_DAC1 + bool "DAC1" + default n + ---help--- + Support DAC1 + +config KINETIS_ADC0 + bool "ADC0" + default n + ---help--- + Support ADC0 + +config KINETIS_ADC1 + bool "ADC1" + default n + ---help--- + Support ADC1 + +config KINETIS_CMP + bool "CMP" + default n + ---help--- + Support CMP + +config KINETIS_VREF + bool "VREF" + default n + ---help--- + Support VREF + +config KINETIS_SDHC + bool "SDHC" + default n + select MMCSD_SDIO + ---help--- + Support SD host controller + +config KINETIS_FTM0 + bool "FTM0" + default n + ---help--- + Support FlexTimer 0 + +config KINETIS_FTM1 + bool "FTM1" + default n + ---help--- + Support FlexTimer 1 + +config KINETIS_FTM2 + bool "FTM2" + default n + ---help--- + Support FlexTimer 2 + +config KINETIS_LPTIMER + bool "Low power timer (LPTIMER)" + default n + ---help--- + Support the low power timer + +config KINETIS_RTC + bool "RTC" + default n + ---help--- + Support RTC + +config KINETIS_SLCD + bool "Segment LCD (SLCD)" + default n + depends on ARCH_FAMILY_K40 + ---help--- + Support the segment LCD (K40 only) + +config KINETIS_EWM + bool "External watchdog (WVM)" + default n + ---help--- + Support the external watchdog + +config KINETIS_CMT + bool "Carrier modulator transmitter (CMT)" + default n + ---help--- + Support Carrier Modulator Transmitter + +config KINETIS_USBOTG + bool "USB OTG" + default n + ---help--- + Support USB OTG (see also USBHOST and USBDEV) + +config KINETIS_USBDCD + bool "USB device controller" + default n + ---help--- + Support the USB Device Charger Detection module + +config KINETIS_LLWU + bool "Low leakage wake-up unit (LLWU)" + default n + ---help--- + Support the Low Leakage Wake-Up Unit + +config KINETIS_TSI + bool "Touchscreen interface (TSI)" + default n + ---help--- + Support the touch screeen interface + +config KINETIS_FTFL + bool "FLASH (FTFL)" + default n + ---help--- + Support FLASH + +config KINETIS_DMA + bool "DMA" + default n + ---help--- + Support DMA + +config KINETIS_CRC + bool "CRC" + default n + ---help--- + Support CRC + +config KINETIS_PDB + bool "Programmable delay block (PDB)" + default n + ---help--- + Support the Programmable Delay Block + +config KINETIS_PIT + bool "Programmable interval timer (PIT)" + default n + ---help--- + Support Programmable Interval Timers + +endmenu + +comment "Kinetis GPIO Interrupt Configuration" + +config GPIO_IRQ + bool "GPIO interrupts" + ---help--- + Enable support for interrupt GPIO pins + +if GPIO_IRQ + +config KINETIS_PORTAINTS + bool "GPIOA interrupts" + ---help--- + Enable support for interrupts from GPIO port A pins + +config KINETIS_PORTBINTS + bool "GPIOB interrupts" + ---help--- + Enable support for interrupts from GPIO port B pins + +config KINETIS_PORTCINTS + bool "GPIOC interrupts" + ---help--- + Enable support for interrupts from GPIO port C pins + +config KINETIS_PORTDINTS + bool "GPIOD interrupts" + ---help--- + Enable support for interrupts from GPIO port D pins + +config KINETIS_PORTEINTS + bool "GPIOE interrupts" + ---help--- + Enable support for interrupts from GPIO port E pins + +endif + +if KINETIS_ENET + +comment "Kinetis Ethernet Configuration" + +config ENET_ENHANCEDBD + bool "Use enhanced buffer descriptors" + default n + ---help--- + Use enhanced, 32-byte buffer descriptors + +config ENET_NETHIFS + int "Number of Ethernet interfaces" + default 1 + ---help--- + Number of Ethernet interfaces supported by the hardware. Must be + one for now. + +config ENET_NRXBUFFERS + int "Number of Ethernet Rx buffers" + default 6 + ---help--- + Number of Ethernet Rx buffers to use. + +config ENET_NTXBUFFERS + int "Number of Ethernet Tx buffers" + default 2 + ---help--- + Number of Ethernet Tx buffers to use. + +config ENET_PHYADDR + int "PHY address" + default 1 + ---help--- + MII/RMII address of the PHY + +config ENET_USEMII + bool "Use MII interface" + default n + ---help--- + The the MII PHY interface. Default: Use RMII interface + +endif + +if KINETIS_SDHC + +comment "Kinetis SDHC Configuration" + +config KINETIS_SDHC_ABSFREQ + bool "Custom transfer frequencies" + default n + ---help--- + Select SDCLK frequencies corresponding to various modes of operation. + These values may be provided in either the NuttX configuration file + or in the board.h file + + NOTE: These settings are not currently used. Since there are only + four frequencies, it makes more sense to just "can" the fixed + frequency prescaler and divider values. + +if KINETIS_SDHC_ABSFREQ + +config KINETIS_IDMODE_FREQ + int "ID mode frequency" + default 400000 + ---help--- + Initial, ID mode SD frequency + +config KINETIS_MMCXFR_FREQ + int "MMC transfer frequency" + default 20000000 + ---help--- + Frequency to use for transferring data to/from an MMC card + +config KINETIS_SD1BIT_FREQ + int "SD 1-bit transfer frequency" + default 20000000 + depends on CONFIG_SDIO_WIDTH_D1_ONLY + ---help--- + Frequency to use for transferring data to/from an SD card using on a single data liune. + +config KINETIS_SD4BIT_FREQ + int "SD 4-bit transfer frequency" + default 20000000 + depends on !CONFIG_SDIO_WIDTH_D1_ONLY + ---help--- + Frequency to use for transferring data to/from an SD card using all four data lines. + +endif + +config KINETIS_SDHC_DMAPRIO + int "SDHC DMA priority" + depends on SDIO_DMA + ---help--- + SDHC DMA priority + +endif + +comment "Kinetis UART Configuration" + +config KINETIS_UARTFIFOS + bool "Enable UART0 FIFO" + default n + depends on KINETIS_UART0 diff --git a/nuttx/arch/arm/src/kinetis/kinetis_internal.h b/nuttx/arch/arm/src/kinetis/kinetis_internal.h index 8d7baaaf1..79cb542cc 100644 --- a/nuttx/arch/arm/src/kinetis/kinetis_internal.h +++ b/nuttx/arch/arm/src/kinetis/kinetis_internal.h @@ -344,7 +344,8 @@ struct kinetis_dmaregs_s #undef EXTERN #if defined(__cplusplus) #define EXTERN extern "C" -extern "C" { +extern "C" +{ #else #define EXTERN extern #endif @@ -363,7 +364,7 @@ extern "C" { * ************************************************************************************/ -EXTERN void kinetis_clockconfig(void); +void kinetis_clockconfig(void); /************************************************************************************ * Name: kinetis_lowsetup @@ -375,7 +376,7 @@ EXTERN void kinetis_clockconfig(void); * ************************************************************************************/ -EXTERN void kinetis_lowsetup(void); +void kinetis_lowsetup(void); /****************************************************************************** * Name: kinetis_uartreset @@ -386,7 +387,7 @@ EXTERN void kinetis_lowsetup(void); ******************************************************************************/ #ifdef HAVE_UART_DEVICE -EXTERN void kinetis_uartreset(uintptr_t uart_base); +void kinetis_uartreset(uintptr_t uart_base); #endif /****************************************************************************** @@ -398,9 +399,8 @@ EXTERN void kinetis_uartreset(uintptr_t uart_base); ******************************************************************************/ #ifdef HAVE_UART_DEVICE -EXTERN void kinetis_uartconfigure(uintptr_t uart_base, uint32_t baud, - uint32_t clock, unsigned int parity, - unsigned int nbits); +void kinetis_uartconfigure(uintptr_t uart_base, uint32_t baud, uint32_t clock, + unsigned int parity, unsigned int nbits); #endif /************************************************************************************ @@ -411,7 +411,7 @@ EXTERN void kinetis_uartconfigure(uintptr_t uart_base, uint32_t baud, * ************************************************************************************/ -EXTERN void kinetis_wddisable(void); +void kinetis_wddisable(void); /************************************************************************************ * Name: kinetis_pinconfig @@ -421,7 +421,7 @@ EXTERN void kinetis_wddisable(void); * ************************************************************************************/ -EXTERN int kinetis_pinconfig(uint32_t cfgset); +int kinetis_pinconfig(uint32_t cfgset); /************************************************************************************ * Name: kinetis_pinfilter @@ -438,7 +438,7 @@ EXTERN int kinetis_pinconfig(uint32_t cfgset); * ************************************************************************************/ -EXTERN int kinetis_pinfilter(unsigned int port, bool lpo, unsigned int width); +int kinetis_pinfilter(unsigned int port, bool lpo, unsigned int width); /************************************************************************************ * Name: kinetis_gpiowrite @@ -448,7 +448,7 @@ EXTERN int kinetis_pinfilter(unsigned int port, bool lpo, unsigned int width); * ************************************************************************************/ -EXTERN void kinetis_gpiowrite(uint32_t pinset, bool value); +void kinetis_gpiowrite(uint32_t pinset, bool value); /************************************************************************************ * Name: kinetis_gpioread @@ -458,7 +458,7 @@ EXTERN void kinetis_gpiowrite(uint32_t pinset, bool value); * ************************************************************************************/ -EXTERN bool kinetis_gpioread(uint32_t pinset); +bool kinetis_gpioread(uint32_t pinset); /************************************************************************************ * Name: kinetis_pinirqinitialize @@ -469,7 +469,7 @@ EXTERN bool kinetis_gpioread(uint32_t pinset); ************************************************************************************/ #ifdef CONFIG_GPIO_IRQ -EXTERN void kinetis_pinirqinitialize(void); +void kinetis_pinirqinitialize(void); #else # define kinetis_pinirqinitialize() #endif @@ -496,7 +496,7 @@ EXTERN void kinetis_pinirqinitialize(void); * ************************************************************************************/ -EXTERN xcpt_t kinetis_pinirqattach(uint32_t pinset, xcpt_t pinisr); +xcpt_t kinetis_pinirqattach(uint32_t pinset, xcpt_t pinisr); /************************************************************************************ * Name: kinetis_pinirqenable @@ -507,7 +507,7 @@ EXTERN xcpt_t kinetis_pinirqattach(uint32_t pinset, xcpt_t pinisr); ************************************************************************************/ #ifdef CONFIG_GPIO_IRQ -EXTERN void kinetis_pinirqenable(uint32_t pinset); +void kinetis_pinirqenable(uint32_t pinset); #else # define kinetis_pinirqenable(pinset) #endif @@ -521,7 +521,7 @@ EXTERN void kinetis_pinirqenable(uint32_t pinset); ************************************************************************************/ #ifdef CONFIG_GPIO_IRQ -EXTERN void kinetis_pinirqdisable(uint32_t pinset); +void kinetis_pinirqdisable(uint32_t pinset); #else # define kinetis_pinirqdisable(pinset) #endif @@ -535,7 +535,7 @@ EXTERN void kinetis_pinirqdisable(uint32_t pinset); ************************************************************************************/ #ifdef CONFIG_KINETIS_DMA -EXTERN void kinetis_pindmaenable(uint32_t pinset); +void kinetis_pindmaenable(uint32_t pinset); #endif /************************************************************************************ @@ -547,7 +547,7 @@ EXTERN void kinetis_pindmaenable(uint32_t pinset); ************************************************************************************/ #ifdef CONFIG_KINETIS_DMA -EXTERN void kinetis_pindmadisable(uint32_t pinset); +void kinetis_pindmadisable(uint32_t pinset); #endif /************************************************************************************ @@ -559,7 +559,7 @@ EXTERN void kinetis_pindmadisable(uint32_t pinset); ************************************************************************************/ #ifdef CONFIG_DEBUG_GPIO -EXTERN int kinetis_pindump(uint32_t pinset, const char *msg); +int kinetis_pindump(uint32_t pinset, const char *msg); #else # define kinetis_pindump(p,m) #endif @@ -573,11 +573,10 @@ EXTERN int kinetis_pindump(uint32_t pinset, const char *msg); * ************************************************************************************/ -EXTERN void kinetis_clrpend(int irq); +void kinetis_clrpend(int irq); /************************************************************************************ - * Name: kinetis_spi/ssp0/ssp1select, kinetis_spi/ssp0/ssp1status, and - * kinetis_spi/ssp0/ssp1cmddata + * Name: kinetis_spi[n]select, kinetis_spi[n]status, and kinetis_spi[n]cmddata * * Description: * These external functions must be provided by board-specific logic. They are @@ -586,13 +585,13 @@ EXTERN void kinetis_clrpend(int irq); * including up_spiinitialize()) are provided by common Kinetis logic. To use * this common SPI logic on your board: * - * 1. Provide logic in kinetis_boardinitialize() to configure SPI/SSP chip select + * 1. Provide logic in kinetis_boardinitialize() to configure SPI chip select * pins. - * 2. Provide kinetis_spi/ssp0/ssp1select() and kinetis_spi/ssp0/ssp1status() functions + * 2. Provide kinetis_spi[n]select() and kinetis_spi[n]status() functions * in your board-specific logic. These functions will perform chip selection * and status operations using GPIOs in the way your board is configured. * 2. If CONFIG_SPI_CMDDATA is defined in the NuttX configuration, provide - * kinetis_spi/ssp0/ssp1cmddata() functions in your board-specific logic. These + * kinetis_spi[n]cmddata() functions in your board-specific logic. These * functions will perform cmd/data selection operations using GPIOs in the way * your board is configured. * 3. Add a call to up_spiinitialize() in your low level application @@ -607,25 +606,25 @@ EXTERN void kinetis_clrpend(int irq); struct spi_dev_s; enum spi_dev_e; -#ifdef CONFIG_KINETIS_SPI -EXTERN void kinetis_spiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected); -EXTERN uint8_t kinetis_spistatus(FAR struct spi_dev_s *dev, enum spi_dev_e devid); +#ifdef CONFIG_KINETIS_SPI0 +void kinetis_spi0select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected); +uint8_t kinetis_spi0status(FAR struct spi_dev_s *dev, enum spi_dev_e devid); #ifdef CONFIG_SPI_CMDDATA -EXTERN int kinetis_spicmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd); +int kinetis_spi0cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd); #endif #endif -#ifdef CONFIG_KINETIS_SSP0 -EXTERN void kinetis_ssp0select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected); -EXTERN uint8_t kinetis_ssp0status(FAR struct spi_dev_s *dev, enum spi_dev_e devid); +#ifdef CONFIG_KINETIS_SPI1 +void kinetis_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected); +uint8_t kinetis_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid); #ifdef CONFIG_SPI_CMDDATA -EXTERN int kinetis_ssp0cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd); +int kinetis_spi1cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd); #endif #endif -#ifdef CONFIG_KINETIS_SSP1 -EXTERN void kinetis_ssp1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected); -EXTERN uint8_t kinetis_ssp1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid); +#ifdef CONFIG_KINETIS_SPI2 +void kinetis_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected); +uint8_t kinetis_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid); #ifdef CONFIG_SPI_CMDDATA -EXTERN int kinetis_ssp1cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd); +int kinetis_spi2cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd); #endif #endif @@ -634,7 +633,7 @@ EXTERN int kinetis_ssp1cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, * * Description: * Flush and discard any words left in the RX fifo. This can be called - * from ssp0/1select after a device is deselected (if you worry about such + * from spi[n]select after a device is deselected (if you worry about such * things). * * Input Parameters: @@ -645,12 +644,9 @@ EXTERN int kinetis_ssp1cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, * ****************************************************************************/ +#if defined(CONFIG_KINETIS_SPI0) || defined(CONFIG_KINETIS_SPI0) || defined(CONFIG_KINETIS_SPI2) struct spi_dev_s; -#ifdef CONFIG_KINETIS_SPI -EXTERN void spi_flush(FAR struct spi_dev_s *dev); -#endif -#if defined(CONFIG_KINETIS_SSP0) || defined(CONFIG_KINETIS_SSP1) -EXTERN void ssp_flush(FAR struct spi_dev_s *dev); +void spi_flush(FAR struct spi_dev_s *dev); #endif /**************************************************************************** @@ -664,8 +660,8 @@ EXTERN void ssp_flush(FAR struct spi_dev_s *dev); * ****************************************************************************/ -#ifdef CONFIG_KINETIS_GPDMA -EXTERN void kinetis_dmainitilaize(void); +#ifdef CONFIG_KINETIS_DMA +void kinetis_dmainitilaize(void); #endif /**************************************************************************** @@ -682,8 +678,8 @@ EXTERN void kinetis_dmainitilaize(void); * ****************************************************************************/ -#ifdef CONFIG_KINETIS_GPDMA -EXTERN DMA_HANDLE kinetis_dmachannel(void); +#ifdef CONFIG_KINETIS_DMA +DMA_HANDLE kinetis_dmachannel(void); #endif /**************************************************************************** @@ -699,8 +695,8 @@ EXTERN DMA_HANDLE kinetis_dmachannel(void); * ****************************************************************************/ -#ifdef CONFIG_KINETIS_GPDMA -EXTERN void kinetis_dmafree(DMA_HANDLE handle); +#ifdef CONFIG_KINETIS_DMA +void kinetis_dmafree(DMA_HANDLE handle); #endif /**************************************************************************** @@ -711,11 +707,9 @@ EXTERN void kinetis_dmafree(DMA_HANDLE handle); * ****************************************************************************/ -#ifdef CONFIG_KINETIS_GPDMA -EXTERN int kinetis_dmarxsetup(DMA_HANDLE handle, - uint32_t control, uint32_t config, - uint32_t srcaddr, uint32_t destaddr, - size_t nbytes); +#ifdef CONFIG_KINETIS_DMA +int kinetis_dmarxsetup(DMA_HANDLE handle, uint32_t control, uint32_t config, + uint32_t srcaddr, uint32_t destaddr, size_t nbytes); #endif /**************************************************************************** @@ -726,8 +720,8 @@ EXTERN int kinetis_dmarxsetup(DMA_HANDLE handle, * ****************************************************************************/ -#ifdef CONFIG_KINETIS_GPDMA -EXTERN int kinetis_dmastart(DMA_HANDLE handle, dma_callback_t callback, void *arg); +#ifdef CONFIG_KINETIS_DMA +int kinetis_dmastart(DMA_HANDLE handle, dma_callback_t callback, void *arg); #endif /**************************************************************************** @@ -740,8 +734,8 @@ EXTERN int kinetis_dmastart(DMA_HANDLE handle, dma_callback_t callback, void *ar * ****************************************************************************/ -#ifdef CONFIG_KINETIS_GPDMA -EXTERN void kinetis_dmastop(DMA_HANDLE handle); +#ifdef CONFIG_KINETIS_DMA +void kinetis_dmastop(DMA_HANDLE handle); #endif /**************************************************************************** @@ -752,9 +746,9 @@ EXTERN void kinetis_dmastop(DMA_HANDLE handle); * ****************************************************************************/ -#ifdef CONFIG_KINETIS_GPDMA +#ifdef CONFIG_KINETIS_DMA #ifdef CONFIG_DEBUG_DMA -EXTERN void kinetis_dmasample(DMA_HANDLE handle, struct kinetis_dmaregs_s *regs); +void kinetis_dmasample(DMA_HANDLE handle, struct kinetis_dmaregs_s *regs); #else # define kinetis_dmasample(handle,regs) #endif @@ -768,10 +762,10 @@ EXTERN void kinetis_dmasample(DMA_HANDLE handle, struct kinetis_dmaregs_s *regs) * ****************************************************************************/ -#ifdef CONFIG_KINETIS_GPDMA +#ifdef CONFIG_KINETIS_DMA #ifdef CONFIG_DEBUG_DMA -EXTERN void kinetis_dmadump(DMA_HANDLE handle, const struct kinetis_dmaregs_s *regs, - const char *msg); +void kinetis_dmadump(DMA_HANDLE handle, const struct kinetis_dmaregs_s *regs, + const char *msg); #else # define kinetis_dmadump(handle,regs,msg) #endif @@ -793,7 +787,7 @@ EXTERN void kinetis_dmadump(DMA_HANDLE handle, const struct kinetis_dmaregs_s *r #ifdef CONFIG_KINETIS_SDHC struct sdio_dev_s; -EXTERN FAR struct sdio_dev_s *sdhc_initialize(int slotno); +FAR struct sdio_dev_s *sdhc_initialize(int slotno); #endif /**************************************************************************** @@ -816,7 +810,7 @@ EXTERN FAR struct sdio_dev_s *sdhc_initialize(int slotno); ****************************************************************************/ #ifdef CONFIG_KINETIS_SDHC -EXTERN void sdhc_mediachange(FAR struct sdio_dev_s *dev, bool cardinslot); +void sdhc_mediachange(FAR struct sdio_dev_s *dev, bool cardinslot); #endif /**************************************************************************** @@ -836,7 +830,7 @@ EXTERN void sdhc_mediachange(FAR struct sdio_dev_s *dev, bool cardinslot); ****************************************************************************/ #ifdef CONFIG_KINETIS_SDHC -EXTERN void sdhc_wrprotect(FAR struct sdio_dev_s *dev, bool wrprotect); +void sdhc_wrprotect(FAR struct sdio_dev_s *dev, bool wrprotect); #endif #undef EXTERN #if defined(__cplusplus) diff --git a/nuttx/arch/arm/src/lm/Kconfig b/nuttx/arch/arm/src/lm/Kconfig index b2786c265..676773d69 100644 --- a/nuttx/arch/arm/src/lm/Kconfig +++ b/nuttx/arch/arm/src/lm/Kconfig @@ -73,6 +73,41 @@ config LM_UART1 select ARCH_HAVE_UART1 default n +config LM_UART2 + bool "UART2" + select ARCH_HAVE_UART2 + default n + +config LM_UART3 + bool "UART3" + default n + depends on ARCH_CHIP_LM4F + select ARCH_HAVE_UART3 + +config LM_UART4 + bool "UART4" + default n + depends on ARCH_CHIP_LM4F + select ARCH_HAVE_UART4 + +config LM_UART5 + bool "UART5" + default n + depends on ARCH_CHIP_LM4F + select ARCH_HAVE_UART5 + +config LM_UART6 + bool "UART6" + default n + depends on ARCH_CHIP_LM4F + select ARCH_HAVE_UART6 + +config LM_UART7 + bool "UART7" + default n + depends on ARCH_CHIP_LM4F + select ARCH_HAVE_UART7 + config SSI0_DISABLE bool "Disable SSI0" default y @@ -81,11 +116,6 @@ config SSI1_DISABLE bool "Disable SSI1" default y -config LM_UART2 - bool "UART2" - select ARCH_HAVE_UART2 - default n - config LM_ETHERNET bool "Stellaris Ethernet" default n diff --git a/nuttx/arch/arm/src/lpc17xx/chip/lpc17_lcd.h b/nuttx/arch/arm/src/lpc17xx/chip/lpc17_lcd.h index 065dee9b5..0485db388 100644 --- a/nuttx/arch/arm/src/lpc17xx/chip/lpc17_lcd.h +++ b/nuttx/arch/arm/src/lpc17xx/chip/lpc17_lcd.h @@ -49,7 +49,7 @@ * Pre-processor Definitions ************************************************************************************************/ -/* Register offsets *****************************************************************/ +/* Register offsets *****************************************************************************/ #define LPC17_LCD_TIMH_OFFSET (0x0000) /* Horizontal Timing Control register */ #define LPC17_LCD_TIMV_OFFSET (0x0004) /* Vertical Timing Control register */ @@ -64,15 +64,14 @@ #define LPC17_LCD_INTCLR_OFFSET (0x0028) /* Interrupt Clear register */ #define LPC17_LCD_UPCURR_OFFSET (0x002c) /* Upper Panel Current Address Value register */ #define LPC17_LCD_LPCURR_OFFSET (0x0030) /* Lower Panel Current Address Value register */ -#define LPC17_LCD_PAL0_OFFSET (0x0200) /* 256x16bit Color Palette registers */ -#define LPC17_LCD_PAL1_OFFSET (0x0200) /* */ -*** -#define LPC17_LCD_PAL127_OFFSET (0x03fc) /* */ -#define LPC17_LCD_CRSR_IMG0_OFFSET (0x0800) /* Cursor Image registers */ -#define LPC17_LCD_CRSR_IMG1_OFFSET (0x0800) /* Cursor Image registers */ -*** -#define LPC17_LCD_CRSR_IMG255_OFFSET (0x0bfc) /* Cursor Image registers */ +/* 256x16-bit Color Palette registers, n=0-127 */ + +#define LPC17_LCD_PAL_OFFSET(n) (0x0200 + ((n) << 2)) + +/* Cursor Image registers, n=0-255 */ + +#define LPC17_LCD_CRSR_IMG_OFFSET(n) (0x0800 + ((n) << 2)) #define LPC17_LCD_CRSR_CRTL_OFFSET (0x0c00) /* Cursor Control register */ #define LPC17_LCD_CRSR_CFG_OFFSET (0x0c04) /* Cursor Configuration register */ @@ -85,29 +84,24 @@ #define LPC17_LCD_CRSR_INTRAW_OFFSET (0x0c28) /* Cursor Raw Interrupt Status register */ #define LPC17_LCD_CRSR_INTSTAT_OFFSET (0x0c2c) /* Cursor Masked Interrupt Status register */ -/* Register Addresses */ +/* Register Addresses ***************************************************************************/ #define LPC17_LCD_TIMH (LPC17_LCD_BASE+LPC17_LCD_TIMH_OFFSET) #define LPC17_LCD_TIMV (LPC17_LCD_BASE+LPC17_LCD_TIMV_OFFSET) #define LPC17_LCD_POL (LPC17_LCD_BASE+LPC17_LCD_POL_OFFSET) -#define LPC17_LCD_LE_OFFSET (LPC17_LCD_BASE+LPC17_LCD_LE_OFFSET) -#define LPC17_LCD_UPBASE_OFFSET (LPC17_LCD_BASE+LPC17_LCD_UPBASE_OFFSET) -#define LPC17_LCD_LPBASE_OFFSET (LPC17_LCD_BASE+LPC17_LCD_LPBASE_OFFSET) -#define LPC17_LCD_CTRL_OFFSET (LPC17_LCD_BASE+LPC17_LCD_CTRL_OFFSET) -#define LPC17_LCD_INTMSK_OFFSET (LPC17_LCD_BASE+LPC17_LCD_INTMSK_OFFSET) -#define LPC17_LCD_INTRAW_OFFSET (LPC17_LCD_BASE+LPC17_LCD_INTRAW_OFFSET) -#define LPC17_LCD_INTSTAT_OFFSET (LPC17_LCD_BASE+LPC17_LCD_INTSTAT_OFFSET) -#define LPC17_LCD_INTCLR_OFFSET (LPC17_LCD_BASE+ LPC17_LCD_INTCLR_OFFSET) -#define LPC17_LCD_UPCURR_OFFSET (LPC17_LCD_BASE+LPC17_LCD_UPCURR_OFFSET) -#define LPC17_LCD_LPCURR_OFFSET (LPC17_LCD_BASE+LPC17_LCD_LPCURR_OFFSET) -*** -#define LPC17_LCD_PAL0_OFFSET (LPC17_LCD_BASE+LPC17_LCD_PAL0_OFFSET) -#define LPC17_LCD_PAL1_OFFSET (LPC17_LCD_BASE+LPC17_LCD_PAL1_OFFSET) -#define LPC17_LCD_PAL127_OFFSET (LPC17_LCD_BASE+LPC17_LCD_PAL127_OFFSET) -*** -#define LPC17_LCD_CRSR_IMG0 (LPC17_LCD_BASE+LPC17_LCD_CRSR_IMG0_OFFSET) -#define LPC17_LCD_CRSR_IMG1 (LPC17_LCD_BASE+LPC17_LCD_CRSR_IMG1_OFFSET) -#define LPC17_LCD_CRSR_IMG255 (LPC17_LCD_BASE+LPC17_LCD_CRSR_IMG255_OFFSET) +#define LPC17_LCD_LE (LPC17_LCD_BASE+LPC17_LCD_LE_OFFSET) +#define LPC17_LCD_UPBASE (LPC17_LCD_BASE+LPC17_LCD_UPBASE_OFFSET) +#define LPC17_LCD_LPBASE (LPC17_LCD_BASE+LPC17_LCD_LPBASE_OFFSET) +#define LPC17_LCD_CTRL (LPC17_LCD_BASE+LPC17_LCD_CTRL_OFFSET) +#define LPC17_LCD_INTMSK (LPC17_LCD_BASE+LPC17_LCD_INTMSK_OFFSET) +#define LPC17_LCD_INTRAW (LPC17_LCD_BASE+LPC17_LCD_INTRAW_OFFSET) +#define LPC17_LCD_INTSTAT (LPC17_LCD_BASE+LPC17_LCD_INTSTAT_OFFSET) +#define LPC17_LCD_INTCLR (LPC17_LCD_BASE+ LPC17_LCD_INTCLR_OFFSET) +#define LPC17_LCD_UPCURR (LPC17_LCD_BASE+LPC17_LCD_UPCURR_OFFSET) +#define LPC17_LCD_LPCURR (LPC17_LCD_BASE+LPC17_LCD_LPCURR_OFFSET) + +#define LPC17_LCD_PAL(n) (LPC17_LCD_BASE+LPC17_LCD_PAL_OFFSET(n)) +#define LPC17_LCD_CRSR_IMG(n) (LPC17_LCD_BASE+LPC17_LCD_CRSR_IMG_OFFSET(n)) #define LPC17_LCD_CRSR_CRTL (LPC17_LCD_BASE+LPC17_LCD_CRSR_CRTL_OFFSET) #define LPC17_LCD_CRSR_CFG (LPC17_LCD_BASE+LPC17_LCD_CRSR_CFG_OFFSET) @@ -120,10 +114,9 @@ #define LPC17_LCD_CRSR_INTRAW (LPC17_LCD_BASE+LPC17_LCD_CRSR_INTRAW_OFFSET) #define LPC17_LCD_CRSR_INTSTAT (LPC17_LCD_BASE+LPC17_LCD_CRSR_INTSTAT_OFFSET) -/* Register Bitfield Definitions */ +/* Register Bitfield Definitions ****************************************************************/ /* LCD_TIMH - Horizontal Timing Register */ - /* Bits 0-1: Reserved */ #define LCD_TIMH_PPL_SHIFT (2) /* Bits 2-7: Pixels Per Line - 16-1024ppl */ #define LCD_TIMH_PPL_MASK (0x3f << LCD_TIMH_PPL_SHIFT) @@ -177,7 +170,6 @@ #define LCD_LE_LEE_SHIFT (16) /* Bit16: LCD line end enable */ #define LCD_LE_LEE_MASK (1 << LCD_LE_LEE_SHIFT) /* Bit 17-31: Reserved */ - /* LCD_UPBASE - Upper Panel Frame Base Address Register */ /* Bits 0-2: Reserved */ #define LCD_UPBASE_LCDUPBASE_SHIFT (3) /* Bits 3-31: LCD upper panel base address */ @@ -216,7 +208,6 @@ #define LCD_CTRL_WATERMARK_SHIFT (16) /* Bit 16: LCD DMA FIFO watermark level */ #define LCD_CTRL_WATERMARK_MASK (1 << LCD_CTRL_WATERMARK_SHIFT) /* Bits 17-31: Reserved */ - /* LCD_INTMSK - Interrupt Mask Register */ /* Bits 0: Reserved */ #define LCD_INTMSK_FUFIM_SHIFT (1) /* Bit 1: FIFO underflow interrupt enable */ @@ -228,7 +219,6 @@ #define LCD_INTMSK_BERIM_SHIFT (4) /* Bit 4: AHB Master error interrupt enable */ #define LCD_INTMSK_BERIM_MASK (1 << LCD_INTMSK_BERIM_SHIFT) /* Bits 5-31: Reserved */ - /* LCD_INTRAW - Raw Interrupt Status Register */ /* Bits 0: Reserved */ #define LCD_INTRAW_FUFRIS_SHIFT (1) /* Bit 1: FIFO Undeflow raw interrupt status */ @@ -240,7 +230,6 @@ #define LCD_INTRAW_BERRAW_SHIFT (4) /* Bit 4: AHB Master bus error interrupt status */ #define LCD_INTRAW_BERRAW_MASK (1 << LCD_INTRAW_BERRAW_SHIFT) /* Bits 5-31: Reserved */ - /* LCD_INTSTAT - Masked Interrupt Status Register */ /* Bits 0: Reserved */ #define LCD_INTSTAT_FUFMIS_SHIFT (1) /* Bit 1: FIFO Undeflow raw interrupt status */ @@ -265,7 +254,7 @@ /* Bits 15-31: Reserved */ /* Upper and Lower Panel Address register has no bitfields */ - /* +/* * Upper Panel Current Address register (LCDUPCURR) * Lower Panel Current Address register (LCDLPCURR) */ @@ -339,7 +328,6 @@ #define LCD_CRSR_PAL1_BLUE_SHIFT (16) /* Bits 16-23: Blue color component */ #define LCD_CRSR_PAL1_BLUE_MASK (0xff << LCD_CRSR_PAL1_BLUE_SHIFT) /* Bit 24-31: Reserved */ - /* LCD CRSR_XY - Cursor XY Position Register */ #define LCD_CRSR_CRSRX_SHIFT (0) /* Bits 0-9: X ordinate */ @@ -348,7 +336,6 @@ #define LCD_CRSR_CRSRY_SHIFT (16) /* Bits 16-25: Y ordinate */ #define LCD_CRSR_CRSRY_MASK (0x3ff << LCD_CRSR_CRSRY_SHIFT) /* Bit 26-31: Reserved */ - /* LCD CRSR_CLIP - Cursor Clip Position Register */ #define LCD_CRSR_CRSRCLIPX_SHIFT (0) /* Bits 0-5: X clip position */ @@ -357,13 +344,11 @@ #define LCD_CRSR_CRSRCLIPY_SHIFT (8) /* Bits 8-13: Reserved */ #define LCD_CRSR_CRSRCLIPY_MASK (0x3f << LCD_CRSR_CRSRCLIPY_SHIFT) /* Bit 14-31: Reserved */ - /* LCD CRSR_INTMSK - Cursor Interrrupt Mask Register */ #define LCD_CRSR_INTMSK_CRSRIM_SHIFT (0) /* Bit 0: Cursor interrupt mask */ #define LCD_CRSR_INTMSK_CRSRIM_MASK (1 << LCD_CRSR_INTMSK_CRSRIM_SHIFT) /* Bit 1-31: Reserved */ - /* LCD CRSR_INTCLR - Cursor Interrrupt Clear Register */ #define LCD_CRSR_INTCLR_CRSRIC_SHIFT (0) /* Bit 0: Cursor interrupt clear */ @@ -375,7 +360,6 @@ #define LCD_CRSR_INTRAW_CRSRRIS_SHIFT (0) /* Bit 0: Cursor raw interrupt status */ #define LCD_CRSR_INTRAW_CRSRRIS_MASK (1 << LCD_CRSR_INTRAW_CRSRRIS_SHIFT) /* Bit 1-31: Reserved */ - /* LCD CRSR_INTSTAT - Mask Interrrupt Status Register */ #define LCD_CRSR_INTSTAT_CRSRMIS_SHIFT (0) /* Bit 0: Cursor mask interrupt status */ diff --git a/nuttx/arch/arm/src/lpc17xx/chip/lpc17_pwm.h b/nuttx/arch/arm/src/lpc17xx/chip/lpc17_pwm.h index 8a7931104..49440a682 100644 --- a/nuttx/arch/arm/src/lpc17xx/chip/lpc17_pwm.h +++ b/nuttx/arch/arm/src/lpc17xx/chip/lpc17_pwm.h @@ -1,7 +1,7 @@ /************************************************************************************ * arch/arm/src/lpc17xx/chip/lpc17_pwm.h * - * Copyright (C) 2010, 2013 Gregory Nutt. All rights reserved. + * Copyright (C) 2010 Gregory Nutt. All rights reserved. * Author: Gregory Nutt <gnutt@nuttx.org> * * Redistribution and use in source and binary forms, with or without @@ -41,13 +41,173 @@ ************************************************************************************/ #include <nuttx/config.h> -#include "chip/lpc17_pwm.h" -#include "chip/lpc17_mcpwm.h" + +#include "chip.h" +#include "chip/lpc17_memorymap.h" /************************************************************************************ * Pre-processor Definitions ************************************************************************************/ +/* Register offsets *****************************************************************/ + +#define LPC17_PWM_IR_OFFSET 0x0000 /* Interrupt Register */ +#define LPC17_PWM_TCR_OFFSET 0x0004 /* Timer Control Register */ +#define LPC17_PWM_TC_OFFSET 0x0008 /* Timer Counter */ +#define LPC17_PWM_PR_OFFSET 0x000c /* Prescale Register */ +#define LPC17_PWM_PC_OFFSET 0x0010 /* Prescale Counter */ +#define LPC17_PWM_MCR_OFFSET 0x0014 /* Match Control Register */ +#define LPC17_PWM_MR0_OFFSET 0x0018 /* Match Register 0 */ +#define LPC17_PWM_MR1_OFFSET 0x001c /* Match Register 1 */ +#define LPC17_PWM_MR2_OFFSET 0x0020 /* Match Register 2 */ +#define LPC17_PWM_MR3_OFFSET 0x0024 /* Match Register 3 */ +#define LPC17_PWM_CCR_OFFSET 0x0028 /* Capture Control Register */ +#define LPC17_PWM_CR0_OFFSET 0x002c /* Capture Register 0 */ +#define LPC17_PWM_CR1_OFFSET 0x0030 /* Capture Register 1 */ +#define LPC17_PWM_CR2_OFFSET 0x0034 /* Capture Register 2 */ +#define LPC17_PWM_CR3_OFFSET 0x0038 /* Capture Register 3 */ +#define LPC17_PWM_MR4_OFFSET 0x0040 /* Match Register 4 */ +#define LPC17_PWM_MR5_OFFSET 0x0044 /* Match Register 5 */ +#define LPC17_PWM_MR6_OFFSET 0x0048 /* Match Register 6 */ +#define LPC17_PWM_PCR_OFFSET 0x004c /* PWM Control Register */ +#define LPC17_PWM_LER_OFFSET 0x0050 /* Load Enable Register */ +#define LPC17_PWM_CTCR_OFFSET 0x0070 /* Counter/Timer Control Register */ + +/* Register addresses ***************************************************************/ + +#define LPC17_PWM1_IR (LPC17_PWM1_BASE+LPC17_PWM_IR_OFFSET) +#define LPC17_PWM1_TCR (LPC17_PWM1_BASE+LPC17_PWM_TCR_OFFSET) +#define LPC17_PWM1_TC (LPC17_PWM1_BASE+LPC17_PWM_TC_OFFSET) +#define LPC17_PWM1_PR (LPC17_PWM1_BASE+LPC17_PWM_PR_OFFSET) +#define LPC17_PWM1_PC (LPC17_PWM1_BASE+LPC17_PWM_PC_OFFSET) +#define LPC17_PWM1_MCR (LPC17_PWM1_BASE+LPC17_PWM_MCR_OFFSET) +#define LPC17_PWM1_MR0 (LPC17_PWM1_BASE+LPC17_PWM_MR0_OFFSET) +#define LPC17_PWM1_MR1 (LPC17_PWM1_BASE+LPC17_PWM_MR1_OFFSET) +#define LPC17_PWM1_MR2 (LPC17_PWM1_BASE+LPC17_PWM_MR2_OFFSET) +#define LPC17_PWM1_MR3 (LPC17_PWM1_BASE+LPC17_PWM_MR3_OFFSET) +#define LPC17_PWM1_MR4 (LPC17_PWM1_BASE+LPC17_PWM_MR4_OFFSET) +#define LPC17_PWM1_MR5 (LPC17_PWM1_BASE+LPC17_PWM_MR5_OFFSET) +#define LPC17_PWM1_MR6 (LPC17_PWM1_BASE+LPC17_PWM_MR6_OFFSET) +#define LPC17_PWM1_CCR (LPC17_PWM1_BASE+LPC17_PWM_CCR_OFFSET) +#define LPC17_PWM1_CR0 (LPC17_PWM1_BASE+LPC17_PWM_CR0_OFFSET) +#define LPC17_PWM1_CR1 (LPC17_PWM1_BASE+LPC17_PWM_CR1_OFFSET) +#define LPC17_PWM1_CR2 (LPC17_PWM1_BASE+LPC17_PWM_CR2_OFFSET) +#define LPC17_PWM1_CR3 (LPC17_PWM1_BASE+LPC17_PWM_CR3_OFFSET) +#define LPC17_PWM1_PCR (LPC17_PWM1_BASE+LPC17_PWM_PCR_OFFSET) +#define LPC17_PWM1_LER (LPC17_PWM1_BASE+LPC17_PWM_LER_OFFSET) +#define LPC17_PWM1_CTCR (LPC17_PWM1_BASE+LPC17_PWM_CTCR_OFFSET) + +/* Register bit definitions *********************************************************/ +/* Registers holding 32-bit numeric values (no bit field definitions): + * + * Timer Counter (TC) + * Prescale Register (PR) + * Prescale Counter (PC) + * Match Register 0 (MR0) + * Match Register 1 (MR1) + * Match Register 2 (MR2) + * Match Register 3 (MR3) + * Match Register 4 (MR3) + * Match Register 5 (MR3) + * Match Register 6 (MR3) + * Capture Register 0 (CR0) + * Capture Register 1 (CR1) + * Capture Register 1 (CR2) + * Capture Register 1 (CR3) + */ + +/* Interrupt Register */ + +#define PWM_IR_MR0 (1 << 0) /* Bit 0: PWM match channel 0 interrrupt */ +#define PWM_IR_MR1 (1 << 1) /* Bit 1: PWM match channel 1 interrrupt */ +#define PWM_IR_MR2 (1 << 2) /* Bit 2: PWM match channel 2 interrrupt */ +#define PWM_IR_MR3 (1 << 3) /* Bit 3: PWM match channel 3 interrrupt */ +#define PWM_IR_CAP0 (1 << 4) /* Bit 4: Capture input 0 interrrupt */ +#define PWM_IR_CAP1 (1 << 5) /* Bit 5: Capture input 1 interrrupt */ + /* Bits 6-7: Reserved */ +#define PWM_IR_MR4 (1 << 8) /* Bit 8: PWM match channel 4 interrrupt */ +#define PWM_IR_MR5 (1 << 9) /* Bit 9: PWM match channel 5 interrrupt */ +#define PWM_IR_MR6 (1 << 10) /* Bit 10: PWM match channel 6 interrrupt */ + /* Bits 11-31: Reserved */ +/* Timer Control Register */ + +#define PWM_TCR_CNTREN (1 << 0) /* Bit 0: Counter Enable */ +#define PWM_TCR_CNTRRST (1 << 1) /* Bit 1: Counter Reset */ + /* Bit 2: Reserved */ +#define PWM_TCR_PWMEN (1 << 3) /* Bit 3: PWM Enable */ + /* Bits 4-31: Reserved */ +/* Match Control Register */ + +#define PWM_MCR_MR0I (1 << 0) /* Bit 0: Interrupt on MR0 */ +#define PWM_MCR_MR0R (1 << 1) /* Bit 1: Reset on MR0 */ +#define PWM_MCR_MR0S (1 << 2) /* Bit 2: Stop on MR0 */ +#define PWM_MCR_MR1I (1 << 3) /* Bit 3: Interrupt on MR1 */ +#define PWM_MCR_MR1R (1 << 4) /* Bit 4: Reset on MR1 */ +#define PWM_MCR_MR1S (1 << 5) /* Bit 5: Stop on MR1 */ +#define PWM_MCR_MR2I (1 << 6) /* Bit 6: Interrupt on MR2 */ +#define PWM_MCR_MR2R (1 << 7) /* Bit 7: Reset on MR2 */ +#define PWM_MCR_MR2S (1 << 8) /* Bit 8: Stop on MR2 */ +#define PWM_MCR_MR3I (1 << 9) /* Bit 9: Interrupt on MR3 */ +#define PWM_MCR_MR3R (1 << 10) /* Bit 10: Reset on MR3 */ +#define PWM_MCR_MR3S (1 << 11) /* Bit 11: Stop on MR3 */ +#define PWM_MCR_MR4I (1 << 12) /* Bit 12: Interrupt on MR4 */ +#define PWM_MCR_MR4R (1 << 13) /* Bit 13: Reset on MR4 */ +#define PWM_MCR_MR4S (1 << 14) /* Bit 14: Stop on MR4 */ +#define PWM_MCR_MR5I (1 << 15) /* Bit 15: Interrupt on MR5 */ +#define PWM_MCR_MR5R (1 << 16) /* Bit 16: Reset on MR5*/ +#define PWM_MCR_MR5S (1 << 17) /* Bit 17: Stop on MR5 */ +#define PWM_MCR_MR6I (1 << 18) /* Bit 18: Interrupt on MR6 */ +#define PWM_MCR_MR6R (1 << 19) /* Bit 19: Reset on MR6 */ +#define PWM_MCR_MR6S (1 << 20) /* Bit 20: Stop on MR6 */ + /* Bits 21-31: Reserved */ +/* Capture Control Register (Where are CAP2 and 3?) */ + +#define PWM_CCR_CAP0RE (1 << 0) /* Bit 0: Capture on CAPn.0 rising edge */ +#define PWM_CCR_CAP0FE (1 << 1) /* Bit 1: Capture on CAPn.0 falling edg */ +#define PWM_CCR_CAP0I (1 << 2) /* Bit 2: Interrupt on CAPn.0 */ +#define PWM_CCR_CAP1RE (1 << 3) /* Bit 3: Capture on CAPn.1 rising edge */ +#define PWM_CCR_CAP1FE (1 << 4) /* Bit 4: Capture on CAPn.1 falling edg */ +#define PWM_CCR_CAP1I (1 << 5) /* Bit 5: Interrupt on CAPn.1 */ + /* Bits 6-31: Reserved */ +/* PWM Control Register */ + /* Bits 0-1: Reserved */ +#define PWM_PCR_SEL2 (1 << 2) /* Bit 2: PWM2 single edge controlled mode */ +#define PWM_PCR_SEL3 (1 << 3) /* Bit 3: PWM3 single edge controlled mode */ +#define PWM_PCR_SEL4 (1 << 4) /* Bit 4: PWM4 single edge controlled mode */ +#define PWM_PCR_SEL5 (1 << 5) /* Bit 5: PWM5 single edge controlled mode */ +#define PWM_PCR_SEL6 (1 << 6) /* Bit 6: PWM6 single edge controlled mode */ + /* Bits 7-8: Reserved */ +#define PWM_PCR_ENA1 (1 << 9) /* Bit 9: Enable PWM1 output */ +#define PWM_PCR_ENA2 (1 << 10) /* Bit 10: Enable PWM2 output */ +#define PWM_PCR_ENA3 (1 << 11) /* Bit 11: Enable PWM3 output */ +#define PWM_PCR_ENA4 (1 << 12) /* Bit 12: Enable PWM4 output */ +#define PWM_PCR_ENA5 (1 << 13) /* Bit 13: Enable PWM5 output */ +#define PWM_PCR_ENA6 (1 << 14) /* Bit 14: Enable PWM6 output */ + /* Bits 15-31: Reserved */ +/* Load Enable Register */ + +#define PWM_LER_M0EN (1 << 0) /* Bit 0: Enable PWM Match 0 Latch */ +#define PWM_LER_M1EN (1 << 1) /* Bit 1: Enable PWM Match 1 Latch */ +#define PWM_LER_M2EN (1 << 2) /* Bit 2: Enable PWM Match 2 Latch */ +#define PWM_LER_M3EN (1 << 3) /* Bit 3: Enable PWM Match 3 Latch */ +#define PWM_LER_M4EN (1 << 4) /* Bit 4: Enable PWM Match 4 Latch */ +#define PWM_LER_M5EN (1 << 5) /* Bit 5: Enable PWM Match 5 Latch */ +#define PWM_LER_M6EN (1 << 6) /* Bit 6: Enable PWM Match 6 Latch */ + /* Bits 7-31: Reserved */ +/* Counter/Timer Control Register */ + +#define PWM_CTCR_MODE_SHIFT (0) /* Bits 0-1: Counter/Timer Mode */ +#define PWM_CTCR_MODE_MASK (3 << PWM_CTCR_MODE_SHIFT) +# define PWM_CTCR_MODE_TIMER (0 << PWM_CTCR_MODE_SHIFT) /* Timer Mode, prescal match */ +# define PWM_CTCR_MODE_CNTRRE (1 << PWM_CTCR_MODE_SHIFT) /* Counter Mode, CAP rising edge */ +# define PWM_CTCR_MODE_CNTRFE (2 << PWM_CTCR_MODE_SHIFT) /* Counter Mode, CAP falling edge */ +# define PWM_CTCR_MODE_CNTRBE (3 << PWM_CTCR_MODE_SHIFT) /* Counter Mode, CAP both edges */ +#define PWM_CTCR_INPSEL_SHIFT (2) /* Bits 2-3: Count Input Select */ +#define PWM_CTCR_INPSEL_MASK (3 << PWM_CTCR_INPSEL_SHIFT) +# define PWM_CTCR_INPSEL_CAPNp0 (0 << PWM_CTCR_INPSEL_SHIFT) /* CAPn.0 for TIMERn */ +# define PWM_CTCR_INPSEL_CAPNp1 (1 << PWM_CTCR_INPSEL_SHIFT) /* CAPn.0 for TIMERn */ + /* Bits 4-31: Reserved */ + /************************************************************************************ * Public Types ************************************************************************************/ diff --git a/nuttx/arch/arm/src/lpc17xx/lpc17_pwm.h b/nuttx/arch/arm/src/lpc17xx/lpc17_pwm.h index d16c61210..f0f26cea0 100644 --- a/nuttx/arch/arm/src/lpc17xx/lpc17_pwm.h +++ b/nuttx/arch/arm/src/lpc17xx/lpc17_pwm.h @@ -1,7 +1,7 @@ /************************************************************************************ * arch/arm/src/lpc17xx/lpc17_pwm.h * - * Copyright (C) 2010 Gregory Nutt. All rights reserved. + * Copyright (C) 2010, 2013 Gregory Nutt. All rights reserved. * Author: Gregory Nutt <gnutt@nuttx.org> * * Redistribution and use in source and binary forms, with or without @@ -41,173 +41,13 @@ ************************************************************************************/ #include <nuttx/config.h> - -#include "chip.h" -#include "chip/lpc17_memorymap.h" +#include "chip/lpc17_pwm.h" +#include "chip/lpc17_mcpwm.h" /************************************************************************************ * Pre-processor Definitions ************************************************************************************/ -/* Register offsets *****************************************************************/ - -#define LPC17_PWM_IR_OFFSET 0x0000 /* Interrupt Register */ -#define LPC17_PWM_TCR_OFFSET 0x0004 /* Timer Control Register */ -#define LPC17_PWM_TC_OFFSET 0x0008 /* Timer Counter */ -#define LPC17_PWM_PR_OFFSET 0x000c /* Prescale Register */ -#define LPC17_PWM_PC_OFFSET 0x0010 /* Prescale Counter */ -#define LPC17_PWM_MCR_OFFSET 0x0014 /* Match Control Register */ -#define LPC17_PWM_MR0_OFFSET 0x0018 /* Match Register 0 */ -#define LPC17_PWM_MR1_OFFSET 0x001c /* Match Register 1 */ -#define LPC17_PWM_MR2_OFFSET 0x0020 /* Match Register 2 */ -#define LPC17_PWM_MR3_OFFSET 0x0024 /* Match Register 3 */ -#define LPC17_PWM_CCR_OFFSET 0x0028 /* Capture Control Register */ -#define LPC17_PWM_CR0_OFFSET 0x002c /* Capture Register 0 */ -#define LPC17_PWM_CR1_OFFSET 0x0030 /* Capture Register 1 */ -#define LPC17_PWM_CR2_OFFSET 0x0034 /* Capture Register 2 */ -#define LPC17_PWM_CR3_OFFSET 0x0038 /* Capture Register 3 */ -#define LPC17_PWM_MR4_OFFSET 0x0040 /* Match Register 4 */ -#define LPC17_PWM_MR5_OFFSET 0x0044 /* Match Register 5 */ -#define LPC17_PWM_MR6_OFFSET 0x0048 /* Match Register 6 */ -#define LPC17_PWM_PCR_OFFSET 0x004c /* PWM Control Register */ -#define LPC17_PWM_LER_OFFSET 0x0050 /* Load Enable Register */ -#define LPC17_PWM_CTCR_OFFSET 0x0070 /* Counter/Timer Control Register */ - -/* Register addresses ***************************************************************/ - -#define LPC17_PWM1_IR (LPC17_PWM1_BASE+LPC17_PWM_IR_OFFSET) -#define LPC17_PWM1_TCR (LPC17_PWM1_BASE+LPC17_PWM_TCR_OFFSET) -#define LPC17_PWM1_TC (LPC17_PWM1_BASE+LPC17_PWM_TC_OFFSET) -#define LPC17_PWM1_PR (LPC17_PWM1_BASE+LPC17_PWM_PR_OFFSET) -#define LPC17_PWM1_PC (LPC17_PWM1_BASE+LPC17_PWM_PC_OFFSET) -#define LPC17_PWM1_MCR (LPC17_PWM1_BASE+LPC17_PWM_MCR_OFFSET) -#define LPC17_PWM1_MR0 (LPC17_PWM1_BASE+LPC17_PWM_MR0_OFFSET) -#define LPC17_PWM1_MR1 (LPC17_PWM1_BASE+LPC17_PWM_MR1_OFFSET) -#define LPC17_PWM1_MR2 (LPC17_PWM1_BASE+LPC17_PWM_MR2_OFFSET) -#define LPC17_PWM1_MR3 (LPC17_PWM1_BASE+LPC17_PWM_MR3_OFFSET) -#define LPC17_PWM1_MR4 (LPC17_PWM1_BASE+LPC17_PWM_MR4_OFFSET) -#define LPC17_PWM1_MR5 (LPC17_PWM1_BASE+LPC17_PWM_MR5_OFFSET) -#define LPC17_PWM1_MR6 (LPC17_PWM1_BASE+LPC17_PWM_MR6_OFFSET) -#define LPC17_PWM1_CCR (LPC17_PWM1_BASE+LPC17_PWM_CCR_OFFSET) -#define LPC17_PWM1_CR0 (LPC17_PWM1_BASE+LPC17_PWM_CR0_OFFSET) -#define LPC17_PWM1_CR1 (LPC17_PWM1_BASE+LPC17_PWM_CR1_OFFSET) -#define LPC17_PWM1_CR2 (LPC17_PWM1_BASE+LPC17_PWM_CR2_OFFSET) -#define LPC17_PWM1_CR3 (LPC17_PWM1_BASE+LPC17_PWM_CR3_OFFSET) -#define LPC17_PWM1_PCR (LPC17_PWM1_BASE+LPC17_PWM_PCR_OFFSET) -#define LPC17_PWM1_LER (LPC17_PWM1_BASE+LPC17_PWM_LER_OFFSET) -#define LPC17_PWM1_CTCR (LPC17_PWM1_BASE+LPC17_PWM_CTCR_OFFSET) - -/* Register bit definitions *********************************************************/ -/* Registers holding 32-bit numeric values (no bit field definitions): - * - * Timer Counter (TC) - * Prescale Register (PR) - * Prescale Counter (PC) - * Match Register 0 (MR0) - * Match Register 1 (MR1) - * Match Register 2 (MR2) - * Match Register 3 (MR3) - * Match Register 4 (MR3) - * Match Register 5 (MR3) - * Match Register 6 (MR3) - * Capture Register 0 (CR0) - * Capture Register 1 (CR1) - * Capture Register 1 (CR2) - * Capture Register 1 (CR3) - */ - -/* Interrupt Register */ - -#define PWM_IR_MR0 (1 << 0) /* Bit 0: PWM match channel 0 interrrupt */ -#define PWM_IR_MR1 (1 << 1) /* Bit 1: PWM match channel 1 interrrupt */ -#define PWM_IR_MR2 (1 << 2) /* Bit 2: PWM match channel 2 interrrupt */ -#define PWM_IR_MR3 (1 << 3) /* Bit 3: PWM match channel 3 interrrupt */ -#define PWM_IR_CAP0 (1 << 4) /* Bit 4: Capture input 0 interrrupt */ -#define PWM_IR_CAP1 (1 << 5) /* Bit 5: Capture input 1 interrrupt */ - /* Bits 6-7: Reserved */ -#define PWM_IR_MR4 (1 << 8) /* Bit 8: PWM match channel 4 interrrupt */ -#define PWM_IR_MR5 (1 << 9) /* Bit 9: PWM match channel 5 interrrupt */ -#define PWM_IR_MR6 (1 << 10) /* Bit 10: PWM match channel 6 interrrupt */ - /* Bits 11-31: Reserved */ -/* Timer Control Register */ - -#define PWM_TCR_CNTREN (1 << 0) /* Bit 0: Counter Enable */ -#define PWM_TCR_CNTRRST (1 << 1) /* Bit 1: Counter Reset */ - /* Bit 2: Reserved */ -#define PWM_TCR_PWMEN (1 << 3) /* Bit 3: PWM Enable */ - /* Bits 4-31: Reserved */ -/* Match Control Register */ - -#define PWM_MCR_MR0I (1 << 0) /* Bit 0: Interrupt on MR0 */ -#define PWM_MCR_MR0R (1 << 1) /* Bit 1: Reset on MR0 */ -#define PWM_MCR_MR0S (1 << 2) /* Bit 2: Stop on MR0 */ -#define PWM_MCR_MR1I (1 << 3) /* Bit 3: Interrupt on MR1 */ -#define PWM_MCR_MR1R (1 << 4) /* Bit 4: Reset on MR1 */ -#define PWM_MCR_MR1S (1 << 5) /* Bit 5: Stop on MR1 */ -#define PWM_MCR_MR2I (1 << 6) /* Bit 6: Interrupt on MR2 */ -#define PWM_MCR_MR2R (1 << 7) /* Bit 7: Reset on MR2 */ -#define PWM_MCR_MR2S (1 << 8) /* Bit 8: Stop on MR2 */ -#define PWM_MCR_MR3I (1 << 9) /* Bit 9: Interrupt on MR3 */ -#define PWM_MCR_MR3R (1 << 10) /* Bit 10: Reset on MR3 */ -#define PWM_MCR_MR3S (1 << 11) /* Bit 11: Stop on MR3 */ -#define PWM_MCR_MR4I (1 << 12) /* Bit 12: Interrupt on MR4 */ -#define PWM_MCR_MR4R (1 << 13) /* Bit 13: Reset on MR4 */ -#define PWM_MCR_MR4S (1 << 14) /* Bit 14: Stop on MR4 */ -#define PWM_MCR_MR5I (1 << 15) /* Bit 15: Interrupt on MR5 */ -#define PWM_MCR_MR5R (1 << 16) /* Bit 16: Reset on MR5*/ -#define PWM_MCR_MR5S (1 << 17) /* Bit 17: Stop on MR5 */ -#define PWM_MCR_MR6I (1 << 18) /* Bit 18: Interrupt on MR6 */ -#define PWM_MCR_MR6R (1 << 19) /* Bit 19: Reset on MR6 */ -#define PWM_MCR_MR6S (1 << 20) /* Bit 20: Stop on MR6 */ - /* Bits 21-31: Reserved */ -/* Capture Control Register (Where are CAP2 and 3?) */ - -#define PWM_CCR_CAP0RE (1 << 0) /* Bit 0: Capture on CAPn.0 rising edge */ -#define PWM_CCR_CAP0FE (1 << 1) /* Bit 1: Capture on CAPn.0 falling edg */ -#define PWM_CCR_CAP0I (1 << 2) /* Bit 2: Interrupt on CAPn.0 */ -#define PWM_CCR_CAP1RE (1 << 3) /* Bit 3: Capture on CAPn.1 rising edge */ -#define PWM_CCR_CAP1FE (1 << 4) /* Bit 4: Capture on CAPn.1 falling edg */ -#define PWM_CCR_CAP1I (1 << 5) /* Bit 5: Interrupt on CAPn.1 */ - /* Bits 6-31: Reserved */ -/* PWM Control Register */ - /* Bits 0-1: Reserved */ -#define PWM_PCR_SEL2 (1 << 2) /* Bit 2: PWM2 single edge controlled mode */ -#define PWM_PCR_SEL3 (1 << 3) /* Bit 3: PWM3 single edge controlled mode */ -#define PWM_PCR_SEL4 (1 << 4) /* Bit 4: PWM4 single edge controlled mode */ -#define PWM_PCR_SEL5 (1 << 5) /* Bit 5: PWM5 single edge controlled mode */ -#define PWM_PCR_SEL6 (1 << 6) /* Bit 6: PWM6 single edge controlled mode */ - /* Bits 7-8: Reserved */ -#define PWM_PCR_ENA1 (1 << 9) /* Bit 9: Enable PWM1 output */ -#define PWM_PCR_ENA2 (1 << 10) /* Bit 10: Enable PWM2 output */ -#define PWM_PCR_ENA3 (1 << 11) /* Bit 11: Enable PWM3 output */ -#define PWM_PCR_ENA4 (1 << 12) /* Bit 12: Enable PWM4 output */ -#define PWM_PCR_ENA5 (1 << 13) /* Bit 13: Enable PWM5 output */ -#define PWM_PCR_ENA6 (1 << 14) /* Bit 14: Enable PWM6 output */ - /* Bits 15-31: Reserved */ -/* Load Enable Register */ - -#define PWM_LER_M0EN (1 << 0) /* Bit 0: Enable PWM Match 0 Latch */ -#define PWM_LER_M1EN (1 << 1) /* Bit 1: Enable PWM Match 1 Latch */ -#define PWM_LER_M2EN (1 << 2) /* Bit 2: Enable PWM Match 2 Latch */ -#define PWM_LER_M3EN (1 << 3) /* Bit 3: Enable PWM Match 3 Latch */ -#define PWM_LER_M4EN (1 << 4) /* Bit 4: Enable PWM Match 4 Latch */ -#define PWM_LER_M5EN (1 << 5) /* Bit 5: Enable PWM Match 5 Latch */ -#define PWM_LER_M6EN (1 << 6) /* Bit 6: Enable PWM Match 6 Latch */ - /* Bits 7-31: Reserved */ -/* Counter/Timer Control Register */ - -#define PWM_CTCR_MODE_SHIFT (0) /* Bits 0-1: Counter/Timer Mode */ -#define PWM_CTCR_MODE_MASK (3 << PWM_CTCR_MODE_SHIFT) -# define PWM_CTCR_MODE_TIMER (0 << PWM_CTCR_MODE_SHIFT) /* Timer Mode, prescal match */ -# define PWM_CTCR_MODE_CNTRRE (1 << PWM_CTCR_MODE_SHIFT) /* Counter Mode, CAP rising edge */ -# define PWM_CTCR_MODE_CNTRFE (2 << PWM_CTCR_MODE_SHIFT) /* Counter Mode, CAP falling edge */ -# define PWM_CTCR_MODE_CNTRBE (3 << PWM_CTCR_MODE_SHIFT) /* Counter Mode, CAP both edges */ -#define PWM_CTCR_INPSEL_SHIFT (2) /* Bits 2-3: Count Input Select */ -#define PWM_CTCR_INPSEL_MASK (3 << PWM_CTCR_INPSEL_SHIFT) -# define PWM_CTCR_INPSEL_CAPNp0 (0 << PWM_CTCR_INPSEL_SHIFT) /* CAPn.0 for TIMERn */ -# define PWM_CTCR_INPSEL_CAPNp1 (1 << PWM_CTCR_INPSEL_SHIFT) /* CAPn.0 for TIMERn */ - /* Bits 4-31: Reserved */ - /************************************************************************************ * Public Types ************************************************************************************/ diff --git a/nuttx/configs/kwikstik-k40/README.txt b/nuttx/configs/kwikstik-k40/README.txt index e4170de9b..a49936e65 100644 --- a/nuttx/configs/kwikstik-k40/README.txt +++ b/nuttx/configs/kwikstik-k40/README.txt @@ -524,7 +524,22 @@ Where <subdir> is one of the following: ostest: ------ This configuration directory, performs a simple OS test using - examples/ostest. By default, this project assumes that you are - using the DFU bootloader. + examples/ostest. - CONFIG_KINETIS_BUILDROOT=y : NuttX buildroot under Linux or Cygwin + NOTES: + + 1. This configuration uses the mconf-based configuration tool. To + change this configuration using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + and misc/tools/ + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. Default platform/toolchain: + + CONFIG_HOST_LINUX=y : Linux (Cygwin under Windows okay too). + CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y : Buildroot (arm-nuttx-elf-gcc) + CONFIG_ARMV7M_OABI_TOOLCHAIN=y : The older OABI version + CONFIG_RAW_BINARY=y : Output formats: ELF and raw binary diff --git a/nuttx/configs/kwikstik-k40/ostest/appconfig b/nuttx/configs/kwikstik-k40/ostest/appconfig deleted file mode 100644 index 9fa43afb8..000000000 --- a/nuttx/configs/kwikstik-k40/ostest/appconfig +++ /dev/null @@ -1,39 +0,0 @@ -############################################################################ -# configs/kwikstik-k40/ostest/appconfig -# -# Copyright (C) 2011 Gregory Nutt. All rights reserved. -# Author: Gregory Nutt <gnutt@nuttx.org> -# -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions -# are met: -# -# 1. Redistributions of source code must retain the above copyright -# notice, this list of conditions and the following disclaimer. -# 2. Redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in -# the documentation and/or other materials provided with the -# distribution. -# 3. Neither the name NuttX nor the names of its contributors may be -# used to endorse or promote products derived from this software -# without specific prior written permission. -# -# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS -# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED -# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -# POSSIBILITY OF SUCH DAMAGE. -# -############################################################################ - -# Path to example in apps/examples containing the user_start entry point - -CONFIGURED_APPS += examples/ostest - diff --git a/nuttx/configs/kwikstik-k40/ostest/defconfig b/nuttx/configs/kwikstik-k40/ostest/defconfig index 6eca2332a..7b806d611 100755 --- a/nuttx/configs/kwikstik-k40/ostest/defconfig +++ b/nuttx/configs/kwikstik-k40/ostest/defconfig @@ -1,256 +1,267 @@ -############################################################################ -# configs/kwikstik-k40/ostest/defconfig -# -# Copyright (C) 2011 Gregory Nutt. All rights reserved. -# Author: Gregory Nutt <gnutt@nuttx.org> -# -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions -# are met: -# -# 1. Redistributions of source code must retain the above copyright -# notice, this list of conditions and the following disclaimer. -# 2. Redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in -# the documentation and/or other materials provided with the -# distribution. -# 3. Neither the name NuttX nor the names of its contributors may be -# used to endorse or promote products derived from this software -# without specific prior written permission. -# -# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS -# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED -# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -# POSSIBILITY OF SUCH DAMAGE. -# -############################################################################ -# -# Architecture Selection # -CONFIG_ARCH="arm" +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# +CONFIG_NUTTX_NEWCONFIG=y + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_DEBUG_SYMBOLS is not set + +# +# System Type +# +# CONFIG_ARCH_8051 is not set CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_IMX is not set +CONFIG_ARCH_CHIP_KINETIS=y +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAM3U is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STR71X is not set CONFIG_ARCH_CORTEXM4=y +CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="kinetis" -CONFIG_ARCH_CHIP_MK40X256VLQ100=y -CONFIG_ARCH_BOARD="kwikstik-k40" -CONFIG_ARCH_BOARD_KWIKSTIK_K40=y -CONFIG_BOARD_LOOPSPERMSEC=9535 -CONFIG_DRAM_START=0x1fff8000 -CONFIG_DRAM_SIZE= 0x00010000 -CONFIG_ARCH_IRQPRIO=y -CONFIG_ARCH_INTERRUPTSTACK=0 -CONFIG_ARCH_STACKDUMP=y -CONFIG_ARCH_BOOTLOADER=n -CONFIG_ARCH_LEDS=y -CONFIG_ARCH_BUTTONS=n -CONFIG_ARCH_CALIBRATION=n -CONFIG_ARCH_DMA=n +# CONFIG_ARMV7M_USEBASEPRI is not set +# CONFIG_ARCH_FPU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARMV7M_MPU is not set # -# Identify toolchain and linker options +# ARMV7M Configuration Options # -CONFIG_KINETIS_CODESOURCERYW=n -CONFIG_KINETIS_CODESOURCERYL=n -CONFIG_KINETIS_DEVKITARM=n -CONFIG_KINETIS_BUILDROOT=y -CONFIG_KINETIS_DFU=y +CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABI is not set +CONFIG_ARMV7M_OABI_TOOLCHAIN=y # -# Individual subsystems can be enabled: +# Kinetis Configuration Options # - -CONFIG_KINETIS_TRACE=n -CONFIG_KINETIS_FLEXBUS=n -CONFIG_KINETIS_UART0=n -CONFIG_KINETIS_UART1=n -CONFIG_KINETIS_UART2=n -CONFIG_KINETIS_UART3=n -CONFIG_KINETIS_UART4=n +# CONFIG_ARCH_CHIP_MK40N512VLQ100 is not set +# CONFIG_ARCH_CHIP_MK40N512VMD100 is not set +# CONFIG_ARCH_CHIP_MK40X128VLQ100 is not set +# CONFIG_ARCH_CHIP_MK40X128VMD100 is not set +CONFIG_ARCH_CHIP_MK40X256VLQ100=y +# CONFIG_ARCH_CHIP_MK40X256VMD100 is not set +# CONFIG_ARCH_CHIP_MK60N256VLQ100 is not set +# CONFIG_ARCH_CHIP_MK60N256VMD100 is not set +# CONFIG_ARCH_CHIP_MK60N512VLQ100 is not set +# CONFIG_ARCH_CHIP_MK60N512VMD100 is not set +# CONFIG_ARCH_CHIP_MK60X256VLQ100 is not set +# CONFIG_ARCH_CHIP_MK60X256VMD100 is not set +CONFIG_ARCH_FAMILY_K40=y +# CONFIG_ARCH_FAMILY_K60 is not set + +# +# Kinetis Peripheral Support +# +# CONFIG_KINETIS_TRACE is not set +# CONFIG_KINETIS_FLEXBUS is not set +# CONFIG_KINETIS_UART0 is not set +# CONFIG_KINETIS_UART1 is not set +# CONFIG_KINETIS_UART2 is not set +# CONFIG_KINETIS_UART3 is not set +# CONFIG_KINETIS_UART4 is not set CONFIG_KINETIS_UART5=y -CONFIG_KINETIS_ENET=n -CONFIG_KINETIS_RNGB=n -CONFIG_KINETIS_FLEXCAN0=n -CONFIG_KINETIS_FLEXCAN1=n -CONFIG_KINETIS_SPI0=n -CONFIG_KINETIS_SPI1=n -CONFIG_KINETIS_SPI2=n -CONFIG_KINETIS_I2C0=n -CONFIG_KINETIS_I2C1=n -CONFIG_KINETIS_I2S=n -CONFIG_KINETIS_DAC0=n -CONFIG_KINETIS_DAC1=n -CONFIG_KINETIS_ADC0=n -CONFIG_KINETIS_ADC1=n -CONFIG_KINETIS_CMP=n -CONFIG_KINETIS_VREF=n -CONFIG_KINETIS_SDHC=n -CONFIG_KINETIS_FTM0=n -CONFIG_KINETIS_FTM1=n -CONFIG_KINETIS_FTM2=n -CONFIG_KINETIS_LPTIMER=n -CONFIG_KINETIS_RTC=n -CONFIG_KINETIS_SLCD=n -CONFIG_KINETIS_EWM=n -CONFIG_KINETIS_CMT=n -CONFIG_KINETIS_USBOTG=n -CONFIG_KINETIS_USBDCD=n -CONFIG_KINETIS_LLWU=n -CONFIG_KINETIS_TSI=n -CONFIG_KINETIS_FTFL=n -CONFIG_KINETIS_DMA=n -CONFIG_KINETIS_CRC=n -CONFIG_KINETIS_PDB=n -CONFIG_KINETIS_PIT=n -CONFIG_ARMV7M_MPU=n - -# -# PIN Interrupt Support -# -CONFIG_GPIO_IRQ=n -CONFIG_KINETIS_PORTAINTS=n -CONFIG_KINETIS_PORTBINTS=n -CONFIG_KINETIS_PORTCINTS=n -CONFIG_KINETIS_PORTDINTS=n -CONFIG_KINETIS_PORTEINTS=n - -# -# K40X256VLQ100 specific serial device driver settings -# -CONFIG_UART0_SERIAL_CONSOLE=n -CONFIG_UART1_SERIAL_CONSOLE=n -CONFIG_UART2_SERIAL_CONSOLE=n -CONFIG_UART3_SERIAL_CONSOLE=n -CONFIG_UART4_SERIAL_CONSOLE=n -CONFIG_UART5_SERIAL_CONSOLE=y - -CONFIG_UART0_TXBUFSIZE=256 -CONFIG_UART1_TXBUFSIZE=256 -CONFIG_UART2_TXBUFSIZE=256 -CONFIG_UART3_TXBUFSIZE=256 -CONFIG_UART4_TXBUFSIZE=256 -CONFIG_UART5_TXBUFSIZE=256 +# CONFIG_KINETIS_FLEXCAN0 is not set +# CONFIG_KINETIS_FLEXCAN1 is not set +# CONFIG_KINETIS_SPI0 is not set +# CONFIG_KINETIS_SPI1 is not set +# CONFIG_KINETIS_SPI2 is not set +# CONFIG_KINETIS_I2C0 is not set +# CONFIG_KINETIS_I2C1 is not set +# CONFIG_KINETIS_I2S is not set +# CONFIG_KINETIS_DAC0 is not set +# CONFIG_KINETIS_DAC1 is not set +# CONFIG_KINETIS_ADC0 is not set +# CONFIG_KINETIS_ADC1 is not set +# CONFIG_KINETIS_CMP is not set +# CONFIG_KINETIS_VREF is not set +# CONFIG_KINETIS_SDHC is not set +# CONFIG_KINETIS_FTM0 is not set +# CONFIG_KINETIS_FTM1 is not set +# CONFIG_KINETIS_FTM2 is not set +# CONFIG_KINETIS_LPTIMER is not set +# CONFIG_KINETIS_RTC is not set +# CONFIG_KINETIS_SLCD is not set +# CONFIG_KINETIS_EWM is not set +# CONFIG_KINETIS_CMT is not set +# CONFIG_KINETIS_USBOTG is not set +# CONFIG_KINETIS_USBDCD is not set +# CONFIG_KINETIS_LLWU is not set +# CONFIG_KINETIS_TSI is not set +# CONFIG_KINETIS_FTFL is not set +# CONFIG_KINETIS_DMA is not set +# CONFIG_KINETIS_CRC is not set +# CONFIG_KINETIS_PDB is not set +# CONFIG_KINETIS_PIT is not set + +# +# Kinetis GPIO Interrupt Configuration +# +# CONFIG_GPIO_IRQ is not set + +# +# Kinetis UART Configuration +# + +# +# External Memory Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_IRQPRIO=y +# CONFIG_CUSTOM_STACK is not set +# CONFIG_ADDRENV is not set +CONFIG_ARCH_HAVE_VFORK=y +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +CONFIG_ARCH_HAVE_RAMFUNCS=y +CONFIG_ARCH_RAMFUNCS=y +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set -CONFIG_UART0_RXBUFSIZE=256 -CONFIG_UART1_RXBUFSIZE=256 -CONFIG_UART2_RXBUFSIZE=256 -CONFIG_UART3_RXBUFSIZE=256 -CONFIG_UART4_RXBUFSIZE=256 -CONFIG_UART5_RXBUFSIZE=256 +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=9535 +# CONFIG_ARCH_CALIBRATION is not set +CONFIG_DRAM_START=0x1fff8000 +CONFIG_DRAM_SIZE=65536 +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 -CONFIG_UART0_BAUD=115200 -CONFIG_UART1_BAUD=115200 -CONFIG_UART2_BAUD=115200 -CONFIG_UART3_BAUD=115200 -CONFIG_UART4_BAUD=115200 -CONFIG_UART5_BAUD=115200 +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set -CONFIG_UART0_BITS=8 -CONFIG_UART1_BITS=8 -CONFIG_UART2_BITS=8 -CONFIG_UART3_BITS=8 -CONFIG_UART4_BITS=8 -CONFIG_UART5_BITS=8 +# +# Board Selection +# +CONFIG_ARCH_BOARD_KWIKSTIK_K40=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="kwikstik-k40" -CONFIG_UART0_PARITY=0 -CONFIG_UART2_PARITY=0 -CONFIG_UART3_PARITY=0 -CONFIG_UART4_PARITY=0 -CONFIG_UART5_PARITY=0 +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_ARCH_HAVE_IRQBUTTONS=y # -# General build options +# Board-Specific Options # -CONFIG_RRLOAD_BINARY=n -CONFIG_INTELHEX_BINARY=y -CONFIG_MOTOROLA_SREC=n -CONFIG_RAW_BINARY=n # -# General OS setup +# RTOS Features # -CONFIG_USER_ENTRYPOINT="ostest_main" -CONFIG_DEBUG=n -CONFIG_DEBUG_VERBOSE=n -CONFIG_DEBUG_SYMBOLS=n -CONFIG_MM_REGIONS=1 -CONFIG_ARCH_LOWPUTC=y +# CONFIG_BOARD_INITIALIZE is not set +CONFIG_MSEC_PER_TICK=10 CONFIG_RR_INTERVAL=200 -CONFIG_SCHED_INSTRUMENTATION=n +# CONFIG_SCHED_INSTRUMENTATION is not set CONFIG_TASK_NAME_SIZE=0 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_JULIAN_TIME is not set CONFIG_START_YEAR=2009 CONFIG_START_MONTH=9 CONFIG_START_DAY=21 -CONFIG_GREGORIAN_TIME=n -CONFIG_JULIAN_TIME=n CONFIG_DEV_CONSOLE=y -CONFIG_DEV_LOWCONSOLE=y -CONFIG_MUTEX_TYPES=n -CONFIG_PRIORITY_INHERITANCE=n -CONFIG_SEM_PREALLOCHOLDERS=0 -CONFIG_SEM_NNESTPRIO=0 -CONFIG_FDCLONE_DISABLE=n -CONFIG_FDCLONE_STDIO=n +# CONFIG_MUTEX_TYPES is not set +# CONFIG_PRIORITY_INHERITANCE is not set +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set CONFIG_SDCLONE_DISABLE=y -CONFIG_NXFLAT=n -CONFIG_SCHED_WORKQUEUE=n -CONFIG_SCHED_WORKPRIORITY=192 -CONFIG_SCHED_WORKPERIOD=50000 -CONFIG_SCHED_WORKSTACKSIZE=1024 -CONFIG_SIG_SIGWORK=17 - -# -# The following can be used to disable categories of -# APIs supported by the OS. If the compiler supports -# weak functions, then it should not be necessary to -# disable functions unless you want to restrict usage -# of those APIs. -# -# There are certain dependency relationships in these -# features. -# -# o mq_notify logic depends on signals to awaken tasks -# waiting for queues to become full or empty. -# o pthread_condtimedwait() depends on signals to wake -# up waiting tasks. -# -CONFIG_DISABLE_CLOCK=n -CONFIG_DISABLE_POSIX_TIMERS=n -CONFIG_DISABLE_PTHREAD=n -CONFIG_DISABLE_SIGNALS=n -CONFIG_DISABLE_MQUEUE=n -CONFIG_DISABLE_MOUNTPOINT=y +# CONFIG_SCHED_WAITPID is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +CONFIG_USER_ENTRYPOINT="ostest_main" +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_CLOCK is not set +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set CONFIG_DISABLE_ENVIRON=y -CONFIG_DISABLE_POLL=y # -# Misc libc settings +# Signal Numbers # -CONFIG_NOPRINTF_FIELDWIDTH=n - -# -# Allow for architecture optimized implementations -# -# The architecture can provide optimized versions of the -# following to improve system performance -# -CONFIG_ARCH_MEMCPY=n -CONFIG_ARCH_MEMCMP=n -CONFIG_ARCH_MEMMOVE=n -CONFIG_ARCH_MEMSET=n -CONFIG_ARCH_STRCMP=n -CONFIG_ARCH_STRCPY=n -CONFIG_ARCH_STRNCPY=n -CONFIG_ARCH_STRLEN=n -CONFIG_ARCH_STRNLEN=n -CONFIG_ARCH_BZERO=n +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 # # Sizes of configurable things (0 disables) @@ -261,8 +272,6 @@ CONFIG_NPTHREAD_KEYS=4 CONFIG_NFILE_DESCRIPTORS=8 CONFIG_NFILE_STREAMS=8 CONFIG_NAME_MAX=32 -CONFIG_STDIO_BUFFER_SIZE=64 -CONFIG_NUNGET_CHARS=2 CONFIG_PREALLOC_MQ_MSGS=4 CONFIG_MQ_MAXMSGSIZE=32 CONFIG_MAX_WDOGPARMS=2 @@ -270,200 +279,305 @@ CONFIG_PREALLOC_WDOGS=4 CONFIG_PREALLOC_TIMERS=4 # -# Filesystem configuration +# Stack and heap information # -CONFIG_FS_FAT=n -CONFIG_FAT_LCNAMES=n -CONFIG_FAT_LFN=n -CONFIG_FAT_MAXFNAME=32 -CONFIG_FS_NXFFS=n -CONFIG_FS_ROMFS=n +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_LOOP is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_PWM is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +CONFIG_DEV_LOWCONSOLE=y +# CONFIG_16550_UART is not set +CONFIG_ARCH_HAVE_UART5=y +CONFIG_MCU_SERIAL=y +CONFIG_UART5_SERIAL_CONSOLE=y +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART5 Configuration +# +CONFIG_UART5_RXBUFSIZE=256 +CONFIG_UART5_TXBUFSIZE=256 +CONFIG_UART5_BAUD=115200 +CONFIG_UART5_BITS=8 +CONFIG_UART5_PARITY=0 +CONFIG_UART5_2STOP=0 +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set # -# Maintain legacy build behavior (revisit) +# Networking Support # +# CONFIG_NET is not set -CONFIG_MMCSD=y -CONFIG_MMCSD_SPI=y -CONFIG_MMCSD_SDIO=y -CONFIG_MTD=y +# +# File Systems +# # -# SPI-based MMC/SD driver +# File system configuration # -CONFIG_MMCSD_NSLOTS=1 -CONFIG_MMCSD_READONLY=n -CONFIG_MMCSD_SPICLOCK=12500000 +CONFIG_DISABLE_MOUNTPOINT=y +# CONFIG_FS_RAMMAP is not set # -# Block driver buffering +# System Logging # -CONFIG_FS_READAHEAD=n -CONFIG_FS_WRITEBUFFER=n +# CONFIG_SYSLOG_ENABLE is not set +# CONFIG_SYSLOG is not set # -# SDIO-based MMC/SD driver +# Graphics Support # -CONFIG_SDIO_DMA=n -CONFIG_MMCSD_MMCSUPPORT=n -CONFIG_MMCSD_HAVECARDDETECT=n +# CONFIG_NX is not set # -# TCP/IP and UDP support via uIP +# Memory Management # -CONFIG_NET=n -CONFIG_NET_IPv6=n -CONFIG_NSOCKET_DESCRIPTORS=0 -CONFIG_NET_SOCKOPTS=y -CONFIG_NET_BUFSIZE=420 -CONFIG_NET_TCP=n -CONFIG_NET_TCP_CONNS=40 -CONFIG_NET_MAX_LISTENPORTS=40 -CONFIG_NET_UDP=n -CONFIG_NET_UDP_CHECKSUMS=y -#CONFIG_NET_UDP_CONNS=10 -CONFIG_NET_ICMP=n -CONFIG_NET_ICMP_PING=n -#CONFIG_NET_PINGADDRCONF=0 -CONFIG_NET_STATISTICS=y -#CONFIG_NET_RECEIVE_WINDOW= -#CONFIG_NET_ARPTAB_SIZE=8 -CONFIG_NET_BROADCAST=n +# CONFIG_MM_MULTIHEAP is not set +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_GRAN is not set # -# UIP Network Utilities +# Binary Formats # -CONFIG_NET_DHCP_LIGHT=n -CONFIG_NET_RESOLV_ENTRIES=4 +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set # -# USB Device Configuration +# Library Routines # -CONFIG_USBDEV=n -CONFIG_USBDEV_ISOCHRONOUS=n -CONFIG_USBDEV_DUALSPEED=n -CONFIG_USBDEV_SELFPOWERED=y -CONFIG_USBDEV_REMOTEWAKEUP=n -CONFIG_USBDEV_MAXPOWER=100 -CONFIG_USBDEV_TRACE=n -CONFIG_USBDEV_TRACE_NRECORDS=128 # -# USB Serial Device Configuration +# Standard C Library Options # -CONFIG_PL2303=n -CONFIG_PL2303_EPINTIN=1 -CONFIG_PL2303_EPBULKOUT=2 -CONFIG_PL2303_EPBULKIN=3 -CONFIG_PL2303_NWRREQS=4 -CONFIG_PL2303_NRDREQS=4 -CONFIG_PL2303_VENDORID=0x067b -CONFIG_PL2303_PRODUCTID=0x2303 -CONFIG_PL2303_VENDORSTR="Nuttx" -CONFIG_PL2303_PRODUCTSTR="USBdev Serial" -CONFIG_PL2303_RXBUFSIZE=512 -CONFIG_PL2303_TXBUFSIZE=512 +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set # -# USB Storage Device Configuration +# Non-standard Library Support # -CONFIG_USBMSC=n -CONFIG_USBMSC_EP0MAXPACKET=64 -CONFIG_USBMSC_EPBULKOUT=2 -CONFIG_USBMSC_EPBULKIN=5 -CONFIG_USBMSC_NRDREQS=2 -CONFIG_USBMSC_NWRREQS=2 -CONFIG_USBMSC_BULKINREQLEN=256 -CONFIG_USBMSC_BULKOUTREQLEN=256 -CONFIG_USBMSC_VENDORID=0x584e -CONFIG_USBMSC_VENDORSTR="NuttX" -CONFIG_USBMSC_PRODUCTID=0x5342 -CONFIG_USBMSC_PRODUCTSTR="USBdev Storage" -CONFIG_USBMSC_VERSIONNO=0x0399 -CONFIG_USBMSC_REMOVABLE=y +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_LIB_KBDCODEC is not set # -# Settings for examples/uip +# Basic CXX Support # -CONFIG_EXAMPLES_UIP_IPADDR=0x0a000002 -CONFIG_EXAMPLES_UIP_DRIPADDR=0x0a000001 -CONFIG_EXAMPLES_UIP_NETMASK=0xffffff00 -CONFIG_EXAMPLES_UIP_DHCPC=n +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set # -# Settings for examples/nettest -CONFIG_EXAMPLES_NETTEST_SERVER=n -CONFIG_EXAMPLES_NETTEST_PERFORMANCE=n -CONFIG_EXAMPLES_NETTEST_NOMAC=n -CONFIG_EXAMPLES_NETTEST_IPADDR=0x0a000002 -CONFIG_EXAMPLES_NETTEST_DRIPADDR=0x0a000001 -CONFIG_EXAMPLES_NETTEST_NETMASK=0xffffff00 -CONFIG_EXAMPLES_NETTEST_CLIENTIP=0x0a000001 +# Application Configuration +# # -# Settings for examples/ostest +# Built-In Applications # + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_COMPOSITE is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_LCDRW is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXCONSOLE is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXFLAT is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +CONFIG_EXAMPLES_OSTEST=y +# CONFIG_EXAMPLES_OSTEST_BUILTIN is not set CONFIG_EXAMPLES_OSTEST_LOOPS=1 CONFIG_EXAMPLES_OSTEST_STACKSIZE=2048 CONFIG_EXAMPLES_OSTEST_NBARRIER_THREADS=3 +CONFIG_EXAMPLES_OSTEST_RR_RANGE=10000 +CONFIG_EXAMPLES_OSTEST_RR_RUNS=10 +# CONFIG_EXAMPLES_PASHELLO is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_UIP is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBMSC is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set # -# Settings for apps/nshlib +# Graphics Support # -CONFIG_NSH_FILEIOSIZE=512 -CONFIG_NSH_STRERROR=n -CONFIG_NSH_LINELEN=64 -CONFIG_NSH_NESTDEPTH=3 -CONFIG_NSH_DISABLESCRIPT=n -CONFIG_NSH_DISABLEBG=n -CONFIG_NSH_ROMFSETC=n -CONFIG_NSH_CONSOLE=y -CONFIG_NSH_TELNET=n -CONFIG_NSH_ARCHINIT=n -CONFIG_NSH_IOBUFFER_SIZE=512 -CONFIG_NSH_DHCPC=n -CONFIG_NSH_NOMAC=n -CONFIG_NSH_IPADDR=0x0a000002 -CONFIG_NSH_DRIPADDR=0x0a000001 -CONFIG_NSH_NETMASK=0xffffff00 -CONFIG_NSH_ROMFSMOUNTPT="/etc" -CONFIG_NSH_INITSCRIPT="init.d/rcS" -CONFIG_NSH_ROMFSDEVNO=0 -CONFIG_NSH_ROMFSSECTSIZE=64 -CONFIG_NSH_FATDEVNO=1 -CONFIG_NSH_FATSECTSIZE=512 -CONFIG_NSH_FATNSECTORS=1024 -CONFIG_NSH_FATMOUNTPT="/tmp" +# CONFIG_TIFF is not set # -# Architecture-specific NSH options +# Interpreters # -CONFIG_NSH_MMCSDSPIPORTNO=0 -CONFIG_NSH_MMCSDSLOTNO=0 -CONFIG_NSH_MMCSDMINOR=0 +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set # -# Settings for examples/usbserial +# Network Utilities # -CONFIG_EXAMPLES_USBSERIAL_INONLY=n -CONFIG_EXAMPLES_USBSERIAL_OUTONLY=n -CONFIG_EXAMPLES_USBSERIAL_ONLYSMALL=n -CONFIG_EXAMPLES_USBSERIAL_ONLYBIG=n -CONFIG_EXAMPLES_USBSERIAL_TRACEINIT=n -CONFIG_EXAMPLES_USBSERIAL_TRACECLASS=n -CONFIG_EXAMPLES_USBSERIAL_TRACETRANSFERS=n -CONFIG_EXAMPLES_USBSERIAL_TRACECONTROLLER=n -CONFIG_EXAMPLES_USBSERIAL_TRACEINTERRUPTS=n +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPC is not set +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_FTPD is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_RESOLV is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TELNETD is not set +# CONFIG_NETUTILS_TFTPC is not set +# CONFIG_NETUTILS_THTTPD is not set +# CONFIG_NETUTILS_UIPLIB is not set +# CONFIG_NETUTILS_WEBCLIENT is not set # -# Stack and heap information +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# System NSH Add-Ons +# + +# +# Custom Free Memory Command +# +# CONFIG_SYSTEM_FREE is not set + +# +# I2C tool +# + +# +# FLASH Program Installation +# +# CONFIG_SYSTEM_INSTALL is not set + +# +# readline() +# +# CONFIG_SYSTEM_READLINE is not set + +# +# Power Off +# +# CONFIG_SYSTEM_POWEROFF is not set + +# +# RAMTRON +# +# CONFIG_SYSTEM_RAMTRON is not set + +# +# SD Card +# +# CONFIG_SYSTEM_SDCARD is not set + +# +# Sysinfo +# +# CONFIG_SYSTEM_SYSINFO is not set + +# +# USB Monitor # -CONFIG_BOOT_RUNFROMFLASH=n -CONFIG_BOOT_COPYTORAM=n -CONFIG_ARCH_RAMFUNCS=y -CONFIG_CUSTOM_STACK=n -CONFIG_IDLETHREAD_STACKSIZE=1024 -CONFIG_USERMAIN_STACKSIZE=2048 -CONFIG_PTHREAD_STACK_MIN=256 -CONFIG_PTHREAD_STACK_DEFAULT=2048 diff --git a/nuttx/configs/kwikstik-k40/ostest/setenv.sh b/nuttx/configs/kwikstik-k40/ostest/setenv.sh index 3acbddea4..f158b7f7c 100755 --- a/nuttx/configs/kwikstik-k40/ostest/setenv.sh +++ b/nuttx/configs/kwikstik-k40/ostest/setenv.sh @@ -57,5 +57,5 @@ fi export TOOLCHAIN_BIN="${WD}/../misc/buildroot/build_arm_nofpu/staging_dir/bin" # Add the path to the toolchain to the PATH varialble -export PATH="${BUILDROOT_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" echo "PATH : ${PATH}" diff --git a/nuttx/configs/lm3s6965-ek/README.txt b/nuttx/configs/lm3s6965-ek/README.txt index cae350365..e67b858b0 100644 --- a/nuttx/configs/lm3s6965-ek/README.txt +++ b/nuttx/configs/lm3s6965-ek/README.txt @@ -572,6 +572,7 @@ Where <subdir> is one of the following: CONFIG_HOST_LINUX=y : Linux (Cygwin under Windows okay too). CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y : Buildroot (arm-nuttx-elf-gcc) + CONFIG_ARMV7M_OABI_TOOLCHAIN=y : The older OABI version CONFIG_RAW_BINARY=y : Output formats: ELF and raw binary 3. As it is configured now, you MUST have a network connected. diff --git a/nuttx/configs/twr-k60n512/README.txt b/nuttx/configs/twr-k60n512/README.txt index 5fb00a2f9..4ed32411b 100644 --- a/nuttx/configs/twr-k60n512/README.txt +++ b/nuttx/configs/twr-k60n512/README.txt @@ -553,14 +553,14 @@ TWR-K60N512-specific Configuration Options CONFIG_KINETIS_TRACE -- Enable trace clocking on power up. CONFIG_KINETIS_FLEXBUS -- Enable flexbus clocking on power up. - CONFIG_KINETIS_UART0 -- Support UART0 - CONFIG_KINETIS_UART1 -- Support UART1 - CONFIG_KINETIS_UART2 -- Support UART2 - CONFIG_KINETIS_UART3 -- Support UART3 - CONFIG_KINETIS_UART4 -- Support UART4 - CONFIG_KINETIS_UART5 -- Support UART5 - CONFIG_KINETIS_ENET -- Support Ethernet (K60 only) - CONFIG_KINETIS_RNGB -- Support the random number generator(K60 only) + CONFIG_KINETIS_UART0 -- Support UART0 + CONFIG_KINETIS_UART1 -- Support UART1 + CONFIG_KINETIS_UART2 -- Support UART2 + CONFIG_KINETIS_UART3 -- Support UART3 + CONFIG_KINETIS_UART4 -- Support UART4 + CONFIG_KINETIS_UART5 -- Support UART5 + CONFIG_KINETIS_ENET -- Support Ethernet (K60 only) + CONFIG_KINETIS_RNGB -- Support the random number generator(K60 only) CONFIG_KINETIS_FLEXCAN0 -- Support FlexCAN0 CONFIG_KINETIS_FLEXCAN1 -- Support FlexCAN1 CONFIG_KINETIS_SPI0 -- Support SPI0 @@ -569,8 +569,8 @@ TWR-K60N512-specific Configuration Options CONFIG_KINETIS_I2C0 -- Support I2C0 CONFIG_KINETIS_I2C1 -- Support I2C1 CONFIG_KINETIS_I2S -- Support I2S - CONFIG_KINETIS_DAC0 -- Support DAC0 - CONFIG_KINETIS_DAC1 -- Support DAC1 + CONFIG_KINETIS_DAC0 -- Support DAC0 + CONFIG_KINETIS_DAC1 -- Support DAC1 CONFIG_KINETIS_ADC0 -- Support ADC0 CONFIG_KINETIS_ADC1 -- Support ADC1 CONFIG_KINETIS_CMP -- Support CMP @@ -658,8 +658,7 @@ Where <subdir> is one of the following: ostest: ------ This configuration directory, performs a simple OS test using - examples/ostest. By default, this project assumes that you are - using the DFU bootloader. + examples/ostest. CONFIG_KINETIS_BUILDROOT=y : NuttX buildroot under Linux or Cygwin diff --git a/nuttx/configs/twr-k60n512/nsh/defconfig b/nuttx/configs/twr-k60n512/nsh/defconfig index 704049400..f678f06cd 100644 --- a/nuttx/configs/twr-k60n512/nsh/defconfig +++ b/nuttx/configs/twr-k60n512/nsh/defconfig @@ -53,6 +53,7 @@ CONFIG_ARCH_LEDS=y CONFIG_ARCH_BUTTONS=n CONFIG_ARCH_CALIBRATION=n CONFIG_ARCH_DMA=n +CONFIG_ARCH_FPU=n # # Identify toolchain and linker options @@ -61,7 +62,6 @@ CONFIG_KINETIS_CODESOURCERYW=n CONFIG_KINETIS_CODESOURCERYL=n CONFIG_KINETIS_DEVKITARM=n CONFIG_KINETIS_BUILDROOT=y -CONFIG_KINETIS_DFU=y # # Individual subsystems can be enabled: @@ -205,6 +205,7 @@ CONFIG_SCHED_WORKPRIORITY=192 CONFIG_SCHED_WORKPERIOD=50000 CONFIG_SCHED_WORKSTACKSIZE=1024 CONFIG_SIG_SIGWORK=17 +CONFIG_SCHED_WAITPID=y # # The following can be used to disable categories of diff --git a/nuttx/configs/twr-k60n512/nsh/setenv.sh b/nuttx/configs/twr-k60n512/nsh/setenv.sh index e2725b0c3..f87012126 100644 --- a/nuttx/configs/twr-k60n512/nsh/setenv.sh +++ b/nuttx/configs/twr-k60n512/nsh/setenv.sh @@ -57,5 +57,5 @@ fi export TOOLCHAIN_BIN="${WD}/../misc/buildroot/build_arm_nofpu/staging_dir/bin" # Add the path to the toolchain to the PATH varialble -export PATH="${BUILDROOT_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" echo "PATH : ${PATH}" diff --git a/nuttx/configs/twr-k60n512/ostest/defconfig b/nuttx/configs/twr-k60n512/ostest/defconfig index fecbfd029..ce99f3fa6 100644 --- a/nuttx/configs/twr-k60n512/ostest/defconfig +++ b/nuttx/configs/twr-k60n512/ostest/defconfig @@ -53,6 +53,7 @@ CONFIG_ARCH_LEDS=y CONFIG_ARCH_BUTTONS=n CONFIG_ARCH_CALIBRATION=n CONFIG_ARCH_DMA=n +CONFIG_ARCH_FPU=n # # Identify toolchain and linker options @@ -61,7 +62,6 @@ CONFIG_KINETIS_CODESOURCERYW=n CONFIG_KINETIS_CODESOURCERYL=n CONFIG_KINETIS_DEVKITARM=n CONFIG_KINETIS_BUILDROOT=y -CONFIG_KINETIS_DFU=y # # Individual subsystems can be enabled: diff --git a/nuttx/configs/twr-k60n512/ostest/setenv.sh b/nuttx/configs/twr-k60n512/ostest/setenv.sh index c3cc691ed..8daf1ce39 100644 --- a/nuttx/configs/twr-k60n512/ostest/setenv.sh +++ b/nuttx/configs/twr-k60n512/ostest/setenv.sh @@ -57,5 +57,5 @@ fi export TOOLCHAIN_BIN="${WD}/../misc/buildroot/build_arm_nofpu/staging_dir/bin" # Add the path to the toolchain to the PATH varialble -export PATH="${BUILDROOT_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" echo "PATH : ${PATH}" diff --git a/nuttx/drivers/serial/Kconfig b/nuttx/drivers/serial/Kconfig index 119923a69..29f0cb36f 100644 --- a/nuttx/drivers/serial/Kconfig +++ b/nuttx/drivers/serial/Kconfig @@ -292,6 +292,8 @@ config ARCH_HAVE_UART5 bool config ARCH_HAVE_UART6 bool +config ARCH_HAVE_UART7 + bool config ARCH_HAVE_USART0 bool @@ -307,12 +309,16 @@ config ARCH_HAVE_USART5 bool config ARCH_HAVE_USART6 bool +config ARCH_HAVE_USART7 + bool config MCU_SERIAL bool - default y if ARCH_HAVE_UART || ARCH_HAVE_UART0 || ARCH_HAVE_USART0 || ARCH_HAVE_UART1 || ARCH_HAVE_USART1 || \ - ARCH_HAVE_UART2 || ARCH_HAVE_USART2 || ARCH_HAVE_UART3 || ARCH_HAVE_USART3 || \ - ARCH_HAVE_UART4 || ARCH_HAVE_USART4 || ARCH_HAVE_UART5 || ARCH_HAVE_USART5 || ARCH_HAVE_UART6 || ARCH_HAVE_USART6 + default y if ARCH_HAVE_UART || ARCH_HAVE_UART0 || ARCH_HAVE_USART0 || \ + ARCH_HAVE_UART1 || ARCH_HAVE_USART1 || ARCH_HAVE_UART2 || ARCH_HAVE_USART2 || \ + ARCH_HAVE_UART3 || ARCH_HAVE_USART3 || ARCH_HAVE_UART4 || ARCH_HAVE_USART4 || \ + ARCH_HAVE_UART5 || ARCH_HAVE_USART5 || ARCH_HAVE_UART6 || ARCH_HAVE_USART6 || \ + ARCH_HAVE_UART7 || ARCH_HAVE_USART7 # # Standard serial driver configuration @@ -403,6 +409,14 @@ config USART6_SERIAL_CONSOLE bool "USART6" depends on ARCH_HAVE_USART6 +config UART7_SERIAL_CONSOLE + bool "UART7" + depends on ARCH_HAVE_UART7 + +config USART7_SERIAL_CONSOLE + bool "USART7" + depends on ARCH_HAVE_USART7 + config NO_SERIAL_CONSOLE bool "No serial console" @@ -412,33 +426,33 @@ menu "UART Configuration" depends on ARCH_HAVE_UART config UART_RXBUFSIZE - int "receive buffer size" + int "Receive buffer size" default 256 help Characters are buffered as they are received. This specifies the size of the receive buffer. config UART_TXBUFSIZE - int "transmit buffer size" + int "Trasmitt buffer size" default 256 help Characters are buffered before being sent. This specifies the size of the transmit buffer. config UART_BAUD - int "baud rate" + int "BAUD rate" default 115200 help The configured BAUD of the UART. config UART_BITS - int "character size" + int "Character size" default 8 help The number of bits. Must be either 7 or 8. config UART_PARITY - int "parity setting" + int "Parity setting" default 0 help 0=no parity, 1=odd parity, 2=even parity @@ -455,33 +469,33 @@ menu "UART0 Configuration" depends on ARCH_HAVE_UART0 config UART0_RXBUFSIZE - int "receive buffer size" + int "Receive buffer size" default 256 help Characters are buffered as they are received. This specifies the size of the receive buffer. config UART0_TXBUFSIZE - int "transmit buffer size" + int "Trasmitt buffer size" default 256 help Characters are buffered before being sent. This specifies the size of the transmit buffer. config UART0_BAUD - int "baud rate" + int "BAUD rate" default 115200 help The configured BAUD of the UART. config UART0_BITS - int "character size" + int "Character size" default 8 help The number of bits. Must be either 7 or 8. config UART0_PARITY - int "parity setting" + int "Parity setting" default 0 help 0=no parity, 1=odd parity, 2=even parity @@ -498,33 +512,33 @@ menu "USART0 Configuration" depends on ARCH_HAVE_USART0 config USART0_RXBUFSIZE - int "receive buffer size" + int "Receive buffer size" default 256 help Characters are buffered as they are received. This specifies the size of the receive buffer. config USART0_TXBUFSIZE - int "transmit buffer size" + int "Trasmitt buffer size" default 256 help Characters are buffered before being sent. This specifies the size of the transmit buffer. config USART0_BAUD - int "baud rate" + int "BAUD rate" default 115200 help The configured BAUD of the USART. config USART0_BITS - int "character size" + int "Character size" default 8 help The number of bits. Must be either 7 or 8. config USART0_PARITY - int "parity setting" + int "Parity setting" default 0 help 0=no parity, 1=odd parity, 2=even parity @@ -541,39 +555,39 @@ menu "UART1 Configuration" depends on ARCH_HAVE_UART1 config UART1_RXBUFSIZE - int "receive buffer size" + int "Receive buffer size" default 256 help Characters are buffered as they are received. This specifies the size of the receive buffer. config UART1_TXBUFSIZE - int "transmit buffer size" + int "Trasmitt buffer size" default 256 help Characters are buffered before being sent. This specifies the size of the transmit buffer. config UART1_BAUD - int "baud rate" + int "BAUD rate" default 115200 help The configured BAUD of the UART. config UART1_BITS - int "character size" + int "Character size" default 8 help The number of bits. Must be either 7 or 8. config UART1_PARITY - int "parity setting" + int "Parity setting" default 0 help 0=no parity, 1=odd parity, 2=even parity config UART1_2STOP - int "uses 2 stop bits" + int "Uses 2 stop bits" default 0 help 1=Two stop bits @@ -584,39 +598,39 @@ menu "USART1 Configuration" depends on ARCH_HAVE_USART1 config USART1_RXBUFSIZE - int "receive buffer size" + int "Receive buffer size" default 256 help Characters are buffered as they are received. This specifies the size of the receive buffer. config USART1_TXBUFSIZE - int "transmit buffer size" + int "Trasmitt buffer size" default 256 help Characters are buffered before being sent. This specifies the size of the transmit buffer. config USART1_BAUD - int "baud rate" + int "BAUD rate" default 115200 help The configured BAUD of the USART. config USART1_BITS - int "character size" + int "Character size" default 8 help The number of bits. Must be either 7 or 8. config USART1_PARITY - int "parity setting" + int "Parity setting" default 0 help 0=no parity, 1=odd parity, 2=even parity config USART1_2STOP - int "uses 2 stop bits" + int "Uses 2 stop bits" default 0 help 1=Two stop bits @@ -627,39 +641,39 @@ menu "UART2 Configuration" depends on ARCH_HAVE_UART2 config UART2_RXBUFSIZE - int "receive buffer size" + int "Receive buffer size" default 256 help Characters are buffered as they are received. This specifies the size of the receive buffer. config UART2_TXBUFSIZE - int "transmit buffer size" + int "Trasmitt buffer size" default 256 help Characters are buffered before being sent. This specifies the size of the transmit buffer. config UART2_BAUD - int "baud rate" + int "BAUD rate" default 115200 help The configured BAUD of the UART. config UART2_BITS - int "character size" + int "Character size" default 8 help The number of bits. Must be either 7 or 8. config UART2_PARITY - int "parity setting" + int "Parity setting" default 0 help 0=no parity, 1=odd parity, 2=even parity config UART2_2STOP - int "uses 2 stop bits" + int "Uses 2 stop bits" default 0 help 1=Two stop bits @@ -670,39 +684,39 @@ menu "USART2 Configuration" depends on ARCH_HAVE_USART2 config USART2_RXBUFSIZE - int "receive buffer size" + int "Receive buffer size" default 256 help Characters are buffered as they are received. This specifies the size of the receive buffer. config USART2_TXBUFSIZE - int "transmit buffer size" + int "Trasmitt buffer size" default 256 help Characters are buffered before being sent. This specifies the size of the transmit buffer. config USART2_BAUD - int "baud rate" + int "BAUD rate" default 115200 help The configured BAUD of the USART. config USART2_BITS - int "character size" + int "Character size" default 8 help The number of bits. Must be either 7 or 8. config USART2_PARITY - int "parity setting" + int "Parity setting" default 0 help 0=no parity, 1=odd parity, 2=even parity config USART2_2STOP - int "uses 2 stop bits" + int "Uses 2 stop bits" default 0 help 1=Two stop bits @@ -713,39 +727,39 @@ menu "UART3 Configuration" depends on ARCH_HAVE_UART3 config UART3_RXBUFSIZE - int "receive buffer size" + int "Receive buffer size" default 256 help Characters are buffered as they are received. This specifies the size of the receive buffer. config UART3_TXBUFSIZE - int "transmit buffer size" + int "Trasmitt buffer size" default 256 help Characters are buffered before being sent. This specifies the size of the transmit buffer. config UART3_BAUD - int "baud rate" + int "BAUD rate" default 115200 help The configured BAUD of the UART. config UART3_BITS - int "character size" + int "Character size" default 8 help The number of bits. Must be either 7 or 8. config UART3_PARITY - int "parity setting" + int "Parity setting" default 0 help 0=no parity, 1=odd parity, 2=even parity config UART3_2STOP - int "uses 2 stop bits" + int "Uses 2 stop bits" default 0 help 1=Two stop bits @@ -756,39 +770,39 @@ menu "USART3 Configuration" depends on ARCH_HAVE_USART3 config USART3_RXBUFSIZE - int "receive buffer size" + int "Receive buffer size" default 256 help Characters are buffered as they are received. This specifies the size of the receive buffer. config USART3_TXBUFSIZE - int "transmit buffer size" + int "Trasmitt buffer size" default 256 help Characters are buffered before being sent. This specifies the size of the transmit buffer. config USART3_BAUD - int "baud rate" + int "BAUD rate" default 115200 help The configured BAUD of the USART. config USART3_BITS - int "character size" + int "Character size" default 8 help The number of bits. Must be either 7 or 8. config USART3_PARITY - int "parity setting" + int "Parity setting" default 0 help 0=no parity, 1=odd parity, 2=even parity config USART3_2STOP - int "uses 2 stop bits" + int "Uses 2 stop bits" default 0 help 1=Two stop bits @@ -799,39 +813,39 @@ menu "UART4 Configuration" depends on ARCH_HAVE_UART4 config UART4_RXBUFSIZE - int "receive buffer size" + int "Receive buffer size" default 256 help Characters are buffered as they are received. This specifies the size of the receive buffer. config UART4_TXBUFSIZE - int "transmit buffer size" + int "Trasmitt buffer size" default 256 help Characters are buffered before being sent. This specifies the size of the transmit buffer. config UART4_BAUD - int "baud rate" + int "BAUD rate" default 115200 help The configured BAUD of the UART. config UART4_BITS - int "character size" + int "Character size" default 8 help The number of bits. Must be either 7 or 8. config UART4_PARITY - int "parity setting" + int "Parity setting" default 0 help 0=no parity, 1=odd parity, 2=even parity config UART4_2STOP - int "uses 2 stop bits" + int "Uses 2 stop bits" default 0 help 1=Two stop bits @@ -842,39 +856,39 @@ menu "USART4 Configuration" depends on ARCH_HAVE_USART4 config USART4_RXBUFSIZE - int "receive buffer size" + int "Receive buffer size" default 256 help Characters are buffered as they are received. This specifies the size of the receive buffer. config USART4_TXBUFSIZE - int "transmit buffer size" + int "Trasmitt buffer size" default 256 help Characters are buffered before being sent. This specifies the size of the transmit buffer. config USART4_BAUD - int "baud rate" + int "BAUD rate" default 115200 help The configured BAUD of the USART. config USART4_BITS - int "character size" + int "Character size" default 8 help The number of bits. Must be either 7 or 8. config USART4_PARITY - int "parity setting" + int "Parity setting" default 0 help 0=no parity, 1=odd parity, 2=even parity config USART4_2STOP - int "uses 2 stop bits" + int "Uses 2 stop bits" default 0 help 1=Two stop bits @@ -885,39 +899,39 @@ menu "UART5 Configuration" depends on ARCH_HAVE_UART5 config UART5_RXBUFSIZE - int "receive buffer size" + int "Receive buffer size" default 256 help Characters are buffered as they are received. This specifies the size of the receive buffer. config UART5_TXBUFSIZE - int "transmit buffer size" + int "Trasmitt buffer size" default 256 help Characters are buffered before being sent. This specifies the size of the transmit buffer. config UART5_BAUD - int "baud rate" + int "BAUD rate" default 115200 help The configured BAUD of the UART. config UART5_BITS - int "character size" + int "Character size" default 8 help The number of bits. Must be either 7 or 8. config UART5_PARITY - int "parity setting" + int "Parity setting" default 0 help 0=no parity, 1=odd parity, 2=even parity config UART5_2STOP - int "uses 2 stop bits" + int "Uses 2 stop bits" default 0 help 1=Two stop bits @@ -928,39 +942,39 @@ menu "USART5 Configuration" depends on ARCH_HAVE_USART5 config USART5_RXBUFSIZE - int "receive buffer size" + int "Receive buffer size" default 256 help Characters are buffered as they are received. This specifies the size of the receive buffer. config USART5_TXBUFSIZE - int "transmit buffer size" + int "Trasmitt buffer size" default 256 help Characters are buffered before being sent. This specifies the size of the transmit buffer. config USART5_BAUD - int "baud rate" + int "BAUD rate" default 115200 help The configured BAUD of the USART. config USART5_BITS - int "character size" + int "Character size" default 8 help The number of bits. Must be either 7 or 8. config USART5_PARITY - int "parity setting" + int "Parity setting" default 0 help 0=no parity, 1=odd parity, 2=even parity config USART5_2STOP - int "uses 2 stop bits" + int "Uses 2 stop bits" default 0 help 1=Two stop bits @@ -971,39 +985,39 @@ menu "USART6 Configuration" depends on ARCH_HAVE_USART6 config USART6_RXBUFSIZE - int "receive buffer size" + int "Receive buffer size" default 256 help Characters are buffered as they are received. This specifies the size of the receive buffer. config USART6_TXBUFSIZE - int "transmit buffer size" + int "Trasmitt buffer size" default 256 help Characters are buffered before being sent. This specifies the size of the transmit buffer. config USART6_BAUD - int "baud rate" + int "BAUD rate" default 115200 help The configured BAUD of the USART. config USART6_BITS - int "character size" + int "Character size" default 8 help The number of bits. Must be either 7 or 8. config USART6_PARITY - int "parity setting" + int "Parity setting" default 0 help 0=no parity, 1=odd parity, 2=even parity config USART6_2STOP - int "uses 2 stop bits" + int "Uses 2 stop bits" default 0 help 1=Two stop bits @@ -1014,39 +1028,125 @@ menu "UART6 Configuration" depends on ARCH_HAVE_UART6 config UART6_RXBUFSIZE - int "receive buffer size" + int "Receive buffer size" default 256 help Characters are buffered as they are received. This specifies the size of the receive buffer. config UART6_TXBUFSIZE - int "transmit buffer size" + int "Trasmitt buffer size" default 256 help Characters are buffered before being sent. This specifies the size of the transmit buffer. config UART6_BAUD - int "baud rate" + int "BAUD rate" default 115200 help The configured BAUD of the UART. config UART6_BITS - int "character size" + int "Character size" default 8 help The number of bits. Must be either 7 or 8. config UART6_PARITY - int "parity setting" + int "Parity setting" default 0 help 0=no parity, 1=odd parity, 2=even parity config UART6_2STOP - int "uses 2 stop bits" + int "Uses 2 stop bits" + default 0 + help + 1=Two stop bits + +endmenu + +menu "USART7 Configuration" + depends on ARCH_HAVE_USART7 + +config USART7_RXBUFSIZE + int "Receive buffer size" + default 256 + help + Characters are buffered as they are received. This specifies + the size of the receive buffer. + +config USART7_TXBUFSIZE + int "Trasmitt buffer size" + default 256 + help + Characters are buffered before being sent. This specifies + the size of the transmit buffer. + +config USART7_BAUD + int "BAUD rate" + default 115200 + help + The configured BAUD of the USART. + +config USART7_BITS + int "Character size" + default 8 + help + The number of bits. Must be either 7 or 8. + +config USART7_PARITY + int "Parity setting" + default 0 + help + 0=no parity, 1=odd parity, 2=even parity + +config USART7_2STOP + int "Uses 2 stop bits" + default 0 + help + 1=Two stop bits + +endmenu + +menu "UART7 Configuration" + depends on ARCH_HAVE_UART7 + +config UART7_RXBUFSIZE + int "Receive buffer size" + default 256 + help + Characters are buffered as they are received. This specifies + the size of the receive buffer. + +config UART7_TXBUFSIZE + int "Trasmitt buffer size" + default 256 + help + Characters are buffered before being sent. This specifies + the size of the transmit buffer. + +config UART7_BAUD + int "BAUD rate" + default 115200 + help + The configured BAUD of the UART. + +config UART7_BITS + int "Character size" + default 8 + help + The number of bits. Must be either 7 or 8. + +config UART7_PARITY + int "Parity setting" + default 0 + help + 0=no parity, 1=odd parity, 2=even parity + +config UART7_2STOP + int "Uses 2 stop bits" default 0 help 1=Two stop bits diff --git a/nuttx/include/nuttx/compiler.h b/nuttx/include/nuttx/compiler.h index 091e66765..1e6acd6ff 100644 --- a/nuttx/include/nuttx/compiler.h +++ b/nuttx/include/nuttx/compiler.h @@ -1,7 +1,7 @@ /**************************************************************************** * include/nuttx/compiler.h * - * Copyright (C) 2007-2009, 2012 Gregory Nutt. All rights reserved. + * Copyright (C) 2007-2009, 2012-2013 Gregory Nutt. All rights reserved. * Author: Gregory Nutt <gnutt@nuttx.org> * * Redistribution and use in source and binary forms, with or without @@ -81,6 +81,12 @@ # define noreturn_function __attribute__ ((noreturn)) +/* The farcall_function attribute informs GCC that is should use long calls + * (even though -mlong-calls does not appear in the compilation options) + */ + +# define farcall_function __attribute__ ((long_call)) + /* The packed attribute informs GCC that the stucture elements are packed, * ignoring other alignment rules. */ @@ -239,6 +245,10 @@ # define noreturn_function # define packed_struct +/* REVISIT: */ + +# define farcall_function + /* SDCC does support "naked" functions */ # define naked_function __naked @@ -350,6 +360,10 @@ # define inline_function # define noinline_function +/* REVISIT: */ + +# define farcall_function + /* The Zilog compiler does not support the reentrant attribute */ # define reentrant_function @@ -429,6 +443,7 @@ # define weak_function # define weak_const_function # define noreturn_function +# define farcall_function # define packed_struct # define reentrant_function # define naked_function diff --git a/nuttx/net/Kconfig b/nuttx/net/Kconfig index 6a084914f..bb60f7ecb 100644 --- a/nuttx/net/Kconfig +++ b/nuttx/net/Kconfig @@ -56,6 +56,13 @@ config NET_MULTIBUFFER Or, as another example, the driver may support queuing of concurrent input/ouput and output transfers for better performance. +config NET_PROMISCUOUS + bool "Promiscuous mode" + default n + ---help--- + Force the Ethernet driver to operate in promiscuous mode (if supported + by the Ethernet driver). + config NET_IPv6 bool "IPv6" default n |