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authorpatacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3>2010-08-18 16:15:37 +0000
committerpatacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3>2010-08-18 16:15:37 +0000
commit5108d752020325f3bcd1dff3b4118e347b4c1922 (patch)
treebfae153e4f564f77c94c52039cf5794608652aad
parent97cd33bd846d3955b5179222310a04848a82f917 (diff)
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git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@2865 42af7a65-404d-4744-a932-0658087f49c3
-rw-r--r--nuttx/arch/arm/src/arm/up_head.S55
-rwxr-xr-xnuttx/arch/arm/src/lpc313x/lpc313x_boot.c2
2 files changed, 45 insertions, 12 deletions
diff --git a/nuttx/arch/arm/src/arm/up_head.S b/nuttx/arch/arm/src/arm/up_head.S
index c3965995b..57bce742c 100644
--- a/nuttx/arch/arm/src/arm/up_head.S
+++ b/nuttx/arch/arm/src/arm/up_head.S
@@ -164,26 +164,30 @@ __start:
teq r0, r2
bne .Lpgtableclear
- /* Create identity mapping for first MB section to support this startup
- * logic executing out of the physical address space. This identity
- * mapping will be removed by .Lvstart (see below).
+ /* Create identity mapping for first MB of the .text section to support
+ * this startup logic executing out of the physical address space. This
+ * identity mapping will be removed by .Lvstart (see below).
*/
-
+#warning "We need to do things differently here if the .text region is smaller or if CONFIG_PAGING"
mksection r0, r4 /* r0=phys. base section */
ldr r1, .LCmmuflags /* FLGS=MMU_MEMFLAGS */
add r3, r1, r0 /* r3=flags + base */
str r3, [r4, r0, lsr #18] /* identity mapping */
- /* Create a "normal" single section mapping for the first
- * MB of memory. Now, we have the first 1MB mapping to
- * both phyical and virtual addresses. The reset of the
- * SDRAM mapping will be completed in .Lvstart once we have
- * moved the physical mapping out of the way.
+ /* Create a virtual single section mapping for the first MB of the .text
+ * address space. Now, we have the first 1MB mapping to both phyical and
+ * virtual addresses. The rest of the .text mapping will be completed in
+ * .Lvstart once we have moved the physical mapping out of the way.
*/
ldr r2, .LCvpgtable /* r2=virt. page table */
mksection r0, r2 /* r0=virt. base section */
str r3, [r4, r0, lsr #18] /* identity mapping */
+
+ /* NOTE: No .data/.bss access should be attempted. This temporary mapping
+ * can only be assumed to cover the initial .text region.
+ */
+
#endif /* CONFIG_ARCH_ROMPGTABLE */
/* The following logic will set up the ARM920/ARM926 for normal operation */
@@ -316,7 +320,10 @@ __start:
.type .Lvstart, %function
.Lvstart:
- /* Remove the temporary null mapping */
+ /* Remove the temporary mapping. The following assumes that the
+ * total RAM size is > 1Mb and extends that initial mapping to
+ * cover additinal RAM sections.
+ */
#ifndef CONFIG_ARCH_ROMPGTABLE
ldr r4, .LCvpgtable /* r4=virtual page table */
@@ -328,7 +335,7 @@ __start:
/* Now setup the pagetables for our normal SDRAM mappings mapped region.
* We round NUTTX_START_VADDR down to the nearest megabyte boundary.
*/
-
+#warning "We need to do things differently here if the .text region is smaller or if CONFIG_PAGING"
ldr r1, .LCmmuflags /* FLGS=MMU_MEMFLAGS */
add r3, r3, r1 /* r3=flags + base */
@@ -347,6 +354,19 @@ __start:
add r3, r3, #SECTION_SIZE
str r3, [r0], #4
.endr
+
+ /* If we are executing from RAM with a fixed page configuration, then
+ * we can assume that the above contiguous mapping included all of the
+ * .text, .data, .bss, heap, etc. But if we are executing from FLASH,
+ * then the RAM area is probably in a separate physical address region
+ * and will require a separate mapping. Or, if we are supporting on-demand
+ * paging of the .text region, then the RAM-based .data/.bss/heap section
+ * will still probably be located in a separate (virtual) address region.
+ */
+
+#if defined(CONFIG_BOOT_RUNFROMFLASH) || defined(CONFIG_PAGING)
+# error "Logic not implemented"
+#endif
#endif /* CONFIG_ARCH_ROMPGTABLE */
/* Zero BSS and set up the stack pointer */
@@ -363,6 +383,19 @@ __start:
strcc fp, [r0],#4
bcc .Lbssinit
+ /* If the .data section is in a separate, unitialized address space,
+ * then we will also need to copy the initial values of of the .data
+ * section from the .text region into that .data region. This would
+ * be the case if we are executing from FLASH and the .data section
+ * lies in a different physical address region OR if we are support
+ * on-demand paging and the .data section lies in a different virtual
+ * address region.
+ */
+
+#if defined(CONFIG_BOOT_RUNFROMFLASH) || defined(CONFIG_PAGING)
+# error "Logic not implemented"
+#endif
+
/* Perform early C-level, platform-specific initialization */
bl up_boot
diff --git a/nuttx/arch/arm/src/lpc313x/lpc313x_boot.c b/nuttx/arch/arm/src/lpc313x/lpc313x_boot.c
index cc4a89f44..31f66b060 100755
--- a/nuttx/arch/arm/src/lpc313x/lpc313x_boot.c
+++ b/nuttx/arch/arm/src/lpc313x/lpc313x_boot.c
@@ -269,7 +269,7 @@ static void up_copyvectorblock(void)
void up_boot(void)
{
- /* __start provided the basic MMU mappings for SDRAM. Now provide mappings for all
+ /* __start provided the basic MMU mappings for SRAM. Now provide mappings for all
* IO regions (Including the vector region).
*/