For STM32 F3, need to use ICR register to clear some U[S]ART interrupts

git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5632 42af7a65-404d-4744-a932-0658087f49c3

2 files changed, 74 insertions, 49 deletions

diff --git a/nuttx/arch/arm/src/stm32/chip/stm32f30xxx_uart.h b/nuttx/arch/arm/src/stm32/chip/stm32f30xxx_uart.h
index c6ed0ec9c..9a55a921a 100644
--- a/nuttx/arch/arm/src/stm32/chip/stm32f30xxx_uart.h
+++ b/nuttx/arch/arm/src/stm32/chip/stm32f30xxx_uart.h
@@ -167,7 +167,9 @@
 #define USART_CR1_RTOIE           (1 << 26) /* Bit 26: Receiver timeout interrupt enable */
 #define USART_CR1_EOBIE           (1 << 27) /* Bit 27: End of Block interrupt enable */
 
-#define USART_CR1_ALLINTS         (USART_CR1_IDLEIE|USART_CR1_RXNEIE|USART_CR1_TCIE|USART_CR1_TXEIE|USART_CR1_PEIE|USART_CR1_CMIE|USART_CR1_RTOIE|USART_CR1_EOBIE)
+#define USART_CR1_ALLINTS \
+  (USART_CR1_IDLEIE | USART_CR1_RXNEIE | USART_CR1_TCIE | USART_CR1_TXEIE |\
+   USART_CR1_PEIE | USART_CR1_CMIE |USART_CR1_RTOIE | USART_CR1_EOBIE)
 
 /* Control register 2 */
 
@@ -289,17 +291,31 @@
 #define USART_ISR_ALLBITS         (0x007fdfff)
 
 /* Interrupt flag clear register */
-#define USART_ICR_
+
+#define USART_ICR_PECF            (1 << 0)  /* Bit 0:  Parity error clear flag */
+#define USART_ICR_FECF            (1 << 1)  /* Bit 1:  Framing error clear flag */
+#define USART_ICR_NCF             (1 << 2)  /* Bit 2:  Noise detected flag *clear flag */
+#define USART_ICR_ORECF           (1 << 3)  /* Bit 3:  Overrun error clear flag */
+#define USART_ICR_IDLECF          (1 << 4)  /* Bit 4:  Idle line detected clear flag */
+#define USART_ICR_TCCF            (1 << 6)  /* Bit 6:  Transmission complete */
+#define USART_ICR_LBDCF           (1 << 8)  /* Bit 8:  LIN break detection clear flag */
+#define USART_ICR_CTSCF           (1 << 9)  /* Bit 9:  CTS interrupt clear flag */
+#define USART_ICR_RTOCF           (1 << 11) /* Bit 11: Receiver timeout clear flag */
+#define USART_ICR_EOBCF           (1 << 12) /* Bit 12: End of block clear flag */
+#define USART_ICR_CMCF            (1 << 17) /* Bit 17: Character match clear flag */
+#define USART_ICR_WUCF            (1 << 20) /* Bit 20: Wakeup from Stop mode clear flag */
+
+#define USART_ICR_ALLBITS         (0x00121b5f)
+
 /* Receive data register */
-#define USART_RDR_
-/* Transmit data register */
-#define USART_TDR_
 
+#define USART_RDR_SHIFT           (0)       /* Bits 8:0: Receive data value */
+#define USART_RDR_MASK            (0x1ff << USART_RDR_SHIFT)
 
-/* Data register */
+/* Transmit data register */
 
-#define USART_DR_SHIFT            (0)       /* Bits 8:0: Data value */
-#define USART_DR_MASK             (0xff << USART_DR_SHIFT)
+#define USART_TDR_SHIFT           (0)       /* Bits 8:0: Transmit data value */
+#define USART_TDR_MASK            (0x1ff << USART_TDR_SHIFT)
 
 /* Compatibility definitions ********************************************************/
 /* F1/F2/F4 Status register */
diff --git a/nuttx/arch/arm/src/stm32/stm32_serial.c b/nuttx/arch/arm/src/stm32/stm32_serial.c
index 30cc4f056..18e65f1d9 100644
--- a/nuttx/arch/arm/src/stm32/stm32_serial.c
+++ b/nuttx/arch/arm/src/stm32/stm32_serial.c
@@ -876,20 +876,20 @@ static inline void up_disableusartint(struct up_dev_s *priv, uint16_t *ie)
 
       /* USART interrupts:
        *
-       * Enable             Bit Status          Meaning                        Usage
-       * ------------------ --- --------------- ------------------------------ ----------
-       * USART_CR1_IDLEIE    4  USART_SR_IDLE   Idle Line Detected             (not used)
-       * USART_CR1_RXNEIE    5  USART_SR_RXNE   Received Data Ready to be Read
-       * "              "       USART_SR_ORE    Overrun Error Detected
-       * USART_CR1_TCIE      6  USART_SR_TC     Transmission Complete          (used only for RS-485)
-       * USART_CR1_TXEIE     7  USART_SR_TXE    Transmit Data Register Empty
-       * USART_CR1_PEIE      8  USART_SR_PE     Parity Error
+       * Enable             Status          Meaning                        Usage
+       * ------------------ --------------- ------------------------------ ----------
+       * USART_CR1_IDLEIE   USART_SR_IDLE   Idle Line Detected             (not used)
+       * USART_CR1_RXNEIE   USART_SR_RXNE   Received Data Ready to be Read
+       * "              "   USART_SR_ORE    Overrun Error Detected
+       * USART_CR1_TCIE     USART_SR_TC     Transmission Complete          (used only for RS-485)
+       * USART_CR1_TXEIE    USART_SR_TXE    Transmit Data Register Empty
+       * USART_CR1_PEIE     USART_SR_PE     Parity Error
        *
-       * USART_CR2_LBDIE     6  USART_SR_LBD    Break Flag                     (not used)
-       * USART_CR3_EIE       0  USART_SR_FE     Framing Error
-       * "           "          USART_SR_NE     Noise Error
-       * "           "          USART_SR_ORE    Overrun Error Detected
-       * USART_CR3_CTSIE    10  USART_SR_CTS    CTS flag                       (not used)
+       * USART_CR2_LBDIE    USART_SR_LBD    Break Flag                     (not used)
+       * USART_CR3_EIE      USART_SR_FE     Framing Error
+       * "           "      USART_SR_NE     Noise Error
+       * "           "      USART_SR_ORE    Overrun Error Detected
+       * USART_CR3_CTSIE    USART_SR_CTS    CTS flag                       (not used)
        */
 
       cr1 = up_serialin(priv, STM32_USART_CR1_OFFSET);
@@ -1354,20 +1354,20 @@ static int up_interrupt_common(struct up_dev_s *priv)
 
       /* USART interrupts:
        *
-       * Enable             Bit Status          Meaning                         Usage
-       * ------------------ --- --------------- ------------------------------- ----------
-       * USART_CR1_IDLEIE    4  USART_SR_IDLE   Idle Line Detected              (not used)
-       * USART_CR1_RXNEIE    5  USART_SR_RXNE   Received Data Ready to be Read
-       * "              "       USART_SR_ORE    Overrun Error Detected
-       * USART_CR1_TCIE      6  USART_SR_TC     Transmission Complete           (used only for RS-485)
-       * USART_CR1_TXEIE     7  USART_SR_TXE    Transmit Data Register Empty
-       * USART_CR1_PEIE      8  USART_SR_PE     Parity Error
+       * Enable             Status          Meaning                         Usage
+       * ------------------ --------------- ------------------------------- ----------
+       * USART_CR1_IDLEIE   USART_SR_IDLE   Idle Line Detected              (not used)
+       * USART_CR1_RXNEIE   USART_SR_RXNE   Received Data Ready to be Read
+       * "              "   USART_SR_ORE    Overrun Error Detected
+       * USART_CR1_TCIE     USART_SR_TC     Transmission Complete           (used only for RS-485)
+       * USART_CR1_TXEIE    USART_SR_TXE    Transmit Data Register Empty
+       * USART_CR1_PEIE     USART_SR_PE     Parity Error
        *
-       * USART_CR2_LBDIE     6  USART_SR_LBD    Break Flag                      (not used)
-       * USART_CR3_EIE       0  USART_SR_FE     Framing Error
-       * "           "          USART_SR_NE     Noise Error
-       * "           "          USART_SR_ORE    Overrun Error Detected
-       * USART_CR3_CTSIE    10  USART_SR_CTS    CTS flag                        (not used)
+       * USART_CR2_LBDIE    USART_SR_LBD    Break Flag                      (not used)
+       * USART_CR3_EIE      USART_SR_FE     Framing Error
+       * "           "      USART_SR_NE     Noise Error
+       * "           "      USART_SR_ORE    Overrun Error Detected
+       * USART_CR3_CTSIE    USART_SR_CTS    CTS flag                        (not used)
        *
        * NOTE: Some of these status bits must be cleared by explicity writing zero
        * to the SR register: USART_SR_CTS, USART_SR_LBD. Note of those are currently
@@ -1407,6 +1407,14 @@ static int up_interrupt_common(struct up_dev_s *priv)
 
       else if ((priv->sr & (USART_SR_ORE | USART_SR_NE | USART_SR_FE)) != 0)
         {
+#ifdef CONFIG_STM32_STM32F30XX
+          /* These errors are cleared by writing the corresponding bit to the
+           * interrupt clear register (ICR).
+           */
+
+          up_serialout(priv, STM32_USART_ICR_OFFSET,
+                      (USART_ICR_NCF | USART_ICR_ORECF | USART_ICR_FECF));
+#else
           /* If an error occurs, read from DR to clear the error (data has
            * been lost).  If ORE is set along with RXNE then it tells you
            * that the byte *after* the one in the data register has been
@@ -1416,6 +1424,7 @@ static int up_interrupt_common(struct up_dev_s *priv)
            */
 
           (void)up_serialin(priv, STM32_USART_RDR_OFFSET);
+#endif
         }
 
       /* Handle outgoing, transmit bytes */
@@ -1608,17 +1617,17 @@ static void up_rxint(struct uart_dev_s *dev, bool enable)
 
   /* USART receive interrupts:
    *
-   * Enable             Bit Status          Meaning                         Usage
-   * ------------------ --- --------------- ------------------------------- ----------
-   * USART_CR1_IDLEIE    4  USART_SR_IDLE   Idle Line Detected              (not used)
-   * USART_CR1_RXNEIE    5  USART_SR_RXNE   Received Data Ready to be Read
-   * "              "       USART_SR_ORE    Overrun Error Detected
-   * USART_CR1_PEIE      8  USART_SR_PE     Parity Error
+   * Enable             Status          Meaning                         Usage
+   * ------------------ --------------- ------------------------------- ----------
+   * USART_CR1_IDLEIE   USART_SR_IDLE   Idle Line Detected              (not used)
+   * USART_CR1_RXNEIE   USART_SR_RXNE   Received Data Ready to be Read
+   * "              "   USART_SR_ORE    Overrun Error Detected
+   * USART_CR1_PEIE     USART_SR_PE     Parity Error
    *
-   * USART_CR2_LBDIE     6  USART_SR_LBD    Break Flag                      (not used)
-   * USART_CR3_EIE       0  USART_SR_FE     Framing Error
-   * "           "          USART_SR_NE     Noise Error
-   * "           "          USART_SR_ORE    Overrun Error Detected
+   * USART_CR2_LBDIE    USART_SR_LBD    Break Flag                      (not used)
+   * USART_CR3_EIE      USART_SR_FE     Framing Error
+   * "           "      USART_SR_NE     Noise Error
+   * "           "      USART_SR_ORE    Overrun Error Detected
    */
 
   flags = irqsave();
@@ -1775,11 +1784,11 @@ static void up_txint(struct uart_dev_s *dev, bool enable)
 
   /* USART transmit interrupts:
    *
-   * Enable             Bit Status          Meaning                      Usage
-   * ------------------ --- --------------- ---------------------------- ----------
-   * USART_CR1_TCIE      6  USART_SR_TC     Transmission Complete        (used only for RS-485)
-   * USART_CR1_TXEIE     7  USART_SR_TXE    Transmit Data Register Empty
-   * USART_CR3_CTSIE    10  USART_SR_CTS    CTS flag                     (not used)
+   * Enable             Status          Meaning                      Usage
+   * ------------------ --------------- ---------------------------- ----------
+   * USART_CR1_TCIE     USART_SR_TC     Transmission Complete        (used only for RS-485)
+   * USART_CR1_TXEIE    USART_SR_TXE    Transmit Data Register Empty
+   * USART_CR3_CTSIE    USART_SR_CTS    CTS flag                     (not used)
    */
 
   flags = irqsave();