Add LPC1788 EMC initialization logic

git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5645 42af7a65-404d-4744-a932-0658087f49c3

8 files changed, 789 insertions, 21 deletions

diff --git a/nuttx/arch/arm/src/lpc17xx/Kconfig b/nuttx/arch/arm/src/lpc17xx/Kconfig
index 22ba6fa04..3d4c8b4e5 100644
--- a/nuttx/arch/arm/src/lpc17xx/Kconfig
+++ b/nuttx/arch/arm/src/lpc17xx/Kconfig
@@ -130,6 +130,11 @@ config LPC17_PLL1
 	bool "PLL1"
 	default y
 
+config LPC17_EMC
+	bool "PLL1"
+	default y
+	depends on ARCH_FAMILY_LPC178X
+
 config LPC17_ETHERNET
 	bool "Ethernet"
 	select NET
diff --git a/nuttx/arch/arm/src/lpc17xx/Make.defs b/nuttx/arch/arm/src/lpc17xx/Make.defs
index 20e016de9..e89a25641 100644
--- a/nuttx/arch/arm/src/lpc17xx/Make.defs
+++ b/nuttx/arch/arm/src/lpc17xx/Make.defs
@@ -91,6 +91,10 @@ ifeq ($(CONFIG_ARMV7M_CMNVECTOR),y)
 CHIP_ASRCS += lpc17_vectors.S
 endif
 
+ifeq ($(CONFIG_LPC17_EMC),y)
+CHIP_CSRCS += lpc17_emc.c
+endif
+
 ifeq ($(CONFIG_GPIO_IRQ),y)
 CHIP_CSRCS += lpc17_gpioint.c
 endif
diff --git a/nuttx/arch/arm/src/lpc17xx/chip/lpc178x_pinconfig.h b/nuttx/arch/arm/src/lpc17xx/chip/lpc178x_pinconfig.h
index 58bd413ea..887aa0a9f 100644
--- a/nuttx/arch/arm/src/lpc17xx/chip/lpc178x_pinconfig.h
+++ b/nuttx/arch/arm/src/lpc17xx/chip/lpc178x_pinconfig.h
@@ -483,9 +483,9 @@
 #define GPIO_I2C2_SDA_3    (GPIO_ALT2 | GPIO_PULLUP | GPIO_PORT2 | GPIO_PIN30)
 #define GPIO_MAT3p2_2      (GPIO_ALT3 | GPIO_PULLUP | GPIO_PORT2 | GPIO_PIN30)
 
-#define GPIO_EMC_DQM3      (GPIO_ALT1 | GPIO_PULLUP | GPIO_PORT2 | GPIO_PIN30)
-#define GPIO_I2C2_SCL_2    (GPIO_ALT2 | GPIO_PULLUP | GPIO_PORT2 | GPIO_PIN30)
-#define GPIO_MAT3p3_2      (GPIO_ALT3 | GPIO_PULLUP | GPIO_PORT2 | GPIO_PIN30)
+#define GPIO_EMC_DQM3      (GPIO_ALT1 | GPIO_PULLUP | GPIO_PORT2 | GPIO_PIN31)
+#define GPIO_I2C2_SCL_2    (GPIO_ALT2 | GPIO_PULLUP | GPIO_PORT2 | GPIO_PIN31)
+#define GPIO_MAT3p3_2      (GPIO_ALT3 | GPIO_PULLUP | GPIO_PORT2 | GPIO_PIN31)
 
 #define GPIO_EMC_D0        (GPIO_ALT1 | GPIO_PULLUP | GPIO_PORT3 | GPIO_PIN0)
 #define GPIO_EMC_D1        (GPIO_ALT1 | GPIO_PULLUP | GPIO_PORT3 | GPIO_PIN1)
diff --git a/nuttx/arch/arm/src/lpc17xx/chip/lpc178x_syscon.h b/nuttx/arch/arm/src/lpc17xx/chip/lpc178x_syscon.h
index 5aafce7a6..dc272528d 100644
--- a/nuttx/arch/arm/src/lpc17xx/chip/lpc178x_syscon.h
+++ b/nuttx/arch/arm/src/lpc17xx/chip/lpc178x_syscon.h
@@ -349,7 +349,7 @@
 
 #define SYSCON_LCDCFG_CLKDIV_SHIFT       (0) /* Bits 0-4: LCD Panel clock prescaler  */
 #define SYSCON_LCDCFG_CLKDIV_MASK        (0x1f << SYSCON_LCDCFG_CLKDIV_SHIFT)
-#define SYSCON_LCDCFG_CLKDIV(n)          ((n+1) << SYSCON_LCDCFG_CLKDIV_SHIFT) /* n = 0 - 31 */
+#define SYSCON_LCDCFG_CLKDIV(n)          ((n-1) << SYSCON_LCDCFG_CLKDIV_SHIFT) /* n = 1 - 32 */
                                              /* Bits 5-31: Reserved */
 /* Clocking and power control - Peripheral power control registers */
 /* Power Control Register */
@@ -555,19 +555,19 @@
                                                   /* Delay values multiplied by 250 picoseconds */
 #define SYSCON_EMCDLYCTL_CMDDLY_SHIFT     (0)     /* Bits 0-4: Delay value for EMC outputs in command delayed mode */
 #define SYSCON_EMCDLYCTL_CMDDLY_MASK      (0x1f << SYSCON_EMCDLYCTL_CMDDLY_SHIFT)
-# define SYSCON_EMCDLYCTL_CMDDLY(n)       ((n+1) << SYSCON_EMCDLYCTL_CMDDLY_SHIFT) /* n = 2 - 31 */
+# define SYSCON_EMCDLYCTL_CMDDLY(n)       ((n-1) << SYSCON_EMCDLYCTL_CMDDLY_SHIFT) /* n = 3 - 32 */
                                                   /* Bits 5-7: Reserved */
 #define SYSCON_EMCDLYCTL_FBCLKDLY_SHIFT   (8)     /* Bits 8-12: Delay value for the feedback clock that controls input data sampling */
 #define SYSCON_EMCDLYCTL_FBCLKDLY_MASK    (0x1f << SYSCON_EMCDLYCTL_FBCLKDLY_SHIFT)
-#define SYSCON_EMCDLYCTL_FBCLKDLY(n)      ((n+1)<< SYSCON_EMCDLYCTL_FBCLKDLY_SHIFT) /* n = 2 - 31 */
+#define SYSCON_EMCDLYCTL_FBCLKDLY(n)      ((n-1)<< SYSCON_EMCDLYCTL_FBCLKDLY_SHIFT) /* n = 3 - 32 */
                                                   /* Bits 13-15: Reserved */
 #define SYSCON_EMCDLYCTL_CLKOUT0DLY_SHIFT (16)    /* Bits 16-20: Delay value for the CLKOUT0 output */
 #define SYSCON_EMCDLYCTL_CLKOUT0DLY_MASK  (0x1f << SYSCON_EMCDLYCTL_CLKOUT0DLY_SHIFT)
-# define SYSCON_EMCDLYCTL_CLKOUT0DLY(n)   ((n+1) << SYSCON_EMCDLYCTL_CLKOUT0DLY_SHIFT) /* n = 2 - 31 */
+# define SYSCON_EMCDLYCTL_CLKOUT0DLY(n)   ((n-1) << SYSCON_EMCDLYCTL_CLKOUT0DLY_SHIFT) /* n = 3 - 32 */
                                                   /* Bits 21-23: Reserved */
 #define SYSCON_EMCDLYCTL_CLKOUT1DLY_SHIFT (24)    /* Bits 24-28: Delay value for the CLKOUT1 output */
 #define SYSCON_EMCDLYCTL_CLKOUT1DLY_MASK  (0x1f << SYSCON_EMCDLYCTL_CLKOUT1DLY_SHIFT)
-# define SYSCON_EMCDLYCTL_CLKOUT1DLY(n)   ((n+1) << SYSCON_EMCDLYCTL_CLKOUT1DLY_SHIFT) /* n = 2 - 31 */
+# define SYSCON_EMCDLYCTL_CLKOUT1DLY(n)   ((n-1) << SYSCON_EMCDLYCTL_CLKOUT1DLY_SHIFT) /* n = 3 - 32 */
                                                   /* Bits 29-31: Reserved */
 /* Calibration Register - EMC */
 
diff --git a/nuttx/arch/arm/src/lpc17xx/lpc17_emc.c b/nuttx/arch/arm/src/lpc17xx/lpc17_emc.c
new file mode 100644
index 000000000..1442fe8b9
--- /dev/null
+++ b/nuttx/arch/arm/src/lpc17xx/lpc17_emc.c
@@ -0,0 +1,192 @@
+/****************************************************************************
+ * arch/arm/src/lpc17/lpc17_emc.c
+ * arch/arm/src/chip/lpc17_emc.c
+ *
+ *   Copyright (C) 2013 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <gnutt@nuttx.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <arch/irq.h>
+
+#include "lpc17_syscon.h"
+#include "lpc17_emc.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+static const lpc17_pinset_t g_emcctrl[] =
+{
+  GPIO_EMC_OE,    GPIO_EMC_WE,
+  GPIO_EMC_BLS0,  GPIO_EMC_BLS1,  GPIO_EMC_BLS2,  GPIO_EMC_BLS3,
+  GPIO_EMC_CS0,   GPIO_EMC_CS1,   GPIO_EMC_CS2,   GPIO_EMC_CS3,
+  GPIO_EMC_CAS,   GPIO_EMC_RAS,
+  GPIO_EMC_CLK0,  GPIO_EMC_CLK1,
+  GPIO_EMC_DYCS0, GPIO_EMC_DYCS1, GPIO_EMC_DYCS2, GPIO_EMC_DYCS3,
+  GPIO_EMC_CKE0,  GPIO_EMC_CKE1,  GPIO_EMC_CKE2,  GPIO_EMC_CKE3,
+  GPIO_EMC_DQM0,  GPIO_EMC_DQM1,  GPIO_EMC_DQM2,  GPIO_EMC_DQM3,
+};
+#define EMC_NCTRL (sizeof(g_emcctrl) / sizeof(lpc17_pinset_t))
+
+static const lpc17_pinset_t g_emcdata[] =
+{
+  GPIO_EMC_D0,    GPIO_EMC_D1,    GPIO_EMC_D2,    GPIO_EMC_D3,
+  GPIO_EMC_D4,    GPIO_EMC_D5,    GPIO_EMC_D6,    GPIO_EMC_D7,
+  GPIO_EMC_D8,    GPIO_EMC_D9,    GPIO_EMC_D10,   GPIO_EMC_D11,
+  GPIO_EMC_D12,   GPIO_EMC_D13,   GPIO_EMC_D14,   GPIO_EMC_D15,
+  GPIO_EMC_D16,   GPIO_EMC_D17,   GPIO_EMC_D18,   GPIO_EMC_D19,
+  GPIO_EMC_D20,   GPIO_EMC_D21,   GPIO_EMC_D22,   GPIO_EMC_D23,
+  GPIO_EMC_D24,   GPIO_EMC_D25,   GPIO_EMC_D26,   GPIO_EMC_D27,
+  GPIO_EMC_D28,   GPIO_EMC_D29,   GPIO_EMC_D30,   GPIO_EMC_D31,
+};
+
+/* You can limit the number of data lines configured by defining
+ * BOARD_NDATA in your board.h header file.
+ */
+
+#ifdef BOARD_NDATA
+#  define EMC_NDATA BOARD_NDATA
+#else
+#  define EMC_NDATA (sizeof(g_emcdata) / sizeof(lpc17_pinset_t))
+#endif
+
+static const lpc17_pinset_t g_emcaddr[] =
+{
+  GPIO_EMC_A0,    GPIO_EMC_A1,    GPIO_EMC_A2,    GPIO_EMC_A3,
+  GPIO_EMC_A4,    GPIO_EMC_A5,    GPIO_EMC_A6,    GPIO_EMC_A7,
+  GPIO_EMC_A8,    GPIO_EMC_A9,    GPIO_EMC_A10,   GPIO_EMC_A11,
+  GPIO_EMC_A12,   GPIO_EMC_A13,   GPIO_EMC_A14,   GPIO_EMC_A15,
+  GPIO_EMC_A16,   GPIO_EMC_A17,   GPIO_EMC_A18,   GPIO_EMC_A19,
+  GPIO_EMC_A20,   GPIO_EMC_A21,   GPIO_EMC_A22,   GPIO_EMC_A23,
+  GPIO_EMC_A24,   GPIO_EMC_A25
+};
+
+/* You can limit the number of address lines configured by defining
+ * BOARD_NADDR in your board.h header file.
+ */
+
+#ifdef BOARD_NADDR
+#  define EMC_NADDR BOARD_NADDR
+#else
+#  define EMC_NADDR (sizeof(g_emcaddr) / sizeof(lpc17_pinset_t))
+#endif
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: lpc17_emcinitialize
+ *
+ * Description:
+ *   Initialize EMC clocking and pin configuration.  This function should be
+ *   called once when the system first boots in order to make the EMC
+ *   operational.
+ *
+ ****************************************************************************/
+
+void lpc17_emcinitialize(void)
+{
+  uint32_t regval;
+  int i;
+
+  /* Enable clocking for the EMC */
+
+  regval = getreg32(LPC17_SYSCON_PCONP);
+  regval |= SYSCON_PCONP_PCEMC;
+  putreg32(regval, LPC17_SYSCON_PCONP);
+
+  /* Set EMC delay values:
+   *
+   * CMDDLY: Programmable delay value for EMC outputs in command delayed
+   *   mode.  The delay amount is roughly CMDDLY * 250 picoseconds.
+   * FBCLKDLY: Programmable delay value for the feedback clock that controls
+   *   input data sampling.  The delay amount is roughly (FBCLKDLY+1) * 250
+   *   picoseconds.
+   * CLKOUT0DLY: Programmable delay value for the CLKOUT0 output. This would
+   *   typically be used in clock delayed mode.  The delay amount is roughly
+   *  (CLKOUT0DLY+1) * 250 picoseconds.
+   * CLKOUT1DLY: Programmable delay value for the CLKOUT1 output. This would
+   *  typically be used in clock delayed mode.  The delay amount is roughly
+   *  (CLKOUT1DLY+1) * 250 picoseconds.
+   */
+
+  regval = SYSCON_EMCDLYCTL_CMDDLY(BOARD_CMDDLY) |
+           SYSCON_EMCDLYCTL_FBCLKDLY(BOARD_FBCLKDLY) |
+           SYSCON_EMCDLYCTL_CLKOUT0DLY(BOARD_CLKOUT0DLY) |
+           SYSCON_EMCDLYCTL_CLKOUT1DLY(BOARD_CLKOUT1DLY);
+  putreg32(regval, LPC17_SYSCON_EMCDLYCTL);
+
+  /* Enable the EMC */
+
+  putreg32(EMC_CONTROL_E, LPC17_EMC_CONTROL);
+  putreg32(0, LPC17_EMC_CONFIG);
+
+  /* Configure EMC pins */
+  /* Control signals */
+
+  for (i = 0; i < EMC_NCTRL; i++)
+    {
+      lpc17_configgpio(g_emcctrl[i]);
+    }
+
+  /* Data lines */
+
+  for (i = 0; i < EMC_NDATA; i++)
+    {
+      lpc17_configgpio(g_emcdata[i]);
+    }
+
+  /* Address lines */
+
+  for (i = 0; i < EMC_NADDR; i++)
+    {
+      lpc17_configgpio(g_emcaddr[i]);
+    }
+}
diff --git a/nuttx/arch/arm/src/lpc17xx/lpc17_emc.h b/nuttx/arch/arm/src/lpc17xx/lpc17_emc.h
new file mode 100644
index 000000000..ba6c6040b
--- /dev/null
+++ b/nuttx/arch/arm/src/lpc17xx/lpc17_emc.h
@@ -0,0 +1,74 @@
+/****************************************************************************
+ * arch/arm/src/lpc17xx/lpc17_emc.h
+ *
+ *   Copyright (C) 2013 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <gnutt@nuttx.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_LPC17XX_CHIP_LPC17_EMC_H
+#define __ARCH_ARM_SRC_LPC17XX_CHIP_LPC17_EMC_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+#include "chip/lpc17_emc.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: lpc17_emcinitialize
+ *
+ * Description:
+ *   Initialize EMC clocking and pin configuration.  This function should be
+ *   called once when the system first boots in order to make the EMC
+ *   operational.
+ *
+ ****************************************************************************/
+
+void lpc17_emcinitialize(void);
+
+#endif /* __ARCH_ARM_SRC_LPC17XX_CHIP_LPC17_EMC_H */
diff --git a/nuttx/arch/arm/src/lpc17xx/lpc17_i2s.h b/nuttx/arch/arm/src/lpc17xx/lpc17_i2s.h
index 9fc6445b6..f6cbe0677 100644
--- a/nuttx/arch/arm/src/lpc17xx/lpc17_i2s.h
+++ b/nuttx/arch/arm/src/lpc17xx/lpc17_i2s.h
@@ -1,5 +1,5 @@
-/************************************************************************************
- * arch/arm/src/lpc17xx/lpc17_i2s
+/****************************************************************************
+ * arch/arm/src/lpc17xx/lpc17_i2s.h
  *
  *   Copyright (C) 2010, 2012-2013 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
@@ -31,31 +31,32 @@
  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  *
- ************************************************************************************/
+ ****************************************************************************/
 
 #ifndef __ARCH_ARM_SRC_LPC17XX_CHIP_LPC17_I2S_H
 #define __ARCH_ARM_SRC_LPC17XX_CHIP_LPC17_I2S_H
 
-/************************************************************************************
+/****************************************************************************
  * Included Files
- ************************************************************************************/
+ ****************************************************************************/
 
 #include <nuttx/config.h>
+#include "chip/lpc17_i2s.h"
 
-/************************************************************************************
+/****************************************************************************
  * Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
 
-/************************************************************************************
+/****************************************************************************
  * Public Types
- ************************************************************************************/
+ ****************************************************************************/
 
-/************************************************************************************
+/****************************************************************************
  * Public Data
- ************************************************************************************/
+ ****************************************************************************/
 
-/************************************************************************************
+/****************************************************************************
  * Public Functions
- ************************************************************************************/
+ ****************************************************************************/
 
 #endif /* __ARCH_ARM_SRC_LPC17XX_CHIP_LPC17_I2S_H */
diff --git a/nuttx/configs/open1788/include/board.h b/nuttx/configs/open1788/include/board.h
new file mode 100644
index 000000000..abe544a4a
--- /dev/null
+++ b/nuttx/configs/open1788/include/board.h
@@ -0,0 +1,492 @@
+/************************************************************************************
+ * configs/open1788/include/board.h
+ * include/arch/board/board.h
+ *
+ *   Copyright (C) 2013 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <gnutt@nuttx.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __CONFIG_OPEN1788_INCLUDE_BOARD_H
+#define __CONFIG_OPEN1788_INCLUDE_BOARD_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <stdbool.h>
+
+#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_GPIO_IRQ)
+#  include <nuttx/irq.h>
+#endif
+
+/************************************************************************************
+ * Definitions
+ ************************************************************************************/
+/* Clocking *************************************************************************/
+/* NOTE:  The following definitions require lpc17_syscon.h.  It is not included here
+ * because the including C file may not have that file in its include path.
+ */
+
+#define BOARD_XTAL_FREQUENCY        (12000000)            /* XTAL oscillator frequency */
+#define BOARD_OSCCLK_FREQUENCY      BOARD_XTAL_FREQUENCY  /* Main oscillator frequency */
+#define BOARD_RTCCLK_FREQUENCY      (32768)               /* RTC oscillator frequency */
+#define BOARD_INTRCOSC_FREQUENCY    (4000000)             /* Internal RC oscillator frequency */
+
+/* This is the clock setup we configure for:
+ *
+ *   SYSCLK = BOARD_OSCCLK_FREQUENCY = 12MHz  -> Select Main oscillator for source
+ *   PLL0CLK = (2 * 20 * SYSCLK) / 1 = 480MHz -> PLL0 multipler=20, pre-divider=1
+ *   CCLCK = 480MHz / 6 = 80MHz               -> CCLK divider = 6
+ */
+
+#define LPC17_CCLK                 80000000 /* 80Mhz */
+
+/* Select the main oscillator as the frequency source.  SYSCLK is then the frequency
+ * of the main oscillator.
+ */
+
+#undef CONFIG_LPC17_MAINOSC
+#define CONFIG_LPC17_MAINOSC       1
+#define BOARD_SCS_VALUE            SYSCON_SCS_OSCEN
+
+/* Select the main oscillator and CCLK divider. The output of the divider is CCLK.
+ * The input to the divider (PLLCLK) will be determined by the PLL output.
+ */
+
+#define BOARD_CCLKCFG_DIVIDER      6
+#define BOARD_CCLKCFG_VALUE        ((BOARD_CCLKCFG_DIVIDER-1) << SYSCON_CCLKCFG_SHIFT)
+
+/* PLL0.  PLL0 is used to generate the CPU clock divider input (PLLCLK).
+ *
+ *  Source clock:               Main oscillator
+ *  PLL0 Multiplier value (M):  20 
+ *  PLL0 Pre-divider value (N): 1
+ *
+ *  PLL0CLK = (2 * 20 * SYSCLK) / 1 = 480MHz
+ */
+
+#undef CONFIG_LPC17_PLL0
+#define CONFIG_LPC17_PLL0          1
+#define BOARD_CLKSRCSEL_VALUE      SYSCON_CLKSRCSEL_MAIN
+
+#define BOARD_PLL0CFG_MSEL         20
+#define BOARD_PLL0CFG_NSEL         1
+#define BOARD_PLL0CFG_VALUE \
+  (((BOARD_PLL0CFG_MSEL-1) << SYSCON_PLL0CFG_MSEL_SHIFT) | \
+   ((BOARD_PLL0CFG_NSEL-1) << SYSCON_PLL0CFG_NSEL_SHIFT))
+
+/* PLL1 -- Not used. */
+
+#undef CONFIG_LPC17_PLL1
+#define BOARD_PLL1CFG_MSEL         36
+#define BOARD_PLL1CFG_NSEL         1
+#define BOARD_PLL1CFG_VALUE \
+  (((BOARD_PLL1CFG_MSEL-1) << SYSCON_PLL1CFG_MSEL_SHIFT) | \
+   ((BOARD_PLL1CFG_NSEL-1) << SYSCON_PLL1CFG_NSEL_SHIFT))
+
+/* USB divider.  This divider is used when PLL1 is not enabled to get the
+ * USB clock from PLL0:
+ *
+ *  USBCLK = PLL0CLK / 10 = 48MHz
+ */
+
+#define BOARD_USBCLKCFG_VALUE      SYSCON_USBCLKCFG_DIV10
+
+/* FLASH Configuration */
+
+#undef  CONFIG_LP17_FLASH
+#define CONFIG_LP17_FLASH          1
+#define BOARD_FLASHCFG_VALUE       0x0000303a
+
+/* Ethernet configuration */
+
+//#define ETH_MCFG_CLKSEL_DIV ETH_MCFG_CLKSEL_DIV44
+#define ETH_MCFG_CLKSEL_DIV ETH_MCFG_CLKSEL_DIV20
+
+/* LED definitions ******************************************************************/
+/* If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in
+ * any way.  The following definitions are used to access individual LEDs.
+ *
+ * LED1            -- Connected to P1[25]
+ * LED2            -- Connected to P0[4]
+ */
+
+/* LED index values for use with lpc17_setled() */
+
+#define BOARD_LED1                0
+#define BOARD_LED2                1
+#define BOARD_NLEDS               2
+
+/* LED bits for use with lpc17_setleds() */
+
+#define BOARD_LED1_BIT            (1 << BOARD_LED1)
+#define BOARD_LED2_BIT            (1 << BOARD_LED2)
+
+/* If CONFIG_ARCH_LEDs is defined, then NuttX will control the 3 LEDs
+ * on board the Olimex LPC1766-STK.  The following definitions
+ * describe how NuttX controls the LEDs:
+ */
+                                      /* LED1 LED2 */
+#define LED_STARTED                0  /*  OFF  OFF = Still initializing */
+#define LED_HEAPALLOCATE           0  /*  OFF  OFF = Still initializing */
+#define LED_IRQSENABLED            0  /*  OFF  OFF = Still initializing */
+#define LED_STACKCREATED           1  /*  ON   OFF = Initialization complete */
+#define LED_INIRQ                  2  /*  N/C  ON  = In an interrupt handler */
+#define LED_SIGNAL                 2  /*  N/C  ON  = In a signal handler (glowing) */
+#define LED_ASSERTION              2  /*  N/C  ON  = In an assertion */
+#define LED_PANIC                  2  /*  N/C  ON  = Oops! We crashed. (flashing) */
+#define LED_IDLE                   3  /*  OFF  N/C = LPC17 in sleep mode (LED1 glowing) */
+
+/* Set EMC delay values:
+ *
+ * CMDDLY: Programmable delay value for EMC outputs in command delayed
+ *   mode.  The delay amount is roughly CMDDLY * 250 picoseconds.
+ * FBCLKDLY: Programmable delay value for the feedback clock that controls
+ *   input data sampling.  The delay amount is roughly (FBCLKDLY+1) * 250
+ *   picoseconds.
+ * CLKOUT0DLY: Programmable delay value for the CLKOUT0 output. This would
+ *   typically be used in clock delayed mode.  The delay amount is roughly
+ *  (CLKOUT0DLY+1) * 250 picoseconds.
+ * CLKOUT1DLY: Programmable delay value for the CLKOUT1 output. This would
+ *  typically be used in clock delayed mode.  The delay amount is roughly
+ *  (CLKOUT1DLY+1) * 250 picoseconds.
+ *
+ * Optimal for NOR: {1,1,1,1}
+ * Needed for NAND and SDRAM: {17,1,2,1}
+ */
+
+#if defined(CONFIG_LPC17_EMC_NAND) || defined(CONFIG_LPC17_EMC_SDRAM)
+#  define BOARD_CMDDLY     17
+#  define BOARD_FBCLKDLY   1
+#  define BOARD_CLKOUT0DLY 2
+#  define BOARD_CLKOUT1DLY 1
+#else
+#  define BOARD_CMDDLY     1
+#  define BOARD_FBCLKDLY   1
+#  define BOARD_CLKOUT0DLY 1
+#  define BOARD_CLKOUT1DLY 1
+#endif
+
+/* Button definitions ***************************************************************/
+/* The LPC1766-STK supports several buttons.  All will read "1" when open and "0"
+ * when closed
+ *
+ * BUT1            -- Connected to P0[23]
+ * BUT2            -- Connected to P2[13]
+ * WAKE-UP         -- Connected to P2[12]
+ *
+ * And a Joystick
+ *
+ * CENTER          -- Connected to P0[4]
+ * DOWN            -- Connected to P2[1]
+ * LEFT            -- Connected to P2[7]
+ * RIGHT           -- Connected to P2[8]
+ * UP              -- Connected to P2[0]
+ */
+
+#define BOARD_BUTTON_1             0
+#define BOARD_BUTTON_2             1
+#define BOARD_BUTTON_WAKEUP        2
+
+#define BOARD_JOYSTICK_CENTER      3
+#define BOARD_JOYSTICK_UP          4
+#define BOARD_JOYSTICK_DOWN        5
+#define BOARD_JOYSTICK_LEFT        6
+#define BOARD_JOYSTICK_RIGHT       7
+
+#define BOARD_NUM_BUTTONS          8
+
+#define BOARD_BUTTON_BUTTON1_BIT   (1 << BOARD_BUTTON_1)
+#define BOARD_BUTTON_BUTTON2_BIT   (1 << BOARD_BUTTON_2)
+#define BOARD_BUTTON_WAKEUP_BIT    (1 << BOARD_BUTTON_WAKEUP)
+
+#define BOARD_JOYSTICK_CENTER_BIT  (1 << BOARD_JOYSTICK_CENTER)
+#define BOARD_JOYSTICK_UP_BIT      (1 << BOARD_JOYSTICK_UP)
+#define BOARD_JOYSTICK_DOWN_BIT    (1 << BOARD_JOYSTICK_DOWN)
+#define BOARD_JOYSTICK_LEFT_BIT    (1 << BOARD_JOYSTICK_LEFT)
+#define BOARD_JOYSTICK_RIGHT_BIT   (1 << BOARD_JOYSTICK_RIGHT)
+
+/* Alternate pin selections *********************************************************/
+
+/* CAN1 GPIO                        PIN  SIGNAL NAME
+ * -------------------------------- ---- --------------
+ * P0[0]/RD1/TXD3/SDA1               46  RD1
+ * P0[1]/TD1/RXD3/SCL1               47  TD1
+ */
+
+#define GPIO_CAN1_RD  GPIO_CAN1_RD_1
+#define GPIO_CAN1_TD  GPIO_CAN1_TD_1
+
+/* UART0 GPIO                       PIN  SIGNAL NAME
+ * -------------------------------- ---- --------------
+ * P0[2]/TXD0/AD0[7]                 98  TXD0
+ * P0[3]/RXD0/AD0[6]                 99  RXD0
+ */
+
+/* UART1 GPIO                       PIN  SIGNAL NAME
+ * -------------------------------- ---- --------------
+ * P0[15]/TXD1/SCK0/SCK              62  TXD1
+ * P0[16]/RXD1/SSEL0/SSEL            63  RXD1
+ * P0[17]/CTS1/MISO0/MISO            61  CTS1
+ * P0[18]/DCD1/MOSI0/MOSI            60  DCD1
+ * P0[19]/DSR1/SDA1                  59  DSR1
+ * P0[20]/DTR1/SCL1                  58  DTR1
+ * P0[22]/RTS1/TD1                   56  RTS1
+ */
+
+#define GPIO_UART1_TXD GPIO_UART1_TXD_1
+#define GPIO_UART1_RXD GPIO_UART1_RXD_1
+#define GPIO_UART1_CTS GPIO_UART1_CTS_1
+#define GPIO_UART1_DCD GPIO_UART1_DCD_1
+#define GPIO_UART1_DSR GPIO_UART1_DSR_1
+#define GPIO_UART1_DTR GPIO_UART1_DTR_1
+#define GPIO_UART1_RTS GPIO_UART1_RTS_1
+
+/* SSP0 GPIO                        PIN  SIGNAL NAME
+ * -------------------------------- ---- --------------
+ * P1[21]/MCABORT/PWM1[3]/SSEL0      35  SSEL0
+ * P1[20]/MCFB0/PWM1[2]/SCK0         34  SCK0
+ * P1[23]/MCFB1/PWM1[4]/MISO0        37  MISO0
+ * P1[24]/MCFB2/PWM1[5]/MOSI0        38  MOSI0
+ */
+
+#define GPIO_SSP0_SSEL GPIO_SSP0_SSEL_2
+#define GPIO_SSP0_SCK  GPIO_SSP0_SCK_2
+#define GPIO_SSP0_MISO GPIO_SSP0_MISO_2
+#define GPIO_SSP0_MOSI GPIO_SSP0_MOSI_2
+
+/* SSP1 GPIO                        PIN  SIGNAL NAME
+ * -------------------------------- ---- --------------
+ * P0[6]/I2SRX_SDA/SSEL1/MAT2[0]     79  SSEL1
+ * P0[7]/I2STX_CLK/SCK1/MAT2[1]      78  SCK1
+ * P0[8]/I2STX_WS/MISO1/MAT2[2]      77  MISO1
+ * P0[9]/I2STX_SDA/MOSI1/MAT2[3]     76  MOSI1
+ */
+
+#define GPIO_SSP1_SCK GPIO_SSP1_SCK_1
+
+/* I2C2 GPIO                        PIN  SIGNAL NAME
+ * -------------------------------- ---- --------------
+ * P0[10]/TXD2/SDA2/MAT3[0]          48  SDA2
+ * P0[11]/RXD2/SCL2/MAT3[1]          49  SCL2
+ */
+
+/* AD GPIO                          PIN  SIGNAL NAME
+ * -------------------------------- ---- --------------
+ * P0[24]/AD0[1]/I2SRX_WS/CAP3[1]     8  TEMP
+ * P0[25]/AD0[2]/I2SRX_SDA/TXD3       7  MIC IN
+
+/* USB GPIO                         PIN  SIGNAL NAME
+ * -------------------------------- ---- --------------
+ * P0[27]/SDA0/USB_SDA               25  USB_SDA
+ * P0[28]/SCL0/USB_SCL               24  USB_SCL
+ * P0[29]/USB_D+                     29  USB_D+
+ * P0[30]/USB_D-                     30  USB_D-
+ * P1[18]/USB_UP_LED/PWM1[1]/CAP1[0] 32  USB_UP_LED
+ * P1[19]/MC0A/#USB_PPWR/CAP1[1]     33  #USB_PPWR
+ * P1[22]/MC0B/USB_PWRD/MAT1[0]      36  USBH_PWRD
+ * P1[27]/CLKOUT/#USB_OVRCR/CAP0[1]  43  #USB_OVRCR
+ * P1[30]/VBUS/AD0[4]                21  VBUS
+ * P2[9]/USB_CONNECT/RXD2            64  USBD_CONNECT
+ */
+
+#ifdef GPIO_USB_PPWR  /* We can only redefine this if they have been defined */
+
+/* The Olimex LPC1766-STK has 10K pull-ups on PPWR and OVRCR and a 100k
+ * pull-down on PWRD so we should make sure that the outputs float.
+ */
+
+#  undef  GPIO_USB_PPWR
+#  define GPIO_USB_PPWR    (GPIO_ALT2 | GPIO_FLOAT | GPIO_PORT1 | GPIO_PIN19)
+#  undef  GPIO_USB_OVRCR
+#  define GPIO_USB_OVRCR   (GPIO_ALT2 | GPIO_FLOAT | GPIO_PORT1 | GPIO_PIN27)
+#  undef  GPIO_USB_PWRD
+#  define GPIO_USB_PWRD    (GPIO_ALT2 | GPIO_FLOAT | GPIO_PORT1 | GPIO_PIN22)
+
+/* In host mode (only) there are also 15K pull-downs on D+ and D- */
+
+#  ifdef CONFIG_USBHOST
+#    undef  GPIO_USB_DP
+#    define GPIO_USB_DP    (GPIO_ALT1 | GPIO_FLOAT | GPIO_PORT0 | GPIO_PIN29)
+#    undef  GPIO_USB_DM
+#    define GPIO_USB_DM    (GPIO_ALT1 | GPIO_FLOAT | GPIO_PORT0 | GPIO_PIN30)
+#  endif
+#endif
+
+/* Ethernet GPIO                    PIN  SIGNAL NAME
+ * -------------------------------- ---- --------------
+ * P1[0]/ENET_TXD0                   95  E_TXD0
+ * P1[1]/ENET_TXD1                   94  E_TXD1
+ * P1[4]/ENET_TX_EN                  93  E_TX_EN
+ * P1[8]/ENET_CRS                    92  E_CRS
+ * P1[9]/ENET_RXD0                   91  E_RXD0
+ * P1[10]/ENET_RXD1                  90  E_RXD1
+ * P1[14]/ENET_RX_ER                 89  E_RX_ER
+ * P1[15]/ENET_REF_CLK               88  E_REF_CLK
+ * P1[16]/ENET_MDC                   87  E_MDC
+ * P1[17]/ENET_MDIO                  86  E_MDIO
+ */
+
+#define GPIO_ENET_MDC  GPIO_ENET_MDC_1
+#define GPIO_ENET_MDIO GPIO_ENET_MDIO_1
+
+/* Trace GPIO                       PIN  SIGNAL NAME
+ * -------------------------------- ---- --------------
+ * P2[2]/PWM1[3]/CTS1/TRACEDATA[3]   73  TRACE_D3
+ * P2[3]/PWM1[4]/DCD1/TRACEDATA[2]   70  TRACE_D2
+ * P2[4]/PWM1[5]/DSR1/TRACEDATA[1]   69  TRACE_D1
+ * P2[5]/PWM1[6]/DTR1/TRACEDATA[0]   68  TRACE_D0
+ * P2[6]/PCAP1[0]/RI1/TRACECLK       67  TRACE_CLK
+ */
+
+/* EINT GPIO                       PIN  SIGNAL NAME
+ * -------------------------------- ---- --------------
+ * P2[11]/#EINT1/I2STX_CLK           52  #EINT1
+ */
+
+/* ?
+ *  P0[26]/AD0[3]/AOUT/RXD3            6  AOUT
+ *  P1[31]/SCK1/AD0[5]                20  AIN5
+ */
+
+/************************************************************************************
+ * Public Types
+ ************************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+/************************************************************************************
+ * Public Data
+ ************************************************************************************/
+
+#undef EXTERN
+#if defined(__cplusplus)
+#define EXTERN extern "C"
+extern "C" {
+#else
+#define EXTERN extern
+#endif
+
+/************************************************************************************
+ * Public Function Prototypes
+ ************************************************************************************/
+/************************************************************************************
+ * Name: lpc17_boardinitialize
+ *
+ * Description:
+ *   All LPC17xx architectures must provide the following entry point.  This entry
+ *   point is called early in the intitialization -- after all memory has been
+ *   configured and mapped but before any devices have been initialized.
+ *
+ ************************************************************************************/
+
+EXTERN void lpc17_boardinitialize(void);
+
+/************************************************************************************
+ * Name:  lpc17_ledinit, lpc17_setled, and lpc17_setleds
+ *
+ * Description:
+ *   If CONFIG_ARCH_LEDS is defined, then NuttX will control the on-board LEDs.  If
+ *   CONFIG_ARCH_LEDS is not defined, then the following interfacesare available to
+ *   control the LEDs from user applications.
+ *
+ ************************************************************************************/
+
+#ifndef CONFIG_ARCH_LEDS
+EXTERN void lpc17_ledinit(void);
+EXTERN void lpc17_setled(int led, bool ledon);
+EXTERN void lpc17_setleds(uint8_t ledset);
+#endif
+
+/************************************************************************************
+ * Name: up_buttoninit
+ *
+ * Description:
+ *   up_buttoninit() must be called to initialize button resources.  After that,
+ *   up_buttons() may be called to collect the current state of all buttons or
+ *   up_irqbutton() may be called to register button interrupt handlers.
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_ARCH_BUTTONS
+EXTERN void up_buttoninit(void);
+
+/************************************************************************************
+ * Name: up_buttons
+ *
+ * Description:
+ *   up_buttoninit() must be called to initialize button resources.  After that,
+ *   up_buttons() may be called to collect the current state of all buttons.
+ *
+ *   After up_buttoninit() has been called, up_buttons() may be called to collect
+ *   the state of all buttons.  up_buttons() returns an 8-bit bit set with each bit
+ *   associated with a button.  See the BOARD_BUTTON_*_BIT and BOARD_JOYSTICK_*_BIT
+ *   definitions above for the meaning of each bit.
+ *
+ ************************************************************************************/
+
+EXTERN uint8_t up_buttons(void);
+
+/************************************************************************************
+ * Button support.
+ *
+ * Description:
+ *   up_buttoninit() must be called to initialize button resources.  After that,
+ *   up_irqbutton() may be called to register button interrupt handlers.
+ *
+ *   up_irqbutton() may be called to register an interrupt handler that will be called
+ *   when a button is depressed or released.  The ID value is a button enumeration
+ *   value that uniquely identifies a button resource. See the BOARD_BUTTON_* and
+ *   BOARD_JOYSTICK_* definitions in above for the meaning of enumeration values
+ *   The previous interrupt handler address is returned (so that it may restored, if
+ *   so desired).
+ *
+ *   Note that up_irqbutton() also enables button interrupts.  Button interrupts
+ *   will remain enabled after the interrupt handler is attached. Interrupts may
+ *   be disabled (and detached) by calling up_irqbutton with irqhandler equal to
+ *   NULL.
+ *
+ ************************************************************************************/
+
+#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_GPIO_IRQ)
+EXTERN xcpt_t up_irqbutton(int id, xcpt_t irqhandler);
+#endif
+#endif /* CONFIG_ARCH_BUTTONS */
+
+#undef EXTERN
+#if defined(__cplusplus)
+}
+#endif
+
+#endif /* __ASSEMBLY__ */
+#endif  /* __CONFIG_OPEN1788_INCLUDE_BOARD_H */