More changes associated with GPIO interrupt for the KL architecture from Alan Carvalho de Assis

3 files changed, 70 insertions, 2 deletions

diff --git a/nuttx/arch/arm/src/kl/kl_gpio.h b/nuttx/arch/arm/src/kl/kl_gpio.h
index d2d181b13..fc2cd7f37 100644
--- a/nuttx/arch/arm/src/kl/kl_gpio.h
+++ b/nuttx/arch/arm/src/kl/kl_gpio.h
@@ -354,6 +354,58 @@ void kl_gpiowrite(uint32_t pinset, bool value);
 
 bool kl_gpioread(uint32_t pinset);
 
+/************************************************************************************
+ * Name: kl_pinirqattach
+ *
+ * Description:
+ *   Attach a pin interrupt handler.  The normal initalization sequence is:
+ *
+ *   1. Call kl_configgpio() to configure the interrupting pin (pin interrupts
+ *      will be disabled.
+ *   2. Call kl_gpioirqattach() to attach the pin interrupt handling function.
+ *   3. Call kl_gpioirqenable() to enable interrupts on the pin.
+ *
+ * Parameters:
+ *  - pinset:  Pin configuration
+ *  - pinisr:  Pin interrupt service routine
+ *
+ * Returns:
+ *   The previous value of the interrupt handler function pointer.  This value may,
+ *   for example, be used to restore the previous handler when multiple handlers are
+ *   used.
+ *
+ ************************************************************************************/
+
+xcpt_t kl_gpioirqattach(uint32_t pinset, xcpt_t pinisr);
+
+/************************************************************************************
+ * Name: kl_gpioirqenable
+ *
+ * Description:
+ *   Enable the interrupt for specified pin IRQ
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_GPIO_IRQ
+void kl_gpioirqenable(uint32_t pinset);
+#else
+#  define kl_gpioirqenable(pinset)
+#endif
+
+/************************************************************************************
+ * Name: kl_gpioirqdisable
+ *
+ * Description:
+ *   Disable the interrupt for specified pin
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_GPIO_IRQ
+void kl_gpioirqdisable(uint32_t pinset);
+#else
+#  define kl_gpioirqdisable(pinset)
+#endif
+
 #undef EXTERN
 #if defined(__cplusplus)
 }
diff --git a/nuttx/arch/arm/src/kl/kl_gpioirq.c b/nuttx/arch/arm/src/kl/kl_gpioirq.c
index 6bf71c66b..7d831a6f4 100644
--- a/nuttx/arch/arm/src/kl/kl_gpioirq.c
+++ b/nuttx/arch/arm/src/kl/kl_gpioirq.c
@@ -326,14 +326,22 @@ void kl_gpioirqenable(uint32_t pinset)
             regval |= PORT_PCR_IRQC_RISING;
             break;
 
-          case PIN_INT_BOTH : /* Interrupt on falling edge */
+          case PIN_INT_FALLING : /* Interrupt on falling edge */
             regval |= PORT_PCR_IRQC_FALLING;
             break;
 
-          case PIN_DMA_FALLING : /* nterrupt on either edge */
+          case PIN_INT_BOTH : /* Interrupt on either edge */
             regval |= PORT_PCR_IRQC_BOTH;
             break;
 
+          case PIN_DMA_RISING : /* Interrupt on DMA rising */
+            regval |= PORT_PCR_IRQC_DMARISING;
+            break;
+
+          case PIN_DMA_FALLING : /* Interrupt on DMA falling */
+            regval |= PORT_PCR_IRQC_DMAFALLING;
+            break;
+
           case PIN_INT_ONE : /* IInterrupt when logic one */
             regval |= PORT_PCR_IRQC_ONE;
             break;
diff --git a/nuttx/arch/arm/src/kl/kl_irq.c b/nuttx/arch/arm/src/kl/kl_irq.c
index 493e3cb95..8ea5d2df6 100644
--- a/nuttx/arch/arm/src/kl/kl_irq.c
+++ b/nuttx/arch/arm/src/kl/kl_irq.c
@@ -238,6 +238,14 @@ void up_irqinitialize(void)
 
   kl_dumpnvic("initial", NR_IRQS);
 
+  /* Initialize logic to support a second level of interrupt decoding for
+   * configured pin interrupts.
+   */
+
+#ifdef CONFIG_GPIO_IRQ
+  kl_gpioirqinitialize();
+#endif
+
 #ifndef CONFIG_SUPPRESS_INTERRUPTS
 
   /* And finally, enable interrupts */