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authorGregory Nutt <gnutt@nuttx.org>2014-05-13 13:11:10 -0600
committerGregory Nutt <gnutt@nuttx.org>2014-05-13 13:11:10 -0600
commitcd06c7986b99110cee3f408265e0b5c69239fd50 (patch)
tree1b7a7aea035a81c67102c32334d6f09fb921e847
parent7b247cf0dd893d1641004f682415cfbbc705b4b2 (diff)
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STM32 I2C: Cosmetic changes in preparation to merge a change
-rw-r--r--nuttx/arch/arm/src/stm32/stm32_i2c.c97
1 files changed, 55 insertions, 42 deletions
diff --git a/nuttx/arch/arm/src/stm32/stm32_i2c.c b/nuttx/arch/arm/src/stm32/stm32_i2c.c
index 7be312a9c..d113af611 100644
--- a/nuttx/arch/arm/src/stm32/stm32_i2c.c
+++ b/nuttx/arch/arm/src/stm32/stm32_i2c.c
@@ -8,7 +8,7 @@
* With extensions, modifications by:
*
* Copyright (C) 2011-2014 Gregory Nutt. All rights reserved.
- * Author: Gregroy Nutt <gnutt@nuttx.org>
+ * Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -57,7 +57,7 @@
* - SMBus support (hardware layer timings are already supported) and add SMBA gpio pin
* - Slave support with multiple addresses (on multiple instances):
* - 2 x 7-bit address or
- * - 1 x 10 bit adresses + 1 x 7 bit address (?)
+ * - 1 x 10 bit addresses + 1 x 7 bit address (?)
* - plus the broadcast address (general call)
* - Multi-master support
* - DMA (to get rid of too many CPU wake-ups and interventions)
@@ -97,6 +97,7 @@
#if defined(CONFIG_STM32_I2C1) || defined(CONFIG_STM32_I2C2) || \
defined(CONFIG_STM32_I2C3)
+
/* This implementation is for the STM32 F1, F2, and F4 only */
/* Experimentally enabled for STM32L15XX */
@@ -297,32 +298,39 @@ static inline void stm32_i2c_modifyreg(FAR struct stm32_i2c_priv_s *priv,
uint8_t offset, uint16_t clearbits,
uint16_t setbits);
static inline void stm32_i2c_sem_wait(FAR struct i2c_dev_s *dev);
+
#ifdef CONFIG_STM32_I2C_DYNTIMEO
static useconds_t stm32_i2c_tousecs(int msgc, FAR struct i2c_msg_s *msgs);
#endif /* CONFIG_STM32_I2C_DYNTIMEO */
+
static inline int stm32_i2c_sem_waitdone(FAR struct stm32_i2c_priv_s *priv);
static inline void stm32_i2c_sem_waitstop(FAR struct stm32_i2c_priv_s *priv);
static inline void stm32_i2c_sem_post(FAR struct i2c_dev_s *dev);
static inline void stm32_i2c_sem_init(FAR struct i2c_dev_s *dev);
static inline void stm32_i2c_sem_destroy(FAR struct i2c_dev_s *dev);
+
#ifdef CONFIG_I2C_TRACE
static void stm32_i2c_tracereset(FAR struct stm32_i2c_priv_s *priv);
static void stm32_i2c_tracenew(FAR struct stm32_i2c_priv_s *priv, uint32_t status);
static void stm32_i2c_traceevent(FAR struct stm32_i2c_priv_s *priv,
- enum stm32_trace_e event, uint32_t parm);
+ enum stm32_trace_e event, uint32_t parm);
static void stm32_i2c_tracedump(FAR struct stm32_i2c_priv_s *priv);
#endif /* CONFIG_I2C_TRACE */
+
static void stm32_i2c_setclock(FAR struct stm32_i2c_priv_s *priv,
uint32_t frequency);
static inline void stm32_i2c_sendstart(FAR struct stm32_i2c_priv_s *priv);
static inline void stm32_i2c_clrstart(FAR struct stm32_i2c_priv_s *priv);
static inline void stm32_i2c_sendstop(FAR struct stm32_i2c_priv_s *priv);
static inline uint32_t stm32_i2c_getstatus(FAR struct stm32_i2c_priv_s *priv);
+
#ifdef I2C1_FSMC_CONFLICT
static inline uint32_t stm32_i2c_disablefsmc(FAR struct stm32_i2c_priv_s *priv);
static inline void stm32_i2c_enablefsmc(uint32_t ahbenr);
#endif /* I2C1_FSMC_CONFLICT */
+
static int stm32_i2c_isr(struct stm32_i2c_priv_s * priv);
+
#ifndef CONFIG_I2C_POLLED
#ifdef CONFIG_STM32_I2C1
static int stm32_i2c1_isr(int irq, void *context);
@@ -333,7 +341,8 @@ static int stm32_i2c2_isr(int irq, void *context);
#ifdef CONFIG_STM32_I2C3
static int stm32_i2c3_isr(int irq, void *context);
#endif
-#endif
+#endif /* !CONFIG_I2C_POLLED */
+
static int stm32_i2c_init(FAR struct stm32_i2c_priv_s *priv);
static int stm32_i2c_deinit(FAR struct stm32_i2c_priv_s *priv);
static uint32_t stm32_i2c_setfrequency(FAR struct i2c_dev_s *dev,
@@ -342,17 +351,19 @@ static int stm32_i2c_setaddress(FAR struct i2c_dev_s *dev, int addr, int nbits);
static int stm32_i2c_process(FAR struct i2c_dev_s *dev, FAR struct i2c_msg_s *msgs,
int count);
static int stm32_i2c_write(FAR struct i2c_dev_s *dev, const uint8_t *buffer,
- int buflen);
+ int buflen);
static int stm32_i2c_read(FAR struct i2c_dev_s *dev, uint8_t *buffer, int buflen);
+
#ifdef CONFIG_I2C_WRITEREAD
static int stm32_i2c_writeread(FAR struct i2c_dev_s *dev,
const uint8_t *wbuffer, int wbuflen,
uint8_t *buffer, int buflen);
-#endif
+#endif /* CONFIG_I2C_WRITEREAD */
+
#ifdef CONFIG_I2C_TRANSFER
static int stm32_i2c_transfer(FAR struct i2c_dev_s *dev, FAR struct i2c_msg_s *msgs,
int count);
-#endif
+#endif /* CONFIG_I2C_TRANSFER */
/************************************************************************************
* Private Data
@@ -454,14 +465,14 @@ struct i2c_ops_s stm32_i2c_ops =
.write = stm32_i2c_write,
.read = stm32_i2c_read
#ifdef CONFIG_I2C_WRITEREAD
- , .writeread = stm32_i2c_writeread
+ , .writeread = stm32_i2c_writeread
#endif
#ifdef CONFIG_I2C_TRANSFER
- , .transfer = stm32_i2c_transfer
+ , .transfer = stm32_i2c_transfer
#endif
#ifdef CONFIG_I2C_SLAVE
- , .setownaddress = stm32_i2c_setownaddress,
- .registercallback = stm32_i2c_registercallback
+ , .setownaddress = stm32_i2c_setownaddress,
+ .registercallback = stm32_i2c_registercallback
#endif
};
@@ -586,8 +597,8 @@ static inline int stm32_i2c_sem_waitdone(FAR struct stm32_i2c_priv_s *priv)
* sem_timedwait() sleeps.
*/
- priv->intstate = INTSTATE_WAITING;
- do
+ priv->intstate = INTSTATE_WAITING;
+ do
{
/* Get the current time */
@@ -775,7 +786,7 @@ static inline void stm32_i2c_sem_waitstop(FAR struct stm32_i2c_priv_s *priv)
static inline void stm32_i2c_sem_post(FAR struct i2c_dev_s *dev)
{
- sem_post( &((struct stm32_i2c_inst_s *)dev)->priv->sem_excl );
+ sem_post(&((struct stm32_i2c_inst_s *)dev)->priv->sem_excl);
}
/************************************************************************************
@@ -843,7 +854,7 @@ static void stm32_i2c_tracenew(FAR struct stm32_i2c_priv_s *priv, uint32_t statu
{
struct stm32_trace_s *trace = &priv->trace[priv->tndx];
- /* Is the current entry uninitialized? Has the status changed? */
+ /* Is the current entry uninitialized? Has the status changed? */
if (trace->count == 0 || status != trace->status)
{
@@ -879,7 +890,7 @@ static void stm32_i2c_tracenew(FAR struct stm32_i2c_priv_s *priv, uint32_t statu
}
static void stm32_i2c_traceevent(FAR struct stm32_i2c_priv_s *priv,
- enum stm32_trace_e event, uint32_t parm)
+ enum stm32_trace_e event, uint32_t parm)
{
struct stm32_trace_s *trace;
@@ -915,8 +926,8 @@ static void stm32_i2c_tracedump(FAR struct stm32_i2c_priv_s *priv)
{
trace = &priv->trace[i];
syslog("%2d. STATUS: %08x COUNT: %3d EVENT: %2d PARM: %08x TIME: %d\n",
- i+1, trace->status, trace->count, trace->event, trace->parm,
- trace->time - priv->start_time);
+ i+1, trace->status, trace->count, trace->event, trace->parm,
+ trace->time - priv->start_time);
}
}
#endif /* CONFIG_I2C_TRACE */
@@ -963,6 +974,7 @@ static void stm32_i2c_setclock(FAR struct stm32_i2c_priv_s *priv, uint32_t frequ
speed = 4;
}
+
ccr |= speed;
/* Set Maximum Rise Time for standard mode */
@@ -1000,6 +1012,7 @@ static void stm32_i2c_setclock(FAR struct stm32_i2c_priv_s *priv, uint32_t frequ
speed = 1;
}
+
ccr |= speed;
/* Set Maximum Rise Time for fast mode */
@@ -1121,7 +1134,7 @@ static inline uint32_t stm32_i2c_disablefsmc(FAR struct stm32_i2c_priv_s *priv)
{
/* Disable FSMC unconditionally */
- ret = getreg32( STM32_RCC_AHBENR);
+ ret = getreg32(STM32_RCC_AHBENR);
regval = ret & ~RCC_AHBENR_FSMCEN;
putreg32(regval, STM32_RCC_AHBENR);
}
@@ -1145,7 +1158,7 @@ static inline void stm32_i2c_enablefsmc(uint32_t ahbenr)
if ((ahbenr & RCC_AHBENR_FSMCEN) != 0)
{
- regval = getreg32( STM32_RCC_AHBENR);
+ regval = getreg32(STM32_RCC_AHBENR);
regval |= RCC_AHBENR_FSMCEN;
putreg32(regval, STM32_RCC_AHBENR);
}
@@ -1344,7 +1357,7 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
* and wake it up.
*/
- sem_post( &priv->sem_isr );
+ sem_post(&priv->sem_isr);
priv->intstate = INTSTATE_DONE;
}
#else
@@ -1379,7 +1392,7 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
* and wake it up.
*/
- sem_post( &priv->sem_isr );
+ sem_post(&priv->sem_isr);
priv->intstate = INTSTATE_DONE;
}
#else
@@ -1655,7 +1668,7 @@ static int stm32_i2c_process(FAR struct i2c_dev_s *dev, FAR struct i2c_msg_s *ms
status = stm32_i2c_getstatus(priv);
errval = ETIMEDOUT;
- i2cdbg("Timed out: CR1: %04x status: %08x\n",
+ i2cdbg("Timed out: CR1: 0x%04x status: 0x%08x\n",
stm32_i2c_getreg(priv, STM32_I2C_CR1_OFFSET), status);
/* "Note: When the STOP, START or PEC bit is set, the software must
@@ -1734,7 +1747,7 @@ static int stm32_i2c_process(FAR struct i2c_dev_s *dev, FAR struct i2c_msg_s *ms
/* This is not an error, but should not happen. The BUSY signal can hang,
* however, if there are unhealthy devices on the bus that need to be reset.
- * NOTE: We will only see this buy indication if stm32_i2c_sem_waitdone()
+ * NOTE: We will only see this busy indication if stm32_i2c_sem_waitdone()
* fails above; Otherwise it is cleared.
*/
@@ -1884,7 +1897,7 @@ static int stm32_i2c_transfer(FAR struct i2c_dev_s *dev, FAR struct i2c_msg_s *m
FAR struct i2c_dev_s *up_i2cinitialize(int port)
{
struct stm32_i2c_priv_s * priv = NULL; /* Private data of device with multiple instances */
- struct stm32_i2c_inst_s * inst = NULL; /* Eevice, single instance */
+ struct stm32_i2c_inst_s * inst = NULL; /* Device, single instance */
int irqs;
#if STM32_PCLK1_FREQUENCY < 4000000
@@ -1893,7 +1906,7 @@ FAR struct i2c_dev_s *up_i2cinitialize(int port)
#if STM32_PCLK1_FREQUENCY < 2000000
# warning STM32_I2C_INIT: Peripheral clock must be at least 2 MHz to support 100 kHz operation.
- return NULL;
+ return NULL;
#endif
/* Get I2C private structure */
@@ -1901,27 +1914,27 @@ FAR struct i2c_dev_s *up_i2cinitialize(int port)
switch (port)
{
#ifdef CONFIG_STM32_I2C1
- case 1:
- priv = (struct stm32_i2c_priv_s *)&stm32_i2c1_priv;
- break;
+ case 1:
+ priv = (struct stm32_i2c_priv_s *)&stm32_i2c1_priv;
+ break;
#endif
#ifdef CONFIG_STM32_I2C2
- case 2:
- priv = (struct stm32_i2c_priv_s *)&stm32_i2c2_priv;
- break;
+ case 2:
+ priv = (struct stm32_i2c_priv_s *)&stm32_i2c2_priv;
+ break;
#endif
#ifdef CONFIG_STM32_I2C3
- case 3:
- priv = (struct stm32_i2c_priv_s *)&stm32_i2c3_priv;
- break;
+ case 3:
+ priv = (struct stm32_i2c_priv_s *)&stm32_i2c3_priv;
+ break;
#endif
- default:
- return NULL;
+ default:
+ return NULL;
}
/* Allocate instance */
- if (!(inst = kmalloc( sizeof(struct stm32_i2c_inst_s))))
+ if (!(inst = kmalloc(sizeof(struct stm32_i2c_inst_s))))
{
return NULL;
}
@@ -1942,8 +1955,8 @@ FAR struct i2c_dev_s *up_i2cinitialize(int port)
if ((volatile int)priv->refs++ == 0)
{
- stm32_i2c_sem_init( (struct i2c_dev_s *)inst );
- stm32_i2c_init( priv );
+ stm32_i2c_sem_init((struct i2c_dev_s *)inst);
+ stm32_i2c_init(priv);
}
irqrestore(irqs);
@@ -1984,11 +1997,11 @@ int up_i2cuninitialize(FAR struct i2c_dev_s * dev)
/* Disable power and other HW resource (GPIO's) */
- stm32_i2c_deinit( ((struct stm32_i2c_inst_s *)dev)->priv );
+ stm32_i2c_deinit(((struct stm32_i2c_inst_s *)dev)->priv);
/* Release unused resources */
- stm32_i2c_sem_destroy( (struct i2c_dev_s *)dev );
+ stm32_i2c_sem_destroy((struct i2c_dev_s *)dev);
kfree(dev);
return OK;