diff options
author | Gregory Nutt <gnutt@nuttx.org> | 2014-05-14 08:09:08 -0600 |
---|---|---|
committer | Gregory Nutt <gnutt@nuttx.org> | 2014-05-14 08:09:08 -0600 |
commit | f956d9f53487d2ab9a7d0cf12e3b5ce9dc14b2aa (patch) | |
tree | 4dde5f5b5dbf7d4c1ac69e85d4b9dd9b3fea4479 | |
parent | 5f9e14d7e3426a42783d6e034f86a559d39a2e9c (diff) | |
download | nuttx-f956d9f53487d2ab9a7d0cf12e3b5ce9dc14b2aa.tar.gz nuttx-f956d9f53487d2ab9a7d0cf12e3b5ce9dc14b2aa.tar.bz2 nuttx-f956d9f53487d2ab9a7d0cf12e3b5ce9dc14b2aa.zip |
Fix one error that I made in the last check-in (there are probably more)
-rw-r--r-- | nuttx/ChangeLog | 3 | ||||
-rwxr-xr-x | nuttx/arch/arm/src/stm32/stm32_i2c_alt.c | 62 |
2 files changed, 34 insertions, 31 deletions
diff --git a/nuttx/ChangeLog b/nuttx/ChangeLog index 2f3d7a48c..80d1c1b17 100644 --- a/nuttx/ChangeLog +++ b/nuttx/ChangeLog @@ -7335,3 +7335,6 @@ board. Untested on initial check-in (2014-5-13). * configs/sam4e-ek/src/sam_ads7843e.c: Add a touchscreen driver for the SAM4E-EK board. Untested on initial check-in (2014-5-13). + * arch/arm/src/stm32/stm32_i2c_alt.c: Add an alternative I2C implementation + for the STM32 F03 that works around errata in that part. From Patrizio + Simona (2014-5-14). diff --git a/nuttx/arch/arm/src/stm32/stm32_i2c_alt.c b/nuttx/arch/arm/src/stm32/stm32_i2c_alt.c index 8445279dc..8697e7f19 100755 --- a/nuttx/arch/arm/src/stm32/stm32_i2c_alt.c +++ b/nuttx/arch/arm/src/stm32/stm32_i2c_alt.c @@ -206,37 +206,37 @@ enum stm32_intstate_e /* Trace events */ #ifdef CONFIG_I2C_TRACE -static const uint32_t I2CEVENT_NONE = 0, /* No events have occurred with this status */ -static const uint32_t I2CEVENT_STATE_ERROR = 1000, /* No correct state detected, diver cannot handle state */ -static const uint32_t I2CEVENT_ISR_SHUTDOWN = 1001, /* ISR gets shutdown */ -static const uint32_t I2CEVENT_ISR_EMPTY_CALL = 1002, /* ISR gets called but no I2C logic comes into play */ -static const uint32_t I2CEVENT_MSG_HANDLING = 1003, /* Message Handling 1/1: advances the msg processing param = msgc*/ -static const uint32_t I2CEVENT_POLL_DEV_NOT_RDY = 1004, /* During polled operation if device is not ready yet */ -static const uint32_t I2CEVENT_ISR_CALL = 1111, /* ISR called*/ - -static const uint32_t I2CEVENT_SENDADDR = 5, /* Start/Master bit set and address sent, param = priv->msgv->addr(EV5 in reference manual) */ -static const uint32_t I2CEVENT_ADDR_HDL_READ_1 = 51, /* Read of length 1 address handling, param = 0 */ -static const uint32_t I2CEVENT_ADDR_HDL_READ_2 = 52, /* Read of length 2 address handling, param = 0 */ -static const uint32_t I2CEVENT_EMPTY_MSG = 5000, /* Empty message detected, param=0 */ - -static const uint32_t I2CEVENT_ADDRESS_ACKED = 6, /* Address has been ACKed(i.e. it's a valid address) param = address */ -static const uint32_t I2CEVENT_ADDRESS_ACKED_READ_1 = 63, /* Event when reading single byte just after address is beeing ACKed, param = 0 */ -static const uint32_t I2CEVENT_ADDRESS_ACKED_READ_2 = 61, /* Event when reading two bytes just after address is beeing ACKed, param = 0 */ -static const uint32_t I2CEVENT_ADDRESS_ACKED_WRITE = 681, /* Address has been ACKed(i.e. it's a valid address) in write mode and byte has been written */ -static const uint32_t I2CEVENT_ADDRESS_NACKED = 6000, /* Address has been NACKed(i.e. it's an invalid address) param = address */ - -static const uint32_t I2CEVENT_READ = 7, /* RxNE = 1 therefore can be read, param = dcnt */ -static const uint32_t I2CEVENT_READ_3 = 72, /* EV7_2 reference manual, reading byte N-2 and N-1 when N >=3 */ -static const uint32_t I2CEVENT_READ_2 = 73, /* EV7_3 reference manual, reading byte 1 and 2 when N == 2 */ -static const uint32_t I2CEVENT_READ_SR_EMPTY = 79, /* DR is full but SR is empty, does not read DR and waits for SR to fill in next ISR */ -static const uint32_t I2CEVENT_READ_LAST_BYTE = 72, /* EV7_2 reference manual last two bytes are in SR and DR */ -static const uint32_t I2CEVENT_READ_ERROR = 7000, /* read mode error */ - -static const uint32_t I2CEVENT_WRITE_TO_DR = 8, /* EV8 reference manual, writing into the data register param = byte to send */ -static const uint32_t I2CEVENT_WRITE_STOP = 82, /* EV8_2 reference manual, set stop bit after write is finished */ -static const uint32_t I2CEVENT_WRITE_RESTART = 83, /* Re-send start bit as next packet is a read */ -static const uint32_t I2CEVENT_WRITE_NO_RESTART = 84, /* don't restart as packet flag says so */ -static const uint32_t I2CEVENT_WRITE_ERROR = 8000, /* Error in write mode, param = 0 */ +static const uint32_t I2CEVENT_NONE = 0; /* No events have occurred with this status */ +static const uint32_t I2CEVENT_STATE_ERROR = 1000; /* No correct state detected, diver cannot handle state */ +static const uint32_t I2CEVENT_ISR_SHUTDOWN = 1001; /* ISR gets shutdown */ +static const uint32_t I2CEVENT_ISR_EMPTY_CALL = 1002; /* ISR gets called but no I2C logic comes into play */ +static const uint32_t I2CEVENT_MSG_HANDLING = 1003; /* Message Handling 1/1: advances the msg processing param = msgc*/ +static const uint32_t I2CEVENT_POLL_DEV_NOT_RDY = 1004; /* During polled operation if device is not ready yet */ +static const uint32_t I2CEVENT_ISR_CALL = 1111; /* ISR called*/ + +static const uint32_t I2CEVENT_SENDADDR = 5; /* Start/Master bit set and address sent, param = priv->msgv->addr(EV5 in reference manual) */ +static const uint32_t I2CEVENT_ADDR_HDL_READ_1 = 51; /* Read of length 1 address handling, param = 0 */ +static const uint32_t I2CEVENT_ADDR_HDL_READ_2 = 52; /* Read of length 2 address handling, param = 0 */ +static const uint32_t I2CEVENT_EMPTY_MSG = 5000; /* Empty message detected, param=0 */ + +static const uint32_t I2CEVENT_ADDRESS_ACKED = 6; /* Address has been ACKed(i.e. it's a valid address) param = address */ +static const uint32_t I2CEVENT_ADDRESS_ACKED_READ_1 = 63; /* Event when reading single byte just after address is beeing ACKed, param = 0 */ +static const uint32_t I2CEVENT_ADDRESS_ACKED_READ_2 = 61; /* Event when reading two bytes just after address is beeing ACKed, param = 0 */ +static const uint32_t I2CEVENT_ADDRESS_ACKED_WRITE = 681; /* Address has been ACKed(i.e. it's a valid address) in write mode and byte has been written */ +static const uint32_t I2CEVENT_ADDRESS_NACKED = 6000; /* Address has been NACKed(i.e. it's an invalid address) param = address */ + +static const uint32_t I2CEVENT_READ = 7; /* RxNE = 1 therefore can be read, param = dcnt */ +static const uint32_t I2CEVENT_READ_3 = 72; /* EV7_2 reference manual, reading byte N-2 and N-1 when N >=3 */ +static const uint32_t I2CEVENT_READ_2 = 73; /* EV7_3 reference manual, reading byte 1 and 2 when N == 2 */ +static const uint32_t I2CEVENT_READ_SR_EMPTY = 79; /* DR is full but SR is empty, does not read DR and waits for SR to fill in next ISR */ +static const uint32_t I2CEVENT_READ_LAST_BYTE = 72; /* EV7_2 reference manual last two bytes are in SR and DR */ +static const uint32_t I2CEVENT_READ_ERROR = 7000; /* read mode error */ + +static const uint32_t I2CEVENT_WRITE_TO_DR = 8; /* EV8 reference manual, writing into the data register param = byte to send */ +static const uint32_t I2CEVENT_WRITE_STOP = 82; /* EV8_2 reference manual, set stop bit after write is finished */ +static const uint32_t I2CEVENT_WRITE_RESTART = 83; /* Re-send start bit as next packet is a read */ +static const uint32_t I2CEVENT_WRITE_NO_RESTART = 84; /* don't restart as packet flag says so */ +static const uint32_t I2CEVENT_WRITE_ERROR = 8000; /* Error in write mode, param = 0 */ static const uint32_t I2CEVENT_WRITE_FLAG_ERROR = 8001; /* Next message has unrecognized flag, param = priv->msgv->flags */ #endif /* CONFIG_I2C_TRACE */ |