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authorpatacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3>2012-06-01 13:22:27 +0000
committerpatacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3>2012-06-01 13:22:27 +0000
commit61381bfda1b6bd7d614cd22cac7137d4ef73e3bc (patch)
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parent095a7d7b00b349c6cbf0c206a820b1386f155cc0 (diff)
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Interrupt priority fix + new LM3S header files
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4792 42af7a65-404d-4744-a932-0658087f49c3
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@@ -2854,4 +2854,10 @@
distinguish command and data. But FSMC address bits 0-24 correspond to ARM
address bits 1-25, se we need to set bit 17 in order generate output on
FSMC_A16.
+ * arch/arm/src/lm3s/lm3s_epi.h and lm3s_timer.h: LM3S header files
+ (contributed by Max Neklyudov).
+ * arch/arm/src/stm32/stm32_irq.c: Some of the interrupt priorities were
+ not be initialized (F2 and F4 only). Thus, the very high numbered
+ interrupts (like UART6) and cause nested interrupts. This leads to
+ some very difficult to debug crashes. Fix contributed by Mike Smith.