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| author | Gregory Nutt <gnutt@nuttx.org> | 2014-06-20 18:49:01 -0600 |
|---|---|---|
| committer | Gregory Nutt <gnutt@nuttx.org> | 2014-06-20 18:49:01 -0600 |
| commit | 1ab0e68865d471fdb26fb143c88876e7e8fe4c48 (patch) | |
| tree | b79bbda373231e29df64a4386b1f72b5ad219a93 /nuttx/arch/arm/src/armv7-a/arm_vectors.S | |
| parent | 1cd65f54787517b3e29355c8d4fb0b15398267f3 (diff) | |
| download | nuttx-1ab0e68865d471fdb26fb143c88876e7e8fe4c48.tar.gz nuttx-1ab0e68865d471fdb26fb143c88876e7e8fe4c48.tar.bz2 nuttx-1ab0e68865d471fdb26fb143c88876e7e8fe4c48.zip | |
SAMA5: FIQs should be disabled along with IRQs on most exeptions in most configuratinons. arm_decodefiq and arm_decodeirq are mutually exclusive and, hence, can use the same interrupt stack
Diffstat (limited to 'nuttx/arch/arm/src/armv7-a/arm_vectors.S')
| -rw-r--r-- | nuttx/arch/arm/src/armv7-a/arm_vectors.S | 33 |
1 files changed, 11 insertions, 22 deletions
diff --git a/nuttx/arch/arm/src/armv7-a/arm_vectors.S b/nuttx/arch/arm/src/armv7-a/arm_vectors.S index ccdf235e2..53c44c608 100644 --- a/nuttx/arch/arm/src/armv7-a/arm_vectors.S +++ b/nuttx/arch/arm/src/armv7-a/arm_vectors.S @@ -87,7 +87,7 @@ g_fiqtmp: * Name: arm_vectorirq * * Description: - * Interrupt excetpion. Entered in IRQ mode with spsr = SVC CPSR, lr = SVC PC + * Interrupt exception. Entered in IRQ mode with spsr = SVC CPSR, lr = SVC PC * ************************************************************************************/ @@ -109,7 +109,11 @@ arm_vectorirq: /* Then switch back to SVC mode */ bic lr, lr, #PSR_MODE_MASK /* Keep F and T bits */ +#ifdef CONFIG_ARMV7A_DECODEFIQ + orr lr, lr, #(PSR_MODE_SVC | PSR_I_BIT | PSR_F_BIT) +#else orr lr, lr, #(PSR_MODE_SVC | PSR_I_BIT) +#endif msr cpsr_c, lr /* Switch to SVC mode */ /* Create a context structure. First set aside a stack frame @@ -259,7 +263,7 @@ arm_vectordata: /* Then switch back to SVC mode */ bic lr, lr, #PSR_MODE_MASK /* Keep F and T bits */ - orr lr, lr, #(PSR_MODE_SVC | PSR_I_BIT) + orr lr, lr, #(PSR_MODE_SVC | PSR_I_BIT | PSR_F_BIT) msr cpsr_c, lr /* Switch to SVC mode */ /* Create a context structure. First set aside a stack frame @@ -342,7 +346,7 @@ arm_vectorprefetch: /* Then switch back to SVC mode */ bic lr, lr, #PSR_MODE_MASK /* Keep F and T bits */ - orr lr, lr, #(PSR_MODE_SVC | PSR_I_BIT) + orr lr, lr, #(PSR_MODE_SVC | PSR_I_BIT | PSR_F_BIT) msr cpsr_c, lr /* Switch to SVC mode */ /* Create a context structure. First set aside a stack frame @@ -422,7 +426,7 @@ arm_vectorundefinsn: /* Then switch back to SVC mode */ bic lr, lr, #PSR_MODE_MASK /* Keep F and T bits */ - orr lr, lr, #(PSR_MODE_SVC | PSR_I_BIT) + orr lr, lr, #(PSR_MODE_SVC | PSR_I_BIT | PSR_F_BIT) msr cpsr_c, lr /* Switch to SVC mode */ /* Create a context structure. First set aside a stack frame @@ -479,7 +483,7 @@ arm_vectorundefinsn: * * Description: * Shouldn't happen unless a arm_decodefiq() is provided. FIQ is primarily used - * with the TrustZone feature in order to handler secure interrupts. + * with the TrustZone feature in order to handle secure interrupts. * ************************************************************************************/ @@ -502,7 +506,7 @@ arm_vectorfiq: /* Then switch back to SVC mode */ bic lr, lr, #PSR_MODE_MASK /* Keep F and T bits */ - orr lr, lr, #(PSR_MODE_SVC | PSR_I_BIT) + orr lr, lr, #(PSR_MODE_SVC | PSR_I_BIT | PSR_F_BIT) msr cpsr_c, lr /* Switch to SVC mode */ /* Create a context structure. First set aside a stack frame @@ -560,7 +564,7 @@ arm_vectorfiq: .word g_fiqtmp #if CONFIG_ARCH_INTERRUPTSTACK > 3 .Lfiqstackbase: - .word g_fiqstackbase + .word g_intstackbase #endif #else @@ -588,20 +592,5 @@ g_intstackbase: .size g_intstackbase, 4 .size g_intstackalloc, (CONFIG_ARCH_INTERRUPTSTACK & ~3) -#ifdef CONFIG_ARMV7A_DECODEFIQ - - .globl g_fiqstackalloc - .type g_fiqstackalloc, object - .globl g_fiqstackbase - .type g_fiqstackbase, object - -g_fiqstackalloc: - .skip ((CONFIG_ARCH_INTERRUPTSTACK & ~3) - 4) -g_fiqstackbase: - .skip 4 - .size g_fiqstackbase, 4 - .size g_fiqstackalloc, (CONFIG_ARCH_INTERRUPTSTACK & ~3) - -#endif /* CONFIG_ARMV7A_DECODEFIQ */ #endif /* CONFIG_ARCH_INTERRUPTSTACK > 3 */ .end |