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| author | Gregory Nutt <gnutt@nuttx.org> | 2014-08-26 06:33:26 -0600 |
|---|---|---|
| committer | Gregory Nutt <gnutt@nuttx.org> | 2014-08-26 06:33:26 -0600 |
| commit | 0945e8489a8b96acffcdaf36e1a17e4544238aa7 (patch) | |
| tree | 5e31b3daf63d6bdca7c5fa08d5e712a46830a7e8 /nuttx/arch/arm/src/armv7-a/mmu.h | |
| parent | bda92108291caded03cf62f00c7073726e4a1d3f (diff) | |
| download | nuttx-0945e8489a8b96acffcdaf36e1a17e4544238aa7.tar.gz nuttx-0945e8489a8b96acffcdaf36e1a17e4544238aa7.tar.bz2 nuttx-0945e8489a8b96acffcdaf36e1a17e4544238aa7.zip | |
Cortex-A address environment: Fix some section mapping and address increments
Diffstat (limited to 'nuttx/arch/arm/src/armv7-a/mmu.h')
| -rw-r--r-- | nuttx/arch/arm/src/armv7-a/mmu.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/nuttx/arch/arm/src/armv7-a/mmu.h b/nuttx/arch/arm/src/armv7-a/mmu.h index 8c5819553..84fa18a50 100644 --- a/nuttx/arch/arm/src/armv7-a/mmu.h +++ b/nuttx/arch/arm/src/armv7-a/mmu.h @@ -562,6 +562,7 @@ /* Mapped section size */ #define SECTION_SIZE (1 << 20) /* 1Mb */ +#define SECTION_MASK (SECTION_SIZE - 1) /* The Cortex-A5 supports two translation table base address registers. In * this, implementation, only Translation Table Base Register 0 (TTBR0) is |