Mostly cosmetic changes from Max

3 files changed, 25 insertions, 66 deletions

diff --git a/nuttx/arch/arm/src/lpc17xx/lpc17_dac.c b/nuttx/arch/arm/src/lpc17xx/lpc17_dac.c
index 7c7c31311..3f2fa5a70 100644
--- a/nuttx/arch/arm/src/lpc17xx/lpc17_dac.c
+++ b/nuttx/arch/arm/src/lpc17xx/lpc17_dac.c
@@ -84,7 +84,6 @@ static void dac_shutdown(FAR struct dac_dev_s *dev);
 static void dac_txint(FAR struct dac_dev_s *dev, bool enable);
 static int  dac_send(FAR struct dac_dev_s *dev, FAR struct dac_msg_s *msg);
 static int  dac_ioctl(FAR struct dac_dev_s *dev, int cmd, unsigned long arg);
-static int  dac_interrupt(int irq, void *context);
 
 /****************************************************************************
  * Private Data
@@ -176,10 +175,6 @@ static int  dac_ioctl(FAR struct dac_dev_s *dev, int cmd, unsigned long arg)
   return 0;
 }
 
-static int  dac_interrupt(int irq, void *context)
-{
-}
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
diff --git a/nuttx/arch/arm/src/lpc17xx/lpc17_pwm.c b/nuttx/arch/arm/src/lpc17xx/lpc17_pwm.c
index e9efc0cd5..d983b71a5 100644
--- a/nuttx/arch/arm/src/lpc17xx/lpc17_pwm.c
+++ b/nuttx/arch/arm/src/lpc17xx/lpc17_pwm.c
@@ -304,7 +304,6 @@ static int pwm_timer(FAR struct lpc17_pwmtimer_s *priv,
                      FAR const struct pwm_info_s *info)
 {
   irqstate_t flags;
-  uint32_t regval;
 
   flags = irqsave();
 
@@ -462,7 +461,7 @@ static int pwm_setup(FAR struct pwm_lowerhalf_s *dev)
 
   lpc17_configgpio(GPIO_PWM1p1_1);
 
-  putreg32(1, LPC17_PWM1_PR);        /* Prescaler count frequency:Fpclk/1 */
+  putreg32(1, LPC17_PWM1_PR);        /* Prescaler count frequency: Fpclk/1 */
   putreg32(1 << 1, LPC17_PWM1_MCR);  /* Reset on match register MR0 */
 
   irqrestore(flags);
diff --git a/nuttx/arch/arm/src/lpc17xx/lpc17_timer.c b/nuttx/arch/arm/src/lpc17xx/lpc17_timer.c
index c1e2112de..747137fb3 100644
--- a/nuttx/arch/arm/src/lpc17xx/lpc17_timer.c
+++ b/nuttx/arch/arm/src/lpc17xx/lpc17_timer.c
@@ -292,11 +292,11 @@ static int timer_timer(FAR struct lpc17_timer_s *priv,
 
   flags = irqsave();
 
-  putreg32(info->frequency, LPC17_TMR0_MR1);  /* Set TIMER MR0 = number of counts */
-  putreg32(info->frequency, LPC17_TMR1_MR0);  /* Set TIMER MR0 = number of counts */
+  putreg32(info->frequency, LPC17_TMR0_MR1);  /* Set TIMER0 MR1 = number of counts */
+  putreg32(info->frequency, LPC17_TMR1_MR0);  /* Set TIMER1 MR0 = number of counts */
 
-  putreg32(1, LPC17_TMR0_TCR);                /* Start timer0*/
-  putreg32(1, LPC17_TMR1_TCR);                /* Start timer0*/
+  putreg32(1, LPC17_TMR0_TCR);                /* Start timer0 */
+  putreg32(1, LPC17_TMR1_TCR);                /* Start timer1 */
 
   irqrestore(flags);
   timer_dumpregs(priv, "After starting");
@@ -357,47 +357,7 @@ static int timer_tim1interrupt(int irq, void *context)
   return timer_interrupt(&g_pwm1dev);
 }
 
-/****************************************************************************
- * Name: timer_set_apb_clock
- *
- * Description:
- *   Enable or disable APB clock for the timer peripheral
- *
- * Input parameters:
- *   dev - A reference to the lower half PWM driver state structure
- *   on  - Enable clock if 'on' is 'true' and disable if 'false'
- *
- ****************************************************************************/
-
-static void timer_set_apb_clock(FAR struct lpc17_timer_s *priv, bool on)
-{
-  uint32_t en_bit;
-  uint32_t regaddr;
-
-  /* Determine which timer to configure */
-
-  switch (priv->timid)
-    {
-#ifdef CONFIG_LPC17_TMR0
-      case 1:
-        regaddr  = STM32_RCC_APB2ENR;
-        en_bit   = RCC_APB2ENR_TIM1EN;
-        break;
-#endif
-    }
-
-  /* Enable/disable APB 1/2 clock for timer */
-
-  if (on)
-    {
-      modifyreg32(regaddr, 0, en_bit);
-    }
-  else
-    {
-      modifyreg32(regaddr, en_bit, 0);
-    }
-}
-#endif /*XXXXX*/
+#endif /* XXXXX */
 
 /****************************************************************************
  * Name: timer_setup
@@ -440,39 +400,44 @@ static int timer_setup(FAR struct pwm_lowerhalf_s *dev)
 
   regval  = getreg32(LPC17_SYSCON_PCLKSEL0);
   regval &= ~(0x3 << 2);
-  regval |= (0x1 << 2);                  /* PCLK_MC peripheral clk = CCLK = 12.5 MHz */
+  regval |= (0x1 << 2);                  /* PCLK_MC peripheral clk=CCLK=12.5 MHz */
   regval &= ~(0x3 << 4);
-  regval |= (0x1 << 4);                  /* PCLK_MC peripheral clk = CCLK = 12.5 MHz */
+  regval |= (0x1 << 4);                  /* PCLK_MC peripheral clk=CCLK=12.5 MHz */
   putreg32(regval, LPC17_SYSCON_PCLKSEL0);
   regval  = getreg32(LPC17_SYSCON_PCLKSEL1);
   regval &= ~(0x3 << 12);
-  regval |= (0x1 << 12);                 /* PCLK_MC peripheral clk = CCLK = 12.5 MHz */
+  regval |= (0x1 << 12);                 /* PCLK_MC peripheral clk=CCLK=12.5 MHz */
   regval &= ~(0x3 << 14);
-  regval |= (0x1 << 14);                 /* PCLK_MC peripheral clk = CCLK = 12.5 MHz */
+  regval |= (0x1 << 14);                 /* PCLK_MC peripheral clk=CCLK=12.5 MHz */
   putreg32(regval, LPC17_SYSCON_PCLKSEL1);
   priv->pclk = (0x1 << 12) | (0x1 << 4);
 
-  putreg32(500, LPC17_TMR0_MR1);         /* Set TIMER0 MR1 = number of counts */
+  putreg32(1000, LPC17_TMR0_MR1);        /* Set TIMER0 MR1 = number of counts */
 
-  putreg32(1, LPC17_TMR0_PR);            /* Prescaler count frequency:Fpclk/1 */
-  putreg32(~(0x3 << 0), LPC17_TMR0_CCR); /* Prescaler count frequency:Fpclk/1 */
-  putreg32(~(0x3 << 0), LPC17_TMR0_CTCR);/* Prescaler count frequency:Fpclk/1 */
-  putreg32((2 << 3), LPC17_TMR0_MCR);    /* Reset on match register MR1*/
-  putreg32(((1 << 1)|(3 << 6)), LPC17_TMR0_EMR); /* Output bit toggle on external match event*/
+  putreg32(1, LPC17_TMR0_PR);            /* Prescaler count frequency: Fpclk/1 */
+  putreg32(~(0x3 << 0), LPC17_TMR0_CCR); /* Prescaler count frequency: Fpclk/1 */
+  putreg32(~(0x3 << 0), LPC17_TMR0_CTCR);/* Prescaler count frequency: Fpclk/1 */
+  putreg32((2 << 3), LPC17_TMR0_MCR);    /* Reset on match register MR1 */
+
+  /* Output bit toggle on external match event External match on MR1, Toggle
+   * external bit
+   */
+
+  putreg32(((1 << 1)|(3 << 6)), LPC17_TMR0_EMR);
   putreg32((1 << 0), LPC17_TMR0_TCR);    /* Start timer0*/
 
-  /* Sonfigure the output pins GPIO3.26*/
+  /* Configure the output pins GPIO3.26 */
 
   lpc17_configgpio(GPIO_MAT0p1_2);
 
-  putreg32(1000, LPC17_TMR1_MR0);        /* Set TIMER1 MR0 = number of counts */
+  putreg32(500, LPC17_TMR1_MR0);         /* Set TIMER1 MR0 = number of counts */
 
   putreg32(1, LPC17_TMR1_PR);            /* Prescaler count frequency:Fpclk/1 */
   putreg32(~(0x3 << 0), LPC17_TMR1_CCR); /* Prescaler count frequency:Fpclk/1 */
   putreg32(~(0x3 << 0), LPC17_TMR1_CTCR);/* Prescaler count frequency:Fpclk/1 */
   putreg32((2 << 0), LPC17_TMR1_MCR);    /* Reset on match register MR0 */
 //  putreg32(((1 << 0)|(3 << 4)), LPC17_TMR1_EMR); /* Output bit toggle on external match event MAT0*/
-  putreg32((1 << 0), LPC17_TMR1_TCR);   /* Start timer1*/
+  putreg32((1 << 0), LPC17_TMR1_TCR);    /* Start timer1*/
 
   /* configure the output pins GPIO3.26 */
 //  lpc17_configgpio(GPIO_MAT0p1_2);
@@ -526,7 +491,7 @@ static int timer_shutdown(FAR struct pwm_lowerhalf_s *dev)
  ****************************************************************************/
 
 static int timer_start(FAR struct pwm_lowerhalf_s *dev,
-                     FAR const struct pwm_info_s *info)
+                       FAR const struct pwm_info_s *info)
 {
   FAR struct lpc17_timer_s *priv = (FAR struct lpc17_timer_s *)dev;
   return timer_timer(priv, info);