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author | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2013-03-18 21:10:08 +0000 |
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committer | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2013-03-18 21:10:08 +0000 |
commit | c3998d2feead04441a90dcd45c6a35f8477b7fd6 (patch) | |
tree | 236e9eb67fcdb788b9ccb454e931703fe30a74ce /nuttx/arch/arm/src/lpc43xx | |
parent | bef7c0ac3dcfd2277e3df45a5767f27187633bb2 (diff) | |
download | nuttx-c3998d2feead04441a90dcd45c6a35f8477b7fd6.tar.gz nuttx-c3998d2feead04441a90dcd45c6a35f8477b7fd6.tar.bz2 nuttx-c3998d2feead04441a90dcd45c6a35f8477b7fd6.zip |
Add support for ram vectors to the ARMv7-M architecture
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5756 42af7a65-404d-4744-a932-0658087f49c3
Diffstat (limited to 'nuttx/arch/arm/src/lpc43xx')
-rw-r--r-- | nuttx/arch/arm/src/lpc43xx/Make.defs | 6 | ||||
-rw-r--r-- | nuttx/arch/arm/src/lpc43xx/lpc43_irq.c | 8 |
2 files changed, 13 insertions, 1 deletions
diff --git a/nuttx/arch/arm/src/lpc43xx/Make.defs b/nuttx/arch/arm/src/lpc43xx/Make.defs index 9674196c5..0354b698b 100644 --- a/nuttx/arch/arm/src/lpc43xx/Make.defs +++ b/nuttx/arch/arm/src/lpc43xx/Make.defs @@ -51,8 +51,12 @@ CMN_ASRCS += up_exception.S CMN_CSRCS += up_vectors.c endif +ifeq ($(CONFIG_ARCH_RAMVECTORS),y) +CMN_CSRCS += up_ramvec_initialize.c up_ramvec_attach.c +endif + ifeq ($(CONFIG_ARCH_MEMCPY),y) -CMN_ASRCS += up_memcpy.S +CMN_ASRCS += up_memcpy.S endif ifeq ($(CONFIG_DEBUG_STACK),y) diff --git a/nuttx/arch/arm/src/lpc43xx/lpc43_irq.c b/nuttx/arch/arm/src/lpc43xx/lpc43_irq.c index 6f49b3e38..042b3360b 100644 --- a/nuttx/arch/arm/src/lpc43xx/lpc43_irq.c +++ b/nuttx/arch/arm/src/lpc43xx/lpc43_irq.c @@ -49,6 +49,7 @@ #include "chip.h" #include "nvic.h" +#include "ram_vectors.h" #include "up_arch.h" #include "os_internal.h" #include "up_internal.h" @@ -309,9 +310,16 @@ void up_irqinitialize(void) * positioned in SRAM or in external FLASH, then we may need to reset * the interrupt vector so that it refers to the table in SRAM or in * external FLASH. + * + * If CONFIG_ARCH_RAMVECTORS is defined, then we are using a RAM-based + * vector table that requires special initialization. */ +#ifdef CONFIG_ARCH_RAMVECTORS + up_ramvec_initialize(); +#else putreg32((uint32_t)_vectors, NVIC_VECTAB); +#endif /* Set all interrupts (and exceptions) to the default priority */ |