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author | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2013-01-22 01:25:40 +0000 |
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committer | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2013-01-22 01:25:40 +0000 |
commit | fefa8ee3353d5ac7ef0e925ba8dcbbb89f2c96ae (patch) | |
tree | a1914fb5c45a61232078c98064198ac8818f07b4 /nuttx/arch/arm/src/lpc43xx | |
parent | c86261aac88dcc280ca37e532ba96435c1c54699 (diff) | |
download | nuttx-fefa8ee3353d5ac7ef0e925ba8dcbbb89f2c96ae.tar.gz nuttx-fefa8ee3353d5ac7ef0e925ba8dcbbb89f2c96ae.tar.bz2 nuttx-fefa8ee3353d5ac7ef0e925ba8dcbbb89f2c96ae.zip |
Add option to use BASEPRI instead of PRIMASK to disable interrupts in all ARMv7-M architectures
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5546 42af7a65-404d-4744-a932-0658087f49c3
Diffstat (limited to 'nuttx/arch/arm/src/lpc43xx')
-rw-r--r-- | nuttx/arch/arm/src/lpc43xx/chip.h | 19 | ||||
-rw-r--r-- | nuttx/arch/arm/src/lpc43xx/lpc43_irq.c | 42 |
2 files changed, 41 insertions, 20 deletions
diff --git a/nuttx/arch/arm/src/lpc43xx/chip.h b/nuttx/arch/arm/src/lpc43xx/chip.h index 35150d08c..151571e74 100644 --- a/nuttx/arch/arm/src/lpc43xx/chip.h +++ b/nuttx/arch/arm/src/lpc43xx/chip.h @@ -1,7 +1,7 @@ /************************************************************************************ * arch/arm/src/lpc43xx/chip.h * - * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Copyright (C) 2012-2013 Gregory Nutt. All rights reserved. * Author: Gregory Nutt <gnutt@nuttx.org> * * Redistribution and use in source and binary forms, with or without @@ -141,23 +141,6 @@ * Pre-processor Definitions ************************************************************************************/ -/* NVIC priority levels *************************************************************/ -/* Each priority field holds a priority value, 0-31. The lower the value, the greater - * the priority of the corresponding interrupt. - * - * The Cortex-M4 core supports up to 53 interrupts an 8 prgrammable interrupt - * priority levels; The Cortex-M0 core supports up to 32 interrupts with 4 - * programmable interrupt priorities. - */ - -#define LPC43M4_SYSH_PRIORITY_MIN 0xe0 /* All bits[7:5] set is minimum priority */ -#define LPC43M4_SYSH_PRIORITY_DEFAULT 0x80 /* Midpoint is the default */ -#define LPC43M4_SYSH_PRIORITY_MAX 0x00 /* Zero is maximum priority */ - -#define LPC43M0_SYSH_PRIORITY_MIN 0xc0 /* All bits[7:6] set is minimum priority */ -#define LPC43M0_SYSH_PRIORITY_DEFAULT 0x80 /* Midpoint is the default */ -#define LPC43M0_SYSH_PRIORITY_MAX 0x00 /* Zero is maximum priority */ - /************************************************************************************ * Public Types ************************************************************************************/ diff --git a/nuttx/arch/arm/src/lpc43xx/lpc43_irq.c b/nuttx/arch/arm/src/lpc43xx/lpc43_irq.c index 9cbb8238c..2fddd79ad 100644 --- a/nuttx/arch/arm/src/lpc43xx/lpc43_irq.c +++ b/nuttx/arch/arm/src/lpc43xx/lpc43_irq.c @@ -2,7 +2,7 @@ * arch/arm/src/lpc43/lpc43_irq.c * arch/arm/src/chip/lpc43_irq.c * - * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Copyright (C) 2012-2013 Gregory Nutt. All rights reserved. * Author: Gregory Nutt <gnutt@nuttx.org> * * Redistribution and use in source and binary forms, with or without @@ -192,6 +192,35 @@ static int lpc43_reserved(int irq, FAR void *context) #endif /**************************************************************************** + * Name: up_prioritize_irq + * + * Description: + * Set the priority of an exception. This function may be needed + * internally even if support for prioritized interrupts is not enabled. + * + ****************************************************************************/ + +#if !defined(CONFIG_ARCH_IRQPRIO) && defined(CONFIG_ARMV7M_USEBASEPRI) +static int up_prioritize_irq(int irq, int priority) +{ + uint32_t regaddr; + uint32_t regval; + int shift; + + irq -= 4; + regaddr = NVIC_SYSH_PRIORITY(irq); + regval = getreg32(regaddr); + shift = ((irq & 3) << 3); + regval &= ~(0xff << shift); + regval |= (priority << shift); + putreg32(regval, regaddr); + + stm32_dumpnvic("prioritize", irq); + return OK; +} +#endif + +/**************************************************************************** * Name: lpc43_irqinfo * * Description: @@ -334,6 +363,9 @@ void up_irqinitialize(void) #ifdef CONFIG_ARCH_IRQPRIO /* up_prioritize_irq(LPC43_IRQ_PENDSV, NVIC_SYSH_PRIORITY_MIN); */ #endif +#ifdef CONFIG_ARMV7M_USEBASEPRI + up_prioritize_irq(LPC43_IRQ_SVCALL, NVIC_SYSH_SVCALL_PRIORITY); +#endif /* If the MPU is enabled, then attach and enable the Memory Management * Fault handler. @@ -477,8 +509,14 @@ int up_prioritize_irq(int irq, int priority) uint32_t regval; int shift; +#ifdef CONFIG_ARMV7M_USEBASEPRI DEBUGASSERT(irq >= LPC43_IRQ_MEMFAULT && irq < NR_IRQS && - (unsigned)priority <= LPC43M4_SYSH_PRIORITY_MIN); + priority >= NVIC_SYSH_DISABLE_PRIORITY && + priority <= NVIC_SYSH_PRIORITY_MIN); +#else + DEBUGASSERT(irq >= LPC43_IRQ_MEMFAULT && irq < NR_IRQS && + (unsigned)priority <= NVIC_SYSH_PRIORITY_MIN); +#endif if (irq < LPC43_IRQ_EXTINT) { |