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| author | Gregory Nutt <gnutt@nuttx.org> | 2014-02-18 10:37:42 -0600 |
|---|---|---|
| committer | Gregory Nutt <gnutt@nuttx.org> | 2014-02-18 10:37:42 -0600 |
| commit | a5ace7642fac95547c78bf5514f985e14564378f (patch) | |
| tree | 927c375e5f94983eb71e0c47203f84cf980c2031 /nuttx/arch/arm/src/samd | |
| parent | 34f8b40f7145ced0da75670d9ff4aaa711169b6a (diff) | |
| download | nuttx-a5ace7642fac95547c78bf5514f985e14564378f.tar.gz nuttx-a5ace7642fac95547c78bf5514f985e14564378f.tar.bz2 nuttx-a5ace7642fac95547c78bf5514f985e14564378f.zip | |
SAMD20: Increase FLASH waitstates to 2
Diffstat (limited to 'nuttx/arch/arm/src/samd')
| -rw-r--r-- | nuttx/arch/arm/src/samd/sam_clockconfig.c | 37 |
1 files changed, 33 insertions, 4 deletions
diff --git a/nuttx/arch/arm/src/samd/sam_clockconfig.c b/nuttx/arch/arm/src/samd/sam_clockconfig.c index 995d83c0c..7556d3b79 100644 --- a/nuttx/arch/arm/src/samd/sam_clockconfig.c +++ b/nuttx/arch/arm/src/samd/sam_clockconfig.c @@ -691,12 +691,41 @@ static inline void sam_dfll_reference(void) regval |= GCLK_CLKCTRL_CLKEN; putreg16(regval, SAM_GCLK_CLKCTRL); + + /* The CLKCTRL.CLKEN bit must be synchronized to the generic clock domain. + * CLKCTRL.CLKEN will continue to read as its previous state until the + * synchronization is complete. + */ + + while ((getreg16(SAM_GCLK_CLKCTRL) & GCLK_CLKCTRL_CLKEN) == 0); } #else # define sam_dfll_reference() #endif /**************************************************************************** + * Name: sam_gclck_waitsyncbusy + * + * Description: + * What until the SYNCBUSY bit is cleared. This bit is cleared when the + * synchronization of registers between the clock domains is complete. + * This bit is set when the synchronization of registers between clock + * domains is started. + * + * Input Parameters: + * None + * + * Returned Value: + * None + * + ****************************************************************************/ + +static void sam_gclck_waitsyncbusy(void) +{ + while ((getreg8(SAM_GCLK_STATUS) & GCLK_STATUS_SYNCBUSY) != 0); +} + +/**************************************************************************** * Name: sam_config_gclks * * Description: @@ -791,7 +820,7 @@ static inline void sam_gclk_config(FAR const struct sam_gclkconfig_s *config) /* Wait for synchronization */ - while ((getreg8(SAM_GCLK_STATUS) & GCLK_STATUS_SYNCBUSY) != 0); + sam_gclck_waitsyncbusy(); /* Select the generator */ @@ -800,7 +829,7 @@ static inline void sam_gclk_config(FAR const struct sam_gclkconfig_s *config) /* Wait for synchronization */ - while ((getreg8(SAM_GCLK_STATUS) & GCLK_STATUS_SYNCBUSY) != 0); + sam_gclck_waitsyncbusy(); /* Write the new generator configuration */ @@ -808,7 +837,7 @@ static inline void sam_gclk_config(FAR const struct sam_gclkconfig_s *config) /* Wait for synchronization */ - while ((getreg8(SAM_GCLK_STATUS) & GCLK_STATUS_SYNCBUSY) != 0); + sam_gclck_waitsyncbusy(); /* Enable the clock generator */ @@ -817,7 +846,7 @@ static inline void sam_gclk_config(FAR const struct sam_gclkconfig_s *config) /* Wait for synchronization */ - while ((getreg8(SAM_GCLK_STATUS) & GCLK_STATUS_SYNCBUSY) != 0); + sam_gclck_waitsyncbusy(); } #endif |