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| author | Gregory Nutt <gnutt@nuttx.org> | 2014-03-09 13:57:35 -0600 |
|---|---|---|
| committer | Gregory Nutt <gnutt@nuttx.org> | 2014-03-09 13:57:35 -0600 |
| commit | 4fe89c2eb6d5895da7f3017f7f44e48e7892b3b9 (patch) | |
| tree | d8fab46c8c6d518b0c2837e5e3fe50bfc1a52f5a /nuttx/arch/arm/src/tiva/chip/lm4f_memorymap.h | |
| parent | e94b84fef71929f931aa92f5c51c24631900f091 (diff) | |
| download | nuttx-4fe89c2eb6d5895da7f3017f7f44e48e7892b3b9.tar.gz nuttx-4fe89c2eb6d5895da7f3017f7f44e48e7892b3b9.tar.bz2 nuttx-4fe89c2eb6d5895da7f3017f7f44e48e7892b3b9.zip | |
TIVA: Add memory map for the TM4C123
Diffstat (limited to 'nuttx/arch/arm/src/tiva/chip/lm4f_memorymap.h')
| -rw-r--r-- | nuttx/arch/arm/src/tiva/chip/lm4f_memorymap.h | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/nuttx/arch/arm/src/tiva/chip/lm4f_memorymap.h b/nuttx/arch/arm/src/tiva/chip/lm4f_memorymap.h index 3c9d63e08..f4f97edc2 100644 --- a/nuttx/arch/arm/src/tiva/chip/lm4f_memorymap.h +++ b/nuttx/arch/arm/src/tiva/chip/lm4f_memorymap.h @@ -127,9 +127,9 @@ # define TIVA_ADC0_BASE (TIVA_PERIPH_BASE + 0x38000) /* -0x38fff: ADC 0 */ # define TIVA_ADC1_BASE (TIVA_PERIPH_BASE + 0x39000) /* -0x39fff: ADC 1 */ /* -0x3bfff: Reserved */ -# define TIVA_COMPARE_BASE (TIVA_PERIPH_BASE + 0x3c000) /* -0x3cfff: Analog Comparators */ +# define TIVA_CMP_BASE (TIVA_PERIPH_BASE + 0x3c000) /* -0x3cfff: Analog Comparators */ /* -0x43fff: Reserved */ -# define TIVA_CANCON_BASE (TIVA_PERIPH_BASE + 0x40000) /* -0x40fff: CAN Controller */ +# define TIVA_CAN0_BASE (TIVA_PERIPH_BASE + 0x40000) /* -0x40fff: CAN Controller */ /* -0x4bfff: Reserved */ # define TIVA_WTIMER2_BASE (TIVA_PERIPH_BASE + 0x4c000) /* -0x4cfff: 32/64 Wide Timer 2 */ # define TIVA_WTIMER3_BASE (TIVA_PERIPH_BASE + 0x4d000) /* -0x4dfff: 32/64 Wide Timer 3 */ @@ -139,10 +139,10 @@ /* -0x57fff: Reserved */ # define TIVA_GPIOAAHB_BASE (TIVA_PERIPH_BASE + 0x58000) /* -0x58fff: GPIO Port A (AHB aperture) */ # define TIVA_GPIOBAHB_BASE (TIVA_PERIPH_BASE + 0x59000) /* -0x59fff: GPIO Port B (AHB aperture) */ -# define TIVA_GPIOCAHB_BASE (TIVA_PERIPH_BASE + 0x5A000) /* -0x5afff: GPIO Port C (AHB aperture) */ -# define TIVA_GPIODAHB_BASE (TIVA_PERIPH_BASE + 0x5B000) /* -0x5bfff: GPIO Port D (AHB aperture) */ -# define TIVA_GPIOEAHB_BASE (TIVA_PERIPH_BASE + 0x5C000) /* -0x5cfff: GPIO Port E (AHB aperture) */ -# define TIVA_GPIOFAHB_BASE (TIVA_PERIPH_BASE + 0x5D000) /* -0x5dfff: GPIO Port F (AHB aperture) */ +# define TIVA_GPIOCAHB_BASE (TIVA_PERIPH_BASE + 0x5a000) /* -0x5afff: GPIO Port C (AHB aperture) */ +# define TIVA_GPIODAHB_BASE (TIVA_PERIPH_BASE + 0x5b000) /* -0x5bfff: GPIO Port D (AHB aperture) */ +# define TIVA_GPIOEAHB_BASE (TIVA_PERIPH_BASE + 0x5c000) /* -0x5cfff: GPIO Port E (AHB aperture) */ +# define TIVA_GPIOFAHB_BASE (TIVA_PERIPH_BASE + 0x5d000) /* -0x5dfff: GPIO Port F (AHB aperture) */ /* -0xaefff: Reserved */ # define TIVA_EEPROM_BASE (TIVA_PERIPH_BASE + 0xaf000) /* -0xaffff: EEPROM and Key Locker */ /* -0xf8fff: Reserved */ |