diff options
| author | Gregory Nutt <gnutt@nuttx.org> | 2014-12-09 08:41:50 -0600 |
|---|---|---|
| committer | Gregory Nutt <gnutt@nuttx.org> | 2014-12-09 08:42:12 -0600 |
| commit | 1ad3520837206e3a32d067bef5d09c65cf9ff258 (patch) | |
| tree | db91396aec5d7249c11739d04bd8b723be4aa5ba /nuttx/arch/arm/src/tiva/chip/tm4c_memorymap.h | |
| parent | e00533c0a45724f20eaf6fc491128dbee47f4030 (diff) | |
| download | nuttx-1ad3520837206e3a32d067bef5d09c65cf9ff258.tar.gz nuttx-1ad3520837206e3a32d067bef5d09c65cf9ff258.tar.bz2 nuttx-1ad3520837206e3a32d067bef5d09c65cf9ff258.zip | |
Update the Tiva I2C register definitions for the TM4C123 and TM4C129
Diffstat (limited to 'nuttx/arch/arm/src/tiva/chip/tm4c_memorymap.h')
| -rw-r--r-- | nuttx/arch/arm/src/tiva/chip/tm4c_memorymap.h | 28 |
1 files changed, 14 insertions, 14 deletions
diff --git a/nuttx/arch/arm/src/tiva/chip/tm4c_memorymap.h b/nuttx/arch/arm/src/tiva/chip/tm4c_memorymap.h index cba7e5f3b..24f25e2f3 100644 --- a/nuttx/arch/arm/src/tiva/chip/tm4c_memorymap.h +++ b/nuttx/arch/arm/src/tiva/chip/tm4c_memorymap.h @@ -123,16 +123,16 @@ # define TIVA_I2CM0_BASE (TIVA_PERIPH_BASE + 0x20000) /* -0x207ff: I2C Master 0 */ # define TIVA_I2CS0_BASE (TIVA_PERIPH_BASE + 0x20800) /* -0x20fbf: I2C Slave 0 */ -# define TIVA_I2CSC0_BASE (TIVA_PERIPH_BASE + 0x20fc0) /* -0x20fff: I2C Status and Control 0 */ +# define TIVA_I2CSC0_BASE (TIVA_PERIPH_BASE + 0x20f00) /* -0x20fff: I2C Status and Control 0 */ # define TIVA_I2CM1_BASE (TIVA_PERIPH_BASE + 0x21000) /* -0x217ff: I2C Master 1 */ # define TIVA_I2CS1_BASE (TIVA_PERIPH_BASE + 0x21800) /* -0x21fbf: I2C Slave 1 */ -# define TIVA_I2CSC1_BASE (TIVA_PERIPH_BASE + 0x21fc0) /* -0x21fff: I2C Status and Control 1 */ +# define TIVA_I2CSC1_BASE (TIVA_PERIPH_BASE + 0x21f00) /* -0x21fff: I2C Status and Control 1 */ # define TIVA_I2CM2_BASE (TIVA_PERIPH_BASE + 0x22000) /* -0x227ff: I2C Master 2 */ # define TIVA_I2CS2_BASE (TIVA_PERIPH_BASE + 0x22800) /* -0x22fbf: I2C Slave 2 */ -# define TIVA_I2CSC2_BASE (TIVA_PERIPH_BASE + 0x22fc0) /* -0x22fff: I2C Status and Control 2 */ +# define TIVA_I2CSC2_BASE (TIVA_PERIPH_BASE + 0x22f00) /* -0x22fff: I2C Status and Control 2 */ # define TIVA_I2CM3_BASE (TIVA_PERIPH_BASE + 0x23000) /* -0x237ff: I2C Master 3 */ # define TIVA_I2CS3_BASE (TIVA_PERIPH_BASE + 0x23800) /* -0x23fbf: I2C Slave 3 */ -# define TIVA_I2CSC3_BASE (TIVA_PERIPH_BASE + 0x23fc0) /* -0x23fff: I2C Status and Control 3 */ +# define TIVA_I2CSC3_BASE (TIVA_PERIPH_BASE + 0x23f00) /* -0x23fff: I2C Status and Control 3 */ # define TIVA_GPIOE_BASE (TIVA_PERIPH_BASE + 0x24000) /* -0x24fff: GPIO Port E */ # define TIVA_GPIOF_BASE (TIVA_PERIPH_BASE + 0x25000) /* -0x25fff: GPIO Port F */ # define TIVA_GPIOG_BASE (TIVA_PERIPH_BASE + 0x26000) /* -0x26fff: GPIO Port G */ @@ -183,10 +183,10 @@ /* -0xbffff: Reserved */ # define TIVA_I2CM4_BASE (TIVA_PERIPH_BASE + 0xc0000) /* -0x207ff: I2C Master 4 */ # define TIVA_I2CS4_BASE (TIVA_PERIPH_BASE + 0xc0800) /* -0x20fbf: I2C Slave 4 */ -# define TIVA_I2CSC4_BASE (TIVA_PERIPH_BASE + 0xc0fc0) /* -0x20fff: I2C Status and Control 4 */ +# define TIVA_I2CSC4_BASE (TIVA_PERIPH_BASE + 0xc0f00) /* -0x20fff: I2C Status and Control 4 */ # define TIVA_I2CM5_BASE (TIVA_PERIPH_BASE + 0xc1000) /* -0x207ff: I2C Master 5 */ # define TIVA_I2CS5_BASE (TIVA_PERIPH_BASE + 0xc1800) /* -0x20fbf: I2C Slave 5 */ -# define TIVA_I2CSC5_BASE (TIVA_PERIPH_BASE + 0xc1fc0) /* -0x20fff: I2C Status and Control 5 */ +# define TIVA_I2CSC5_BASE (TIVA_PERIPH_BASE + 0xc1f00) /* -0x20fff: I2C Status and Control 5 */ /* -0xf8fff: Reserved */ # define TIVA_SYSEXC_BASE (TIVA_PERIPH_BASE + 0xf9000) /* -0xf9fff: System Exception Control */ /* -0xfbfff: Reserved */ @@ -221,16 +221,16 @@ # define TIVA_I2CM0_BASE (TIVA_PERIPH_BASE + 0x20000) /* -0x207ff: I2C Master 0 */ # define TIVA_I2CS0_BASE (TIVA_PERIPH_BASE + 0x20800) /* -0x20fbf: I2C Slave 0 */ -# define TIVA_I2CSC0_BASE (TIVA_PERIPH_BASE + 0x20fc0) /* -0x20fff: I2C Status and Control 0 */ +# define TIVA_I2CSC0_BASE (TIVA_PERIPH_BASE + 0x20f00) /* -0x20fff: I2C Status and Control 0 */ # define TIVA_I2CM1_BASE (TIVA_PERIPH_BASE + 0x21000) /* -0x217ff: I2C Master 1 */ # define TIVA_I2CS1_BASE (TIVA_PERIPH_BASE + 0x21800) /* -0x21fbf: I2C Slave 1 */ -# define TIVA_I2CSC1_BASE (TIVA_PERIPH_BASE + 0x21fc0) /* -0x21fff: I2C Status and Control 1 */ +# define TIVA_I2CSC1_BASE (TIVA_PERIPH_BASE + 0x21f00) /* -0x21fff: I2C Status and Control 1 */ # define TIVA_I2CM2_BASE (TIVA_PERIPH_BASE + 0x22000) /* -0x227ff: I2C Master 2 */ # define TIVA_I2CS2_BASE (TIVA_PERIPH_BASE + 0x22800) /* -0x22fbf: I2C Slave 2 */ -# define TIVA_I2CSC2_BASE (TIVA_PERIPH_BASE + 0x22fc0) /* -0x22fff: I2C Status and Control 2 */ +# define TIVA_I2CSC2_BASE (TIVA_PERIPH_BASE + 0x22f00) /* -0x22fff: I2C Status and Control 2 */ # define TIVA_I2CM3_BASE (TIVA_PERIPH_BASE + 0x23000) /* -0x237ff: I2C Master 3 */ # define TIVA_I2CS3_BASE (TIVA_PERIPH_BASE + 0x23800) /* -0x23fbf: I2C Slave 3 */ -# define TIVA_I2CSC3_BASE (TIVA_PERIPH_BASE + 0x23fc0) /* -0x23fff: I2C Status and Control 3 */ +# define TIVA_I2CSC3_BASE (TIVA_PERIPH_BASE + 0x23f00) /* -0x23fff: I2C Status and Control 3 */ # define TIVA_GPIOE_BASE (TIVA_PERIPH_BASE + 0x24000) /* -0x24fff: GPIO Port E */ # define TIVA_GPIOF_BASE (TIVA_PERIPH_BASE + 0x25000) /* -0x25fff: GPIO Port F */ # define TIVA_PWM0_BASE (TIVA_PERIPH_BASE + 0x28000) /* -0x28fff: PWM 0 */ @@ -299,16 +299,16 @@ # define TIVA_I2CM0_BASE (TIVA_PERIPH_BASE + 0x20000) /* -0x207ff: I2C Master 0 */ # define TIVA_I2CS0_BASE (TIVA_PERIPH_BASE + 0x20800) /* -0x20fbf: I2C Slave 0 */ -# define TIVA_I2CSC0_BASE (TIVA_PERIPH_BASE + 0x20fc0) /* -0x20fff: I2C Status and Control 0 */ +# define TIVA_I2CSC0_BASE (TIVA_PERIPH_BASE + 0x20f00) /* -0x20fff: I2C Status and Control 0 */ # define TIVA_I2CM1_BASE (TIVA_PERIPH_BASE + 0x21000) /* -0x217ff: I2C Master 1 */ # define TIVA_I2CS1_BASE (TIVA_PERIPH_BASE + 0x21800) /* -0x21fbf: I2C Slave 1 */ -# define TIVA_I2CSC1_BASE (TIVA_PERIPH_BASE + 0x21fc0) /* -0x21fff: I2C Status and Control 1 */ +# define TIVA_I2CSC1_BASE (TIVA_PERIPH_BASE + 0x21f00) /* -0x21fff: I2C Status and Control 1 */ # define TIVA_I2CM2_BASE (TIVA_PERIPH_BASE + 0x22000) /* -0x227ff: I2C Master 2 */ # define TIVA_I2CS2_BASE (TIVA_PERIPH_BASE + 0x22800) /* -0x22fbf: I2C Slave 2 */ -# define TIVA_I2CSC2_BASE (TIVA_PERIPH_BASE + 0x22fc0) /* -0x22fff: I2C Status and Control 2 */ +# define TIVA_I2CSC2_BASE (TIVA_PERIPH_BASE + 0x22f00) /* -0x22fff: I2C Status and Control 2 */ # define TIVA_I2CM3_BASE (TIVA_PERIPH_BASE + 0x23000) /* -0x237ff: I2C Master 3 */ # define TIVA_I2CS3_BASE (TIVA_PERIPH_BASE + 0x23800) /* -0x23fbf: I2C Slave 3 */ -# define TIVA_I2CSC3_BASE (TIVA_PERIPH_BASE + 0x23fc0) /* -0x23fff: I2C Status and Control 3 */ +# define TIVA_I2CSC3_BASE (TIVA_PERIPH_BASE + 0x23f00) /* -0x23fff: I2C Status and Control 3 */ # define TIVA_GPIOE_BASE (TIVA_PERIPH_BASE + 0x24000) /* -0x24fff: GPIO Port E */ # define TIVA_GPIOF_BASE (TIVA_PERIPH_BASE + 0x25000) /* -0x25fff: GPIO Port F */ # define TIVA_PWM0_BASE (TIVA_PERIPH_BASE + 0x28000) /* -0x28fff: PWM 0 */ |