Add configuration for the LM3S

git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5095 42af7a65-404d-4744-a932-0658087f49c3

4 files changed, 86 insertions, 39 deletions

diff --git a/nuttx/arch/arm/src/lm3s/Kconfig b/nuttx/arch/arm/src/lm3s/Kconfig
index ae2bf3130..a1b401db7 100644
--- a/nuttx/arch/arm/src/lm3s/Kconfig
+++ b/nuttx/arch/arm/src/lm3s/Kconfig
@@ -2,3 +2,74 @@
 # For a description of the syntax of this configuration file,
 # see misc/tools/kconfig-language.txt.
 #
+
+choice
+	prompt "LM3S Chip Selection"
+	default ARCH_CHIP_LM3S6965
+	depends on ARCH_CHIP_LM3S
+
+config ARCH_CHIP_LM3S6918
+	bool "LM3S6918"
+
+config ARCH_CHIP_LM3S9B96
+	bool "LM3S9B96"
+
+config ARCH_CHIP_LM3S6432
+	bool "LM3S6432"
+
+config ARCH_CHIP_LM3S6965
+	bool "LM3S6965"
+
+config ARCH_CHIP_LM3S8962
+	bool "LM3S8962"
+
+endchoice
+
+choice
+        prompt "Toolchain"
+        default LM3S_BUILDROOT
+
+config LM3S_CODESOURCERYW
+	bool "CodeSourcery GNU toolchain under Windows"
+
+config LM3S_CODESOURCERYL
+	bool "CodeSourcery GNU toolchain under Linux"
+
+config LM3S_DEVKITARM
+	bool "devkitARM GNU toolchain"
+
+config LM3S_BUILDROOT
+	bool "Buildroot"
+
+endchoice
+
+config LM3S_DFU
+	bool "DFU"
+	default y
+
+config LM3S_DISABLE_GPIOA_IRQS
+	bool "Disable GPIOA IRQs"
+
+config LM3S_DISABLE_GPIOB_IRQS
+	bool "Disable GPIOB IRQs"
+
+config LM3S_DISABLE_GPIOC_IRQS
+	bool "Disable GPIOC IRQs"
+
+config LM3S_DISABLE_GPIOD_IRQS
+	bool "Disable GPIOD IRQs"
+
+config LM3S_DISABLE_GPIOE_IRQS
+	bool "Disable GPIOE IRQs"
+
+config LM3S_DISABLE_GPIOF_IRQS
+	bool "Disable GPIOF IRQs"
+
+config LM3S_DISABLE_GPIOG_IRQS
+	bool "Disable GPIOG IRQs"
+
+config LM3S_DISABLE_GPIOH_IRQS
+	bool "Disable GPIOH IRQs"
+
+config LM3S_DISABLE_GPIOJ_IRQS
+	bool "Disable GPIOJ IRQs"
diff --git a/nuttx/arch/arm/src/lpc17xx/Kconfig b/nuttx/arch/arm/src/lpc17xx/Kconfig
index 44e34f9f4..dfa5f5a20 100644
--- a/nuttx/arch/arm/src/lpc17xx/Kconfig
+++ b/nuttx/arch/arm/src/lpc17xx/Kconfig
@@ -54,14 +54,6 @@ config ARCH_FAMILY_LPC176X
 	bool
 	default y if ARCH_CHIP_LPC1764 || ARCH_CHIP_LPC1765 || ARCH_CHIP_LPC1766 || ARCH_CHIP_LPC1767 || ARCH_CHIP_LPC1768 || ARCH_CHIP_LPC1769
 
-config ARCH_CORTEXM3
-	bool
-	default y if ARCH_CHIP_LPC17XX
-
-config ARCH_CORTEXM4
-	bool
-	default n
-
 menu "LPC17xx Peripheral Support"
 
 config LPC17_MAINOSC
diff --git a/nuttx/arch/arm/src/lpc43xx/Kconfig b/nuttx/arch/arm/src/lpc43xx/Kconfig
index 3010046ef..500f8da20 100644
--- a/nuttx/arch/arm/src/lpc43xx/Kconfig
+++ b/nuttx/arch/arm/src/lpc43xx/Kconfig
@@ -85,21 +85,6 @@ config ARCH_FAMILY_LPC4357
 	bool
 	default y if ARCH_CHIP_LPC4357FET180 || ARCH_CHIP_LPC4357FBD208 || ARCH_CHIP_LPC4357FET256
 
-config ARCH_CORTEXM3
-	bool
-	default n if !ARCH_CHIP_LPC43XX
-
-config ARCH_CORTEXM4
-	bool
-	default y if ARCH_CHIP_LPC43XX
-
-config ARCH_FPU
-	bool "FPU support"
-	default y
-	depends on ARCH_CORTEXM4
-	---help---
-		Build in support for the ARM Cortex-M4 FPU.
-
 choice
 	prompt "LPC43XX Boot Configuration"
 	default CONFIG_BOOT_SRAM
diff --git a/nuttx/arch/arm/src/stm32/Kconfig b/nuttx/arch/arm/src/stm32/Kconfig
index 371d39ed4..442f7c659 100644
--- a/nuttx/arch/arm/src/stm32/Kconfig
+++ b/nuttx/arch/arm/src/stm32/Kconfig
@@ -10,48 +10,63 @@ choice
 
 config ARCH_CHIP_STM32F103ZET6
 	bool "STM32F103ZET6"
+	select ARCH_CORTEXM3
 
 config ARCH_CHIP_STM32F103RET6
 	bool "STM32F103RET6"
+	select ARCH_CORTEXM3
 
 config ARCH_CHIP_STM32F103VCT6
 	bool "STM32F103VCT6"
+	select ARCH_CORTEXM3
 
 config ARCH_CHIP_STM32F105VBT7
 	bool "STM32F105VBT7"
+	select ARCH_CORTEXM3
 
 config ARCH_CHIP_STM32F107VC
 	bool "STM32F107VC"
+	select ARCH_CORTEXM3
 
 config ARCH_CHIP_STM32F207IG
 	bool "STM32F207IG"
+	select ARCH_CORTEXM3
 
 config ARCH_CHIP_STM32F405RG
 	bool "STM32F405RG"
+	select ARCH_CORTEXM3
 
 config ARCH_CHIP_STM32F405VG
 	bool "STM32F405VG"
+	select ARCH_CORTEXM3
 
 config ARCH_CHIP_STM32F405ZG
 	bool "STM32F405ZG"
+	select ARCH_CORTEXM3
 
 config ARCH_CHIP_STM32F407VE
 	bool "STM32F407VE"
+	select ARCH_CORTEXM3
 
 config ARCH_CHIP_STM32F407VG
 	bool "STM32F407VG"
+	select ARCH_CORTEXM3
 
 config ARCH_CHIP_STM32F407ZE
 	bool "STM32F407ZE"
+	select ARCH_CORTEXM4
 
 config ARCH_CHIP_STM32F407ZG
 	bool "STM32F407ZG"
+	select ARCH_CORTEXM4
 
 config ARCH_CHIP_STM32F407IE
 	bool "STM32F407IE"
+	select ARCH_CORTEXM4
 
 config ARCH_CHIP_STM32F407IG
 	bool "STM32F407IG"
+	select ARCH_CORTEXM4
 
 endchoice
 
@@ -71,14 +86,6 @@ config STM32_STM32F40XX
 	bool
 	default y if ARCH_CHIP_STM32F405RG || ARCH_CHIP_STM32F405VG || ARCH_CHIP_STM32F405ZG || ARCH_CHIP_STM32F407VE || ARCH_CHIP_STM32F407VG || ARCH_CHIP_STM32F407ZE || ARCH_CHIP_STM32F407ZG || ARCH_CHIP_STM32F407IE || ARCH_CHIP_STM32F407IE
 
-config ARCH_CORTEXM3
-	bool
-	default y if !STM32_STM32F40XX
-
-config ARCH_CORTEXM4
-	bool
-	default y if STM32_STM32F40XX
-
 menu "STM32 Peripheral Support"
 
 config STM32_ADC1
@@ -528,14 +535,6 @@ config HEAP2_END
 	---help---
 		The end (+1) of the SRAM in the FSMC address space
 
-config ARCH_FPU
-	bool "FPU support"
-	default y
-	depends on ARCH_CORTEXM4
-	---help---
-		Build in support for the ARM Cortex-M4 FPU.  Only the STM3240xxx supports
-		a floating point unit (FPU)
-
 config STM32_TIM1_PWM
 	bool "TIM1 PWM"
 	default n