Commit message (Collapse) | Author | Age | Files | Lines | |
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* | Tiva Timer: Fix a typo | Gregory Nutt | 2015-01-10 | 1 | -1/+1 |
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* | Tiva Timer: Implements configuration of the 32-bit RTC timer | Gregory Nutt | 2015-01-10 | 3 | -21/+66 |
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* | Tiva Timer: Add support for RTC match interrupts | Gregory Nutt | 2015-01-10 | 2 | -15/+163 |
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* | Tive Timer: Add support for ADC trigger generation from one-shot and ↵ | Gregory Nutt | 2015-01-10 | 2 | -10/+100 |
| | | | | periodic timers for timeout and match evetns | ||||
* | Tiva Timer: Add support to set the match regiser(s) relative to the timer ↵ | Gregory Nutt | 2015-01-10 | 3 | -42/+464 |
| | | | | counter (and prescale) registers. Enable match interrupts. These are one time interruprts: After the match interrupt is dispatched, further match interrupts are disabled | ||||
* | Tiva Timer: Add support for input clock prescaler in 16-bit ↵ | Gregory Nutt | 2015-01-09 | 3 | -16/+10 |
| | | | | one-shot/periodic modes | ||||
* | Tiva Timer: Add logic to acknowledge Tiva Timer interrupts | Gregory Nutt | 2015-01-09 | 2 | -25/+226 |
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* | Tive System Control: Add logic to configure the alternatie clock source ↵ | Gregory Nutt | 2015-01-09 | 4 | -6/+50 |
| | | | | (ALTCLK). Needed by the Tiva timer module | ||||
* | Tiva Timer: Add more interrupt management logic | Gregory Nutt | 2015-01-09 | 3 | -175/+238 |
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* | Tiva Timer: Add functions to set match registers; Add logic to select count ↵ | Gregory Nutt | 2015-01-09 | 3 | -122/+255 |
| | | | | direction | ||||
* | Tiva Timer: Add interfaces to start/stop timers and to set the interval ↵ | Gregory Nutt | 2015-01-09 | 2 | -1/+202 |
| | | | | load registers. | ||||
* | Tiva Timers: Add framework to support tmer interrupts | Gregory Nutt | 2015-01-09 | 2 | -55/+452 |
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* | drivers/mmcsd/Kconfig: ARCH_HAVE_SDIOWAIT_WRCOMPLETE should not depend on ↵ | Gregory Nutt | 2015-01-09 | 1 | -4/+4 |
| | | | | MMCSD_SDIO | ||||
* | STM32 SDIO: CONFIG_MMCSD_SDIOWAIT_WRCOMPLETE should not be available unless ↵ | Gregory Nutt | 2015-01-08 | 2 | -31/+28 |
| | | | | CONFIG_MMCSD_SDIO=y | ||||
* | STM32 SDIO: Don't let architectures select CONFIG_MMCSD_SDIOWAIT_WRCOMPLETE ↵ | Gregory Nutt | 2015-01-08 | 2 | -0/+6 |
| | | | | unless they have implemented SDIOWAIT_WRCOMPLETE | ||||
* | Tiva Timer: Partial support for 16- and 32-bit, oneshot and periodic timer ↵ | Gregory Nutt | 2015-01-08 | 3 | -83/+140 |
| | | | | configurations | ||||
* | Tiva Timer: Add support to select alternate clock source and 32-bit ↵ | Gregory Nutt | 2015-01-08 | 3 | -106/+158 |
| | | | | register concatenation mode. | ||||
* | Update ChangeLog | Gregory Nutt | 2015-01-08 | 1 | -0/+3 |
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* | Tiva Timer: Add register level debug support | Gregory Nutt | 2015-01-08 | 2 | -56/+249 |
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* | Tiva Timer: Add basic framework to configure timers. Incomplete on initial ↵ | Gregory Nutt | 2015-01-08 | 7 | -55/+1036 |
| | | | | commit | ||||
* | Tiva Timer: SYNC regiser is only available on GPTM0 | Gregory Nutt | 2015-01-08 | 1 | -39/+4 |
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* | Tiva Timer: Update timer register bit definitions for the LM4F | Gregory Nutt | 2015-01-08 | 1 | -49/+49 |
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* | Tiva Timer: Extend timer register definitions to handle other chips | Gregory Nutt | 2015-01-08 | 2 | -226/+291 |
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* | Update ChangeLog | Gregory Nutt | 2015-01-08 | 1 | -0/+12 |
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* | MMCSD SDIO: Add support for a new SDWAIT_WRCOMPLETE condition. The ↵ | Gregory Nutt | 2015-01-08 | 4 | -16/+146 |
| | | | | | | | | | | previous logic used a busy-wait loop to pool the card R1 start to determine when the card was ready for the next transfer. That busy-wait can be quite long -- hundreds of milliseconds. And alternative is to look the the SD D0 pin which will change state when the card is no longer busy. This logic implements a change the avoids the busy-wait poll by reconfiguring the SD D0 pin as a GPIO interrupt, then waiting for the card to becom ready without taking up CPU cycles. This change is conditioned on CONFIG_MMCSD_SDIOWATI_WRCOMPLETE and is currenlty only implemented for the STM32 SDIO driver. From David Sidrane | ||||
* | Tiva Timer: Missed one register bit field definition | Gregory Nutt | 2015-01-07 | 1 | -1/+1 |
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* | TM4C129X Timer: Completes timer register definition header file | Gregory Nutt | 2015-01-07 | 1 | -46/+286 |
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* | TM4C129X Timer: Add some missing addresses and some of the register bit ↵ | Gregory Nutt | 2015-01-07 | 1 | -258/+386 |
| | | | | definitions. Still incomplete | ||||
* | TM4C129X Timer: Update addresses in the timer register definitions file. ↵ | Gregory Nutt | 2015-01-07 | 2 | -81/+536 |
| | | | | Still missing bit field definitions | ||||
* | Update README | Gregory Nutt | 2015-01-07 | 2 | -23/+50 |
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* | DK-TM42129X: Support for the TMP100 temperature sensor is enabled by default ↵ | Gregory Nutt | 2015-01-06 | 1 | -4/+19 |
| | | | | in the NSH configuration | ||||
* | DK-TM4C129X: Add logic to initialize the TMP-100 temperature sensor driver ↵ | Gregory Nutt | 2015-01-06 | 4 | -3/+65 |
| | | | | at startup | ||||
* | apps/system/lm75: Missing semicolon when floating point enabled | Gregory Nutt | 2015-01-06 | 1 | -2/+5 |
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* | Update ChangeLog | Gregory Nutt | 2015-01-06 | 1 | -0/+4 |
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* | Add a tiny system application to read the current temperature | Gregory Nutt | 2015-01-06 | 7 | -2/+367 |
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* | DK-TM4C129X: Add support for on-board TMP100 temperature sensor | Gregory Nutt | 2015-01-06 | 9 | -16/+179 |
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* | Update ChangeLog | Gregory Nutt | 2015-01-06 | 2 | -11/+13 |
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* | Tiva IRQs: Fix IRQ control logic; was limited to only 64 IRQs. That is a ↵ | Gregory Nutt | 2015-01-06 | 1 | -2/+67 |
| | | | | problem for higher numbered IRQs on many platforms | ||||
* | Tiva I2C: For TM4C, high speed mode is now configurable (but disabled as ↵ | Gregory Nutt | 2015-01-06 | 3 | -4/+24 |
| | | | | EXPERIMENTAL) | ||||
* | Tiva PHY Interrupts: Need to read the PHY interrupt status register in order ↵ | Gregory Nutt | 2015-01-05 | 3 | -27/+43 |
| | | | | to clear the pending PHY interrupt | ||||
* | DK-TM4C129X: Enable I2C6 and the I2C tool in the default configuration | Gregory Nutt | 2015-01-05 | 3 | -3/+41 |
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* | Tiva: Fixes to support building Tiva TM4C129X I2C driver | Gregory Nutt | 2015-01-05 | 2 | -44/+44 |
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* | Tiva: Update I2C register definitions to include support for the TM4C129X | Gregory Nutt | 2015-01-05 | 1 | -112/+301 |
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* | DK-TM4C129X: The network monitor is no enabled by default in NSH configuration | Gregory Nutt | 2015-01-05 | 4 | -57/+122 |
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* | Tiva Ethernet: Add support for PHY interrupts | Gregory Nutt | 2015-01-03 | 3 | -22/+223 |
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* | Tiva Ethernet: Configure external PHY interrupt pin | Gregory Nutt | 2015-01-03 | 1 | -0/+4 |
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* | DK-TM4C129X: Ethernet networking is now enabled by default in the NSH ↵ | Gregory Nutt | 2015-01-03 | 2 | -16/+429 |
| | | | | configuration | ||||
* | Telnetd: EBUSY is not an error in this case, then why report an error? | Gregory Nutt | 2015-01-03 | 1 | -4/+7 |
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* | DK-TM4C129X: Fix RAM size in defconfig files | Gregory Nutt | 2015-01-03 | 1 | -1/+1 |
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* | Tiva Ethernet: Removed logic that holds the PHY and re-ordered some reset ↵ | Gregory Nutt | 2015-01-03 | 1 | -74/+26 |
| | | | | logic. Can not ping the DK |