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* Tiva Interrupts: Changes corresponding to the last needed in the Tiva ↵HEADmasterGregory Nutt2015-01-122-3/+10
| | | | Kconfig file as well
* Tiva interrupts: Fix chip-specific interrupt un-definitionsGregory Nutt2015-01-121-9/+34
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* Tiva Timers: Add interfaces to read the current timer valueGregory Nutt2015-01-122-7/+176
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* USB host drivers: Change all parmeters named class to usbclass to avoid C++ ↵Gregory Nutt2015-01-111-0/+4
| | | | conflicts
* Tiva Timer: Fix a typoGregory Nutt2015-01-101-1/+1
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* Tiva Timer: Implements configuration of the 32-bit RTC timerGregory Nutt2015-01-103-21/+66
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* Tiva Timer: Add support for RTC match interruptsGregory Nutt2015-01-102-15/+163
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* Tive Timer: Add support for ADC trigger generation from one-shot and ↵Gregory Nutt2015-01-102-10/+100
| | | | periodic timers for timeout and match evetns
* Tiva Timer: Add support to set the match regiser(s) relative to the timer ↵Gregory Nutt2015-01-103-42/+464
| | | | counter (and prescale) registers. Enable match interrupts. These are one time interruprts: After the match interrupt is dispatched, further match interrupts are disabled
* Tiva Timer: Add support for input clock prescaler in 16-bit ↵Gregory Nutt2015-01-093-16/+10
| | | | one-shot/periodic modes
* Tiva Timer: Add logic to acknowledge Tiva Timer interruptsGregory Nutt2015-01-092-25/+226
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* Tive System Control: Add logic to configure the alternatie clock source ↵Gregory Nutt2015-01-093-6/+32
| | | | (ALTCLK). Needed by the Tiva timer module
* Tiva Timer: Add more interrupt management logicGregory Nutt2015-01-093-175/+238
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* Tiva Timer: Add functions to set match registers; Add logic to select count ↵Gregory Nutt2015-01-093-122/+255
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* Tiva Timer: Add interfaces to start/stop timers and to set the interval ↵Gregory Nutt2015-01-092-1/+202
| | | | load registers.
* Tiva Timers: Add framework to support tmer interruptsGregory Nutt2015-01-092-55/+452
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* STM32 SDIO: Don't let architectures select CONFIG_MMCSD_SDIOWAIT_WRCOMPLETE ↵Gregory Nutt2015-01-081-0/+1
| | | | unless they have implemented SDIOWAIT_WRCOMPLETE
* Tiva Timer: Partial support for 16- and 32-bit, oneshot and periodic timer ↵Gregory Nutt2015-01-083-83/+140
| | | | configurations
* Tiva Timer: Add support to select alternate clock source and 32-bit ↵Gregory Nutt2015-01-083-106/+158
| | | | register concatenation mode.
* Tiva Timer: Add register level debug supportGregory Nutt2015-01-082-56/+249
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* Tiva Timer: Add basic framework to configure timers. Incomplete on initial ↵Gregory Nutt2015-01-087-55/+1036
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* Tiva Timer: SYNC regiser is only available on GPTM0Gregory Nutt2015-01-081-39/+4
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* Tiva Timer: Update timer register bit definitions for the LM4FGregory Nutt2015-01-081-49/+49
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* Tiva Timer: Extend timer register definitions to handle other chipsGregory Nutt2015-01-081-224/+289
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* MMCSD SDIO: Add support for a new SDWAIT_WRCOMPLETE condition. The ↵Gregory Nutt2015-01-081-15/+93
| | | | | | | | | | previous logic used a busy-wait loop to pool the card R1 start to determine when the card was ready for the next transfer. That busy-wait can be quite long -- hundreds of milliseconds. And alternative is to look the the SD D0 pin which will change state when the card is no longer busy. This logic implements a change the avoids the busy-wait poll by reconfiguring the SD D0 pin as a GPIO interrupt, then waiting for the card to becom ready without taking up CPU cycles. This change is conditioned on CONFIG_MMCSD_SDIOWATI_WRCOMPLETE and is currenlty only implemented for the STM32 SDIO driver. From David Sidrane
* Tiva Timer: Missed one register bit field definitionGregory Nutt2015-01-071-1/+1
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* TM4C129X Timer: Completes timer register definition header fileGregory Nutt2015-01-071-46/+286
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* TM4C129X Timer: Add some missing addresses and some of the register bit ↵Gregory Nutt2015-01-071-258/+386
| | | | definitions. Still incomplete
* TM4C129X Timer: Update addresses in the timer register definitions file. ↵Gregory Nutt2015-01-072-81/+536
| | | | Still missing bit field definitions
* Tiva IRQs: Fix IRQ control logic; was limited to only 64 IRQs. That is a ↵Gregory Nutt2015-01-061-2/+67
| | | | problem for higher numbered IRQs on many platforms
* Tiva I2C: For TM4C, high speed mode is now configurable (but disabled as ↵Gregory Nutt2015-01-063-4/+24
| | | | EXPERIMENTAL)
* Tiva PHY Interrupts: Need to read the PHY interrupt status register in order ↵Gregory Nutt2015-01-051-25/+40
| | | | to clear the pending PHY interrupt
* Tiva: Fixes to support building Tiva TM4C129X I2C driverGregory Nutt2015-01-052-44/+44
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* Tiva: Update I2C register definitions to include support for the TM4C129XGregory Nutt2015-01-051-112/+301
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* Tiva Ethernet: Add support for PHY interruptsGregory Nutt2015-01-032-22/+222
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* Tiva Ethernet: Configure external PHY interrupt pinGregory Nutt2015-01-031-0/+4
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* Tiva Ethernet: Removed logic that holds the PHY and re-ordered some reset ↵Gregory Nutt2015-01-031-74/+26
| | | | logic. Can not ping the DK
* Tive Ethernet: Wait for EMAC to come out of reset before accessing any registersGregory Nutt2015-01-031-58/+61
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* Tiva serial: Add volatile to fix a wait loop that was not waiting; CR ↵Gregory Nutt2015-01-021-3/+4
| | | | really should preced LF in CR-LF expansion
* Cosmetic changesGregory Nutt2015-01-021-1/+1
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* Tiva: Fix typos in conditional compilationGregory Nutt2015-01-021-6/+5
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* Tiva Ethernet: Add lots of debug output for testingGregory Nutt2015-01-021-5/+23
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* Tiva: If peripheral ready register not available, then lets say the ↵Gregory Nutt2015-01-021-24/+24
| | | | peripheral is ready
* Tiva: Wait for the console UART to be ready before configuring itGregory Nutt2015-01-021-3/+16
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* Tiva Ethernet: Fix compile problem when debug enabledGregory Nutt2015-01-021-1/+1
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* Tiva GPIO: Fix a compiler error when debug is enabled with TM4C129XGregory Nutt2015-01-021-7/+21
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* Tiva Ethernet: MMC interrupts need to be disable initiallyGregory Nutt2015-01-021-5/+12
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* Tiva Ethernet: Update DMA BUSMODE settings based on TI example codeGregory Nutt2015-01-021-42/+101
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* Tiva Ethernet: Update PHY initializationGregory Nutt2015-01-022-191/+101
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* STM32 RTC: Add Kconfig options needed with the preceding commitGregory Nutt2015-01-021-0/+22
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