SI-5031 fixed in GenBCode

The GenASM-based fix for SI-5031 is 0527b2549bcada2fda2201daa630369b377d0877

2 files changed, 4 insertions, 3 deletions

diff --git a/src/compiler/scala/tools/nsc/backend/jvm/BCodeBodyBuilder.scala b/src/compiler/scala/tools/nsc/backend/jvm/BCodeBodyBuilder.scala
index 404d02b304..a7f43eefed 100644
--- a/src/compiler/scala/tools/nsc/backend/jvm/BCodeBodyBuilder.scala
+++ b/src/compiler/scala/tools/nsc/backend/jvm/BCodeBodyBuilder.scala
@@ -869,14 +869,14 @@ abstract class BCodeBodyBuilder extends BCodeSkelBuilder {
       )
       lineNumber(tree)
       genLoadModule(module)
-      asmClassType(module)
+      symInfoTK(module)
     }
 
     def genLoadModule(module: Symbol) {
       if (claszSymbol == module.moduleClass && jMethodName != "readResolve") {
         mnode.visitVarInsn(asm.Opcodes.ALOAD, 0)
       } else {
-        val mbt  = asmClassType(module)
+        val mbt  = symInfoTK(module)
         mnode.visitFieldInsn(
           asm.Opcodes.GETSTATIC,
           mbt.getInternalName /* + "$" */ ,
diff --git a/src/compiler/scala/tools/nsc/backend/jvm/BCodeTypes.scala b/src/compiler/scala/tools/nsc/backend/jvm/BCodeTypes.scala
index 723272a666..2e473f39c0 100644
--- a/src/compiler/scala/tools/nsc/backend/jvm/BCodeTypes.scala
+++ b/src/compiler/scala/tools/nsc/backend/jvm/BCodeTypes.scala
@@ -414,7 +414,8 @@ abstract class BCodeTypes extends BCodeIdiomatic {
 
     // TODO accomodate the fix for SI-5031 of https://github.com/scala/scala/commit/0527b2549bcada2fda2201daa630369b377d0877
     // TODO Weaken this assertion? buildExemplar() needs to be updated, too. In the meantime, pos/t5031_3 has been moved to test/disabled/pos.
-    assert(!exemplars.containsKey(key), "Maps `symExemplars` and `exemplars` got out of synch.")
+    val whatWasInExemplars = exemplars.get(key)
+    assert(whatWasInExemplars == null, "Maps `symExemplars` and `exemplars` got out of synch.")
     val tr = buildExemplar(key, csym)
     symExemplars.put(csym, tr)
     if (csym != csym0) { symExemplars.put(csym0, tr) }