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authorAdriaan Moors <adriaan.moors@typesafe.com>2016-07-28 15:08:43 -0700
committerLukas Rytz <lukas.rytz@gmail.com>2016-08-10 13:51:56 +0200
commit43ba65fa11456899b3c45be14bd3895d8d6b6b5a (patch)
treeaf6f3122e7f8dbb12431840c5a440e763269f478 /test/files
parent2b172be8c83c3146d3fd5ab01546c171ab18fa46 (diff)
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SI-7187 deprecate eta-expansion of zero-arg method values
For backwards compatiblity with 2.11, we already don't adapt a zero-arg method value to a SAM. In 2.13, we won't do any eta-expansion for zero-arg method values, but we should deprecate first.
Diffstat (limited to 'test/files')
-rw-r--r--test/files/neg/t7187.check6
-rw-r--r--test/files/neg/t7187.flags1
-rw-r--r--test/files/neg/t7187.scala6
-rw-r--r--test/files/pos/t9178.flags1
-rw-r--r--test/files/pos/t9178.scala13
-rw-r--r--test/files/run/Course-2002-08.scala20
-rw-r--r--test/files/run/runtime.scala2
7 files changed, 24 insertions, 25 deletions
diff --git a/test/files/neg/t7187.check b/test/files/neg/t7187.check
new file mode 100644
index 0000000000..a30803c746
--- /dev/null
+++ b/test/files/neg/t7187.check
@@ -0,0 +1,6 @@
+t7187.scala:3: warning: Eta-expansion of zero-argument method values is deprecated. Did you intend to write EtaExpandZeroArg.this.foo()?
+ val f: () => Any = foo
+ ^
+error: No warnings can be incurred under -Xfatal-warnings.
+one warning found
+one error found
diff --git a/test/files/neg/t7187.flags b/test/files/neg/t7187.flags
new file mode 100644
index 0000000000..c6bfaf1f64
--- /dev/null
+++ b/test/files/neg/t7187.flags
@@ -0,0 +1 @@
+-deprecation -Xfatal-warnings
diff --git a/test/files/neg/t7187.scala b/test/files/neg/t7187.scala
new file mode 100644
index 0000000000..45d33f06af
--- /dev/null
+++ b/test/files/neg/t7187.scala
@@ -0,0 +1,6 @@
+class EtaExpandZeroArg {
+ def foo(): () => String = () => ""
+ val f: () => Any = foo
+
+ // f() would evaluate to <function0> instead of ""
+}
diff --git a/test/files/pos/t9178.flags b/test/files/pos/t9178.flags
deleted file mode 100644
index 7de3c0f3ee..0000000000
--- a/test/files/pos/t9178.flags
+++ /dev/null
@@ -1 +0,0 @@
--Xfatal-warnings -deprecation
diff --git a/test/files/pos/t9178.scala b/test/files/pos/t9178.scala
deleted file mode 100644
index f2cf20a778..0000000000
--- a/test/files/pos/t9178.scala
+++ /dev/null
@@ -1,13 +0,0 @@
-// eta expansion to Function0 is problematic (as shown here).
-// Perhaps we should we deprecate it? See discussion in the comments of
-// on SI-9178.
-//
-// This test encodes the status quo: no deprecation.
-object Test {
- def foo(): () => String = () => ""
- val f: () => Any = foo
-
- def main(args: Array[String]): Unit = {
- println(f()) // <function0>
- }
-}
diff --git a/test/files/run/Course-2002-08.scala b/test/files/run/Course-2002-08.scala
index 5e21edaba3..1d0e02262d 100644
--- a/test/files/run/Course-2002-08.scala
+++ b/test/files/run/Course-2002-08.scala
@@ -205,7 +205,7 @@ object M5 {
val inputSig = input.getSignal;
afterDelay(InverterDelay) {() => output.setSignal(!inputSig) };
}
- input addAction invertAction
+ input addAction invertAction _
}
def andGate(a1: Wire, a2: Wire, output: Wire): Unit = {
@@ -214,8 +214,8 @@ object M5 {
val a2Sig = a2.getSignal;
afterDelay(AndGateDelay) {() => output.setSignal(a1Sig & a2Sig) };
}
- a1 addAction andAction;
- a2 addAction andAction;
+ a1 addAction andAction _
+ a2 addAction andAction _
}
def orGate(o1: Wire, o2: Wire, output: Wire): Unit = {
@@ -224,8 +224,8 @@ object M5 {
val o2Sig = o2.getSignal;
afterDelay(OrGateDelay) {() => output.setSignal(o1Sig | o2Sig) };
}
- o1 addAction orAction;
- o2 addAction orAction;
+ o1 addAction orAction _
+ o2 addAction orAction _
}
def probe(name: String, wire: Wire): Unit = {
@@ -479,7 +479,7 @@ abstract class BasicCircuitSimulator() extends Simulator() {
val inputSig = input.getSignal;
afterDelay(InverterDelay) {() => output.setSignal(!inputSig) };
}
- input addAction invertAction
+ input addAction invertAction _
}
def andGate(a1: Wire, a2: Wire, output: Wire) = {
@@ -488,8 +488,8 @@ abstract class BasicCircuitSimulator() extends Simulator() {
val a2Sig = a2.getSignal;
afterDelay(AndGateDelay) {() => output.setSignal(a1Sig & a2Sig) };
}
- a1 addAction andAction;
- a2 addAction andAction
+ a1 addAction andAction _
+ a2 addAction andAction _
}
def orGate(a1: Wire, a2: Wire, output: Wire) = {
@@ -498,8 +498,8 @@ abstract class BasicCircuitSimulator() extends Simulator() {
val a2Sig = a2.getSignal;
afterDelay(OrGateDelay) {() => output.setSignal(a1Sig | a2Sig) };
}
- a1 addAction orAction;
- a2 addAction orAction
+ a1 addAction orAction _
+ a2 addAction orAction _
}
def orGate2(a1: Wire, a2: Wire, output: Wire) = {
diff --git a/test/files/run/runtime.scala b/test/files/run/runtime.scala
index 89348b294d..468a80fc0c 100644
--- a/test/files/run/runtime.scala
+++ b/test/files/run/runtime.scala
@@ -73,7 +73,7 @@ object Test1Test {
// {System.out.print(22); test1.bar}.System.out.println();
{Console.print(23); test1.bar.System}.out.println();
{Console.print(24); test1.bar.System.out}.println();
- {Console.print(25); test1.bar.System.out.println:(() => Unit)} apply ();
+ {Console.print(25); test1.bar.System.out.println _ : (() => Unit)} apply ();
{Console.print(26); test1.bar.System.out.println()};
}