Resync new repository with old repo r5166

git-svn-id: http://svn.code.sf.net/p/nuttx/code/trunk@5153 42af7a65-404d-4744-a932-0658087f49c3
author: patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> 2012-09-17 18:18:44 +0000
committer: patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> 2012-09-17 18:18:44 +0000
commit: 57623d42ebb04f0a0b9e6eb7c0847a3ece2aa0ff (patch)
tree: 25d07d14e920d31c0b1947c9ca586f2a01fc32d8 /nuttx/configs/fire-stm32v2
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24 files changed, 5453 insertions, 0 deletions
diff --git a/nuttx/configs/fire-stm32v2/Kconfig b/nuttx/configs/fire-stm32v2/Kconfig
new file mode 100644
index 000000000..3f4b857da
--- /dev/null
+++ b/nuttx/configs/fire-stm32v2/Kconfig
@@ -0,0 +1,6 @@
+#
+# For a description of the syntax of this configuration file,
+# see misc/tools/kconfig-language.txt.
+#
+
+comment "M3 Wildfire Configuration"
diff --git a/nuttx/configs/fire-stm32v2/README.txt b/nuttx/configs/fire-stm32v2/README.txt
new file mode 100644
index 000000000..d01ba3219
--- /dev/null
+++ b/nuttx/configs/fire-stm32v2/README.txt
@@ -0,0 +1,786 @@
+README
+======
+
+This README discusses issues unique to NuttX configurations for the M3
+Wildfire development board (STM32F103VET6).  See http://firestm32.taobao.com
+
+Contents
+========
+
+  - Pin Configuration
+  - Development Environment
+  - GNU Toolchain Options
+  - IDEs
+  - NuttX buildroot Toolchain
+  - DFU and JTAG
+  - OpenOCD
+  - LEDs
+  - RTC
+  - M3 Wildfire-specific Configuration Options
+  - Configurations
+
+Pin Configuration
+=================
+--- ------ -------------- -------------------------------------------------------------------
+PIN NAME   SIGNAL         NOTES
+--- ------ -------------- -------------------------------------------------------------------
+
+1   PE2    PE2-C-RCLK     Camera (P9)
+2   PE3    PE3-USB-M      USB2.0
+3   PE4    PE4-BEEP       LS1 Bell
+4   PE5    (no name)      10Mbps ENC28J60 Interrupt
+5   PE6
+6   VBAT   BT1            Battery (BT1)
+7   PC13                  Header 7X2
+8   PC14   PC14/OSC32-IN  Y2 32.768KHz
+9   PC15   PC15/OSC32-OUT Y2 32.768KHz
+10  VSS_5  DGND
+11  VDD_5  3V3
+12  OSC_IN                Y1 8MHz
+13  OSC_OUT               Y1 8MHz
+14  NRST   REST1          Reset switch
+15  PC0
+16  PC1    PC1/ADC123-IN11 Potentiometer (R16)
+17  PC2
+18  PC3    PC3-LED1       LED1, Active low (pulled high)
+19  VSSA   DGND
+20  VREF-  DGND
+21  VREF+  3V3
+22  VDDA   3V3
+23  PA0    PA0-C-VSYNC    Camera (P9)
+24  PA1    PC1/ADC123-IN1
+25  PA2    PA2-US2-TX     MAX3232, DB9 D7
+
+--- ------ -------------- -------------------------------------------------------------------
+PIN NAME   SIGNAL         NOTES
+--- ------ -------------- -------------------------------------------------------------------
+
+26  PA3    PA3-US2-RX     MAX3232, DB9 D7
+27  VSS_4  DGND
+28  VDD_4  3V3
+29  PA4    PA4-SPI1-NSS   10Mbit ENC28J60, SPI 2M FLASH
+30  PA5    PA5-SPI1-SCK   2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH
+31  PA6    PA6-SPI1-MISO  2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH
+32  PA7    PA7-SPI1-MOSI  2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH
+33  PC4    PC4-LED2       LED2, Active low (pulled high)
+34  PC5    PC5-LED3       LED3, Active low (pulled high)
+35  PB0    PB0-KEY1       KEY1, Low when closed (pulled high if open)
+36  PB1    PB1-KEY2       KEY2, Low when closed (pulled high if open)
+37  PB2    BOOT1/DGND
+38  PE7    PE7-FSMC_D4    2.4" TFT + Touchscreen
+39  PE8    PE8-FSMC_D5    2.4" TFT + Touchscreen
+40  PE9    PE9-FSMC_D6    2.4" TFT + Touchscreen
+41  PE10   PE10-FSMC_D7   2.4" TFT + Touchscreen
+42  PE11   PE11-FSMC_D8   2.4" TFT + Touchscreen
+43  PE12   PE12-FSMC_D9   2.4" TFT + Touchscreen
+44  PE13   PE13-FSMC_D10  2.4" TFT + Touchscreen
+45  PE14   PE14-FSMC_D11  2.4" TFT + Touchscreen
+46  PE15   PE15-FSMC_D12  2.4" TFT + Touchscreen
+47  PB10   PB10-C-DO_2    Camera (P9)
+48  PB11   PB11-MP3-RST   MP3
+           PB11-C-DO_3    Camera (P9)
+49  VSS_1  DGND
+50  VDD_1  3V3
+
+--- ------ -------------- -------------------------------------------------------------------
+PIN NAME   SIGNAL         NOTES
+--- ------ -------------- -------------------------------------------------------------------
+
+51  PB12   PB12-SPI2-NSS  MP3
+           PB12-C-DO_4    Camera (P9)
+52  PB13   PB13-SPI2-SCK  MP3
+           PB13-C-DO_5    Camera (P9)
+53  PB14   PB14-SPI2-MISO MP3
+           PB14-C-DO_6    Camera (P9)
+54  PB15   PB15-SPI2-MOSI MP3
+           PB15-C-DO_7    Camera (P9)
+55  PD8    PD8-FSMC_D13   2.4" TFT + Touchscreen
+56  PD9    PD9-FSMC_D14   2.4" TFT + Touchscreen
+57  PD10   PD10-FSMC_D15  2.4" TFT + Touchscreen
+58  PD11   PD11-FSMC_A16  2.4" TFT + Touchscreen
+59  PD12   C-LED_EN       Camera (P9)
+60  PD13   PD13-LCD/LIGHT 2.4" TFT + Touchscreen
+61  PD14   PD14-FSMC_D0   2.4" TFT + Touchscreen
+62  PD15   PD15-FSMC_D1   2.4" TFT + Touchscreen
+63  PC6    PC6-MP3-XDCS   MP3
+           PC6-C-SIO_C    Camera (P9)
+64  PC7    PC7-MP3-DREQ   MP3
+           PC7-C-SIO_D    Camera (P9)
+65  PC8    PC8-SDIO-D0    SD card, pulled high
+66  PC9    PC9-SDIO-D1    SD card, pulled high
+67  PA8    PA8-C-XCLK     Camera (P9)
+68  PA9    PA9-US1-TX     MAX3232, DB9 D8
+69  PA10   PA10-US1-RX    MAX3232, DB9 D8
+70  PA11   PA11-USBDM     USB2.0
+71  PA12   PA12-USBDP     USB2.0
+72  PA13   PA13-JTMS      JTAG
+73  N/C
+74  VSS_2  DGND
+75  VDD_2  3V3
+
+--- ------ -------------- -------------------------------------------------------------------
+PIN NAME   SIGNAL         NOTES
+--- ------ -------------- -------------------------------------------------------------------
+
+76  PA14   PA14-JTCK      JTAG
+77  PA15   PA15-JTDI      JTAG
+78  PC10   PC10-SDIO-D2   SD card, pulled high
+79  PC11   PC10-SDIO-D3   SD card, pulled high
+80  PC12   PC12-SDIO-CLK  SD card
+81  PD0    PD0-FSMC_D2    2.4" TFT + Touchscreen
+82  PD1    PD1-FSMC_D3    2.4" TFT + Touchscreen
+83  PD2    PD2-SDIO-CMD   SD card, pulled high
+84  PD3    PD3-C-WEN      Camera (P9)
+85  PD4    PD4-FSMC_NOE   2.4" TFT + Touchscreen
+86  PD5    PD5-FSMC_NWE   2.4" TFT + Touchscreen
+87  PD6    PD6-C-OE       Camera (P9)
+88  PD7    PD7-FSMC_NE1   2.4" TFT + Touchscreen
+89  PB3    PB3-JTDO       JTAG
+90  PB4    PB4-NJTRST     JTAG
+91  PB5    PB5-C-WRST     Camera (P9)
+92  PB6    PB6-I2C1-SCL   2.4" TFT + Touchscreen, AT24C02
+93  PB7    PB7-I2C1-SDA   2.4" TFT + Touchscreen, AT24C02
+94  BOOT0  SW3            3V3 or DGND
+95  PB8    PB8-CAN-RX     CAN tranceiver, Header 2H
+           PB8-C-DO_0     Camera (P9)
+96  PB9    PB9-CAN-TX     CAN tranceiver, Header 2H
+           PB9-C-DO_1     Camera (P9)
+97  PE0    PE0-C-RRST     Camera (P9)
+98  PE1    PE1-FSMC_NBL1  2.4" TFT + Touchscreen
+99  VSS_3  DGND
+100 VDD_3  3V3
+
+Development Environment
+=======================
+
+  Either Linux or Cygwin on Windows can be used for the development environment.
+  The source has been built only using the GNU toolchain (see below).  Other
+  toolchains will likely cause problems. Testing was performed using the Cygwin
+  environment because the CodeSourcery Toolchain.  The Raisonance R-Link
+  emulatator and some RIDE7 development tools were used and those tools works
+  only under Windows.
+
+GNU Toolchain Options
+=====================
+
+  Toolchain Configurations
+  ------------------------
+  The NuttX make system has been modified to support the following different
+  toolchain options.
+
+  1. The CodeSourcery GNU toolchain,
+  2. The Atollic Toolchain,
+  3. The devkitARM GNU toolchain,
+  4. Raisonance GNU toolchain, or
+  5. The NuttX buildroot Toolchain (see below).
+
+  Most testing has been conducted using the CodeSourcery toolchain for Windows and
+  that is the default toolchain in most configurations.  To use the Atollic,
+  devkitARM, Raisonance GNU, or NuttX buildroot toolchain, you simply need to
+  add one of the following configuration options to your .config (or defconfig)
+  file:
+
+    CONFIG_STM32_CODESOURCERYW=y  : CodeSourcery under Windows
+    CONFIG_STM32_CODESOURCERYL=y  : CodeSourcery under Linux
+    CONFIG_STM32_ATOLLIC_LITE=y   : The free, "Lite" version of Atollic toolchain under Windows
+    CONFIG_STM32_ATOLLIC_PRO=y    : The paid, "Pro" version of Atollic toolchain under Windows
+    CONFIG_STM32_DEVKITARM=y      : devkitARM under Windows
+    CONFIG_STM32_RAISONANCE=y     : Raisonance RIDE7 under Windows
+    CONFIG_STM32_BUILDROOT=y      : NuttX buildroot under Linux or Cygwin (default)
+
+  If you change the default toolchain, then you may also have to modify the PATH in
+  the setenv.h file if your make cannot find the tools.
+
+  NOTE: the CodeSourcery (for Windows), Atollic, devkitARM, and Raisonance toolchains are
+  Windows native toolchains.  The CodeSourcery (for Linux) and NuttX buildroot
+  toolchains are Cygwin and/or Linux native toolchains. There are several limitations
+  to using a Windows based toolchain in a Cygwin environment.  The three biggest are:
+
+  1. The Windows toolchain cannot follow Cygwin paths.  Path conversions are
+     performed automatically in the Cygwin makefiles using the 'cygpath' utility
+     but you might easily find some new path problems.  If so, check out 'cygpath -w'
+
+  2. Windows toolchains cannot follow Cygwin symbolic links.  Many symbolic links
+     are used in Nuttx (e.g., include/arch).  The make system works around these
+     problems for the Windows tools by copying directories instead of linking them.
+     But this can also cause some confusion for you:  For example, you may edit
+     a file in a "linked" directory and find that your changes had no effect.
+     That is because you are building the copy of the file in the "fake" symbolic
+     directory.  If you use a Windows toolchain, you should get in the habit of
+     making like this:
+
+       make clean_context all
+
+     An alias in your .bashrc file might make that less painful.
+
+  3. Dependencies are not made when using Windows versions of the GCC.  This is
+     because the dependencies are generated using Windows pathes which do not
+     work with the Cygwin make.
+
+     Support has been added for making dependencies with the windows-native toolchains.
+     That support can be enabled by modifying your Make.defs file as follows:
+
+    -  MKDEP                = $(TOPDIR)/tools/mknulldeps.sh
+    +  MKDEP                = $(TOPDIR)/tools/mkdeps.sh --winpaths "$(TOPDIR)"
+
+     If you have problems with the dependency build (for example, if you are not
+     building on C:), then you may need to modify tools/mkdeps.sh
+
+  The CodeSourcery Toolchain (2009q1)
+  -----------------------------------
+  The CodeSourcery toolchain (2009q1) does not work with default optimization
+  level of -Os (See Make.defs).  It will work with -O0, -O1, or -O2, but not with
+  -Os.
+
+  The Atollic "Pro" and "Lite" Toolchain
+  --------------------------------------
+  One problem that I had with the Atollic toolchains is that the provide a gcc.exe
+  and g++.exe in the same bin/ file as their ARM binaries.  If the Atollic bin/ path
+  appears in your PATH variable before /usr/bin, then you will get the wrong gcc
+  when you try to build host executables.  This will cause to strange, uninterpretable
+  errors build some host binaries in tools/ when you first make.
+
+  The Atollic "Lite" Toolchain
+  ----------------------------
+  The free, "Lite" version of the Atollic toolchain does not support C++ nor
+  does it support ar, nm, objdump, or objdcopy. If you use the Atollic "Lite"
+  toolchain, you will have to set:
+
+    CONFIG_HAVE_CXX=n
+
+  In order to compile successfully.  Otherwise, you will get errors like:
+
+    "C++ Compiler only available in TrueSTUDIO Professional"
+
+  The make may then fail in some of the post link processing because of some of
+  the other missing tools.  The Make.defs file replaces the ar and nm with
+  the default system x86 tool versions and these seem to work okay.  Disable all
+  of the following to avoid using objcopy:
+
+    CONFIG_RRLOAD_BINARY=n
+    CONFIG_INTELHEX_BINARY=n
+    CONFIG_MOTOROLA_SREC=n
+    CONFIG_RAW_BINARY=n
+
+  devkitARM
+  ---------
+  The devkitARM toolchain includes a version of MSYS make.  Make sure that the
+  the paths to Cygwin's /bin and /usr/bin directories appear BEFORE the devkitARM
+  path or will get the wrong version of make.
+
+IDEs
+====
+
+  NuttX is built using command-line make.  It can be used with an IDE, but some
+  effort will be required to create the project (There is a simple RIDE project
+  in the RIDE subdirectory).
+
+  Makefile Build
+  --------------
+  Under Eclipse, it is pretty easy to set up an "empty makefile project" and
+  simply use the NuttX makefile to build the system.  That is almost for free
+  under Linux.  Under Windows, you will need to set up the "Cygwin GCC" empty
+  makefile project in order to work with Windows (Google for "Eclipse Cygwin" -
+  there is a lot of help on the internet).
+
+  Native Build
+  ------------
+  Here are a few tips before you start that effort:
+
+  1) Select the toolchain that you will be using in your .config file
+  2) Start the NuttX build at least one time from the Cygwin command line
+     before trying to create your project.  This is necessary to create
+     certain auto-generated files and directories that will be needed.
+  3) Set up include pathes:  You will need include/, arch/arm/src/stm32,
+     arch/arm/src/common, arch/arm/src/armv7-m, and sched/.
+  4) All assembly files need to have the definition option -D __ASSEMBLY__
+     on the command line.
+
+  Startup files will probably cause you some headaches.  The NuttX startup file
+  is arch/arm/src/stm32/stm32_vectors.S.  With RIDE, I have to build NuttX
+  one time from the Cygwin command line in order to obtain the pre-built
+  startup object needed by RIDE.
+
+NuttX buildroot Toolchain
+=========================
+
+  A GNU GCC-based toolchain is assumed.  The files */setenv.sh should
+  be modified to point to the correct path to the Cortex-M3 GCC toolchain (if
+  different from the default in your PATH variable).
+
+  If you have no Cortex-M3 toolchain, one can be downloaded from the NuttX
+  SourceForge download site (https://sourceforge.net/project/showfiles.php?group_id=189573).
+  This GNU toolchain builds and executes in the Linux or Cygwin environment.
+
+  1. You must have already configured Nuttx in <some-dir>/nuttx.
+
+     cd tools
+     ./configure.sh fire-stm32v2/<sub-dir>
+
+  2. Download the latest buildroot package into <some-dir>
+
+  3. unpack the buildroot tarball.  The resulting directory may
+     have versioning information on it like buildroot-x.y.z.  If so,
+     rename <some-dir>/buildroot-x.y.z to <some-dir>/buildroot.
+
+  4. cd <some-dir>/buildroot
+
+  5. cp configs/cortexm3-defconfig-4.3.3 .config
+
+  6. make oldconfig
+
+  7. make
+
+  8. Edit setenv.h, if necessary, so that the PATH variable includes
+     the path to the newly built binaries.
+
+  See the file configs/README.txt in the buildroot source tree.  That has more
+  detailed PLUS some special instructions that you will need to follow if you are
+  building a Cortex-M3 toolchain for Cygwin under Windows.
+
+DFU and JTAG
+============
+
+  Enbling Support for the DFU Bootloader
+  --------------------------------------
+  The linker files in these projects can be configured to indicate that you
+  will be loading code using STMicro built-in USB Device Firmware Upgrade (DFU)
+  loader or via some JTAG emulator.  You can specify the DFU bootloader by
+  adding the following line:
+
+    CONFIG_STM32_DFU=y
+
+  to your .config file. Most of the configurations in this directory are set
+  up to use the DFU loader.
+
+  If CONFIG_STM32_DFU is defined, the code will not be positioned at the beginning
+  of FLASH (0x08000000) but will be offset to 0x08003000.  This offset is needed
+  to make space for the DFU loader and 0x08003000 is where the DFU loader expects
+  to find new applications at boot time.  If you need to change that origin for some
+  other bootloader, you will need to edit the file(s) ld.script.dfu for the
+  configuration.
+
+  The DFU SE PC-based software is available from the STMicro website,
+  http://www.st.com.  General usage instructions:
+
+  1. Convert the NuttX Intel Hex file (nuttx.hex) into a special DFU
+     file (nuttx.dfu)... see below for details.
+  2. Connect the M3 Wildfire board to your computer using a USB
+     cable.
+  3. Start the DFU loader on the M3 Wildfire board.  You do this by
+     resetting the board while holding the "Key" button.  Windows should
+     recognize that the DFU loader has been installed.
+  3. Run the DFU SE program to load nuttx.dfu into FLASH.
+
+  What if the DFU loader is not in FLASH?  The loader code is available
+  inside of the Demo dirctory of the USBLib ZIP file that can be downloaded
+  from the STMicro Website.  You can build it using RIDE (or other toolchains);
+  you will need a JTAG emulator to burn it into FLASH the first time.
+
+  In order to use STMicro's built-in DFU loader, you will have to get
+  the NuttX binary into a special format with a .dfu extension.  The
+  DFU SE PC_based software installation includes a file "DFU File Manager"
+  conversion program that a file in Intel Hex format to the special DFU
+  format.  When you successfully build NuttX, you will find a file called
+  nutt.hex in the top-level directory.  That is the file that you should
+  provide to the DFU File Manager.  You will end up with a file called
+  nuttx.dfu that you can use with the STMicro DFU SE program.
+
+  Enabling JTAG
+  -------------
+  If you are not using the DFU, then you will probably also need to enable
+  JTAG support.  By default, all JTAG support is disabled but there NuttX
+  configuration options to enable JTAG in various different ways.
+
+  These configurations effect the setting of the SWJ_CFG[2:0] bits in the AFIO
+  MAPR register.  These bits are used to configure the SWJ and trace alternate function I/Os. The SWJ (SerialWire JTAG) supports JTAG or SWD access to the
+  Cortex debug port.  The default state in this port is for all JTAG support
+  to be disable.
+
+  CONFIG_STM32_JTAG_FULL_ENABLE - sets SWJ_CFG[2:0] to 000 which enables full
+    SWJ (JTAG-DP + SW-DP)
+
+  CONFIG_STM32_JTAG_NOJNTRST_ENABLE - sets SWJ_CFG[2:0] to 001 which enable
+    full SWJ (JTAG-DP + SW-DP) but without JNTRST.
+
+  CONFIG_STM32_JTAG_SW_ENABLE - sets SWJ_CFG[2:0] to 010 which would set JTAG-DP
+    disabled and SW-DP enabled
+
+  The default setting (none of the above defined) is SWJ_CFG[2:0] set to 100
+  which disable JTAG-DP and SW-DP.
+
+OpenOCD
+=======
+
+I have also used OpenOCD with the M3 Wildfire.  In this case, I used
+the Olimex USB ARM OCD.  See the script in configs/fire-stm32v2/tools/oocd.sh
+for more information.  Using the script:
+
+1) Start the OpenOCD GDB server
+
+   cd <nuttx-build-directory>
+   configs/fire-stm32v2/tools/oocd.sh $PWD
+
+2) Load Nuttx
+
+   cd <nuttx-built-directory>
+   arm-none-eabi-gdb nuttx
+   gdb> target remote localhost:3333
+   gdb> mon reset
+   gdb> mon halt
+   gdb> load nuttx
+
+3) Running NuttX
+
+   gdb> mon reset
+   gdb> c
+
+LEDs
+====
+
+The M3 Wildfire has 3 LEDs labeled LED1, LED2 and LED3.  These LEDs are not
+used by the NuttX port unless CONFIG_ARCH_LEDS is defined.  In that case, the
+usage by the board port is defined in include/board.h and src/up_autoleds.c.
+The LEDs are used to encode OS-related events as follows:
+
+                                        /* LED1   LED2   LED3 */
+  #define LED_STARTED                0  /* OFF    OFF    OFF */
+  #define LED_HEAPALLOCATE           1  /* ON     OFF    OFF */
+  #define LED_IRQSENABLED            2  /* OFF    ON     OFF */
+  #define LED_STACKCREATED           3  /* OFF    OFF    OFF */
+
+  #define LED_INIRQ                  4  /* NC     NC    ON  (momentary) */
+  #define LED_SIGNAL                 5  /* NC     NC    ON  (momentary) */
+  #define LED_ASSERTION              6  /* NC     NC    ON  (momentary) */
+  #define LED_PANIC                  7  /* NC     NC    ON  (2Hz flashing) */
+  #undef  LED_IDLE                      /* Sleep mode indication not supported */
+
+RTC
+===
+
+  The STM32 RTC may configured using the following settings.
+
+    CONFIG_RTC - Enables general support for a hardware RTC. Specific
+      architectures may require other specific settings.
+    CONFIG_RTC_HIRES - The typical RTC keeps time to resolution of 1
+      second, usually supporting a 32-bit time_t value.  In this case,
+      the RTC is used to &quot;seed&quot; the normal NuttX timer and the
+      NuttX timer provides for higher resoution time. If CONFIG_RTC_HIRES
+      is enabled in the NuttX configuration, then the RTC provides higher
+      resolution time and completely replaces the system timer for purpose of
+      date and time.
+      CONFIG_RTC_FREQUENCY - If CONFIG_RTC_HIRES is defined, then the
+      frequency of the high resolution RTC must be provided.  If CONFIG_RTC_HIRES
+      is not defined, CONFIG_RTC_FREQUENCY is assumed to be one.
+    CONFIG_RTC_ALARM - Enable if the RTC hardware supports setting of an alarm.
+      A callback function will be executed when the alarm goes off
+
+  In hi-res mode, the STM32 RTC operates only at 16384Hz.  Overflow interrupts
+  are handled when the 32-bit RTC counter overflows every 3 days and 43 minutes.
+  A BKP register is incremented on each overflow interrupt creating, effectively,
+  a 48-bit RTC counter.
+
+  In the lo-res mode, the RTC operates at 1Hz.  Overflow interrupts are not handled
+  (because the next overflow is not expected until the year 2106.
+
+   WARNING:  Overflow interrupts are lost whenever the STM32 is powered down.  The
+   overflow interrupt may be lost even if the STM32 is powered down only momentarily.
+   Therefore hi-res solution is only useful in systems where the power is always on.
+
+M3 Wildfire-specific Configuration Options
+============================================
+
+    CONFIG_ARCH - Identifies the arch/ subdirectory.  This should
+       be set to:
+
+       CONFIG_ARCH=arm
+
+    CONFIG_ARCH_family - For use in C code:
+
+       CONFIG_ARCH_ARM=y
+
+    CONFIG_ARCH_architecture - For use in C code:
+
+       CONFIG_ARCH_CORTEXM3=y
+
+    CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory
+
+       CONFIG_ARCH_CHIP=stm32
+
+    CONFIG_ARCH_CHIP_name - For use in C code to identify the exact
+       chip:
+
+       CONFIG_ARCH_CHIP_STM32
+       CONFIG_ARCH_CHIP_STM32F103VET6
+
+    CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG - Enables special STM32 clock
+       configuration features.
+
+       CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG=n
+
+    CONFIG_ARCH_BOARD - Identifies the configs subdirectory and
+       hence, the board that supports the particular chip or SoC.
+
+       CONFIG_ARCH_BOARD=fire-stm32v2 (for the M3 Wildfire development board)
+
+    CONFIG_ARCH_BOARD_name - For use in C code
+
+       CONFIG_ARCH_BOARD_FIRE_STM32V2=y
+
+    CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation
+       of delay loops
+
+    CONFIG_ENDIAN_BIG - define if big endian (default is little
+       endian)
+
+    CONFIG_DRAM_SIZE - Describes the installed DRAM (SRAM in this case):
+
+       CONFIG_DRAM_SIZE=0x00010000 (64Kb)
+
+    CONFIG_DRAM_START - The start address of installed DRAM
+
+       CONFIG_DRAM_START=0x20000000
+
+    CONFIG_ARCH_IRQPRIO - The STM32F103Z supports interrupt prioritization
+
+       CONFIG_ARCH_IRQPRIO=y
+
+    CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that
+       have LEDs
+
+    CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt
+       stack. If defined, this symbol is the size of the interrupt
+        stack in bytes.  If not defined, the user task stacks will be
+      used during interrupt handling.
+
+    CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions
+
+    CONFIG_ARCH_LEDS -  Use LEDs to show state. Unique to board architecture.
+
+    CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that
+       cause a 100 second delay during boot-up.  This 100 second delay
+       serves no purpose other than it allows you to calibratre
+       CONFIG_ARCH_LOOPSPERMSEC.  You simply use a stop watch to measure
+       the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until
+       the delay actually is 100 seconds.
+
+  Individual subsystems can be enabled:
+    AHB
+    ---
+    CONFIG_STM32_DMA1
+    CONFIG_STM32_DMA2
+    CONFIG_STM32_CRC
+    CONFIG_STM32_FSMC
+    CONFIG_STM32_SDIO
+
+    APB1
+    ----
+    CONFIG_STM32_TIM2
+    CONFIG_STM32_TIM3
+    CONFIG_STM32_TIM4
+    CONFIG_STM32_TIM5
+    CONFIG_STM32_TIM6
+    CONFIG_STM32_TIM7
+    CONFIG_STM32_WWDG
+    CONFIG_STM32_IWDG
+    CONFIG_STM32_SPI2
+    CONFIG_STM32_SPI4
+    CONFIG_STM32_USART2
+    CONFIG_STM32_USART3
+    CONFIG_STM32_UART4
+    CONFIG_STM32_UART5
+    CONFIG_STM32_I2C1
+    CONFIG_STM32_I2C2
+    CONFIG_STM32_USB
+    CONFIG_STM32_CAN1
+    CONFIG_STM32_BKP
+    CONFIG_STM32_PWR
+    CONFIG_STM32_DAC1
+    CONFIG_STM32_DAC2
+    CONFIG_STM32_USB
+
+    APB2
+    ----
+    CONFIG_STM32_ADC1
+    CONFIG_STM32_ADC2
+    CONFIG_STM32_TIM1
+    CONFIG_STM32_SPI1
+    CONFIG_STM32_TIM8
+    CONFIG_STM32_USART1
+    CONFIG_STM32_ADC3
+
+  Timer and I2C devices may need to the following to force power to be applied
+  unconditionally at power up.  (Otherwise, the device is powered when it is
+  initialized).
+
+    CONFIG_STM32_FORCEPOWER
+
+  Timer devices may be used for different purposes.  One special purpose is
+  to generate modulated outputs for such things as motor control.  If CONFIG_STM32_TIMn
+  is defined (as above) then the following may also be defined to indicate that
+  the timer is intended to be used for pulsed output modulation, ADC conversion,
+  or DAC conversion.  Note that ADC/DAC require two definition:  Not only do you have
+  to assign the timer (n) for used by the ADC or DAC, but then you also have to
+  configure which ADC or DAC (m) it is assigned to.
+
+    CONFIG_STM32_TIMn_PWM   Reserve timer n for use by PWM, n=1,..,8
+    CONFIG_STM32_TIMn_ADC   Reserve timer n for use by ADC, n=1,..,8
+    CONFIG_STM32_TIMn_ADCm  Reserve timer n to trigger ADCm, n=1,..,8, m=1,..,3
+    CONFIG_STM32_TIMn_DAC   Reserve timer n for use by DAC, n=1,..,8
+    CONFIG_STM32_TIMn_DACm  Reserve timer n to trigger DACm, n=1,..,8, m=1,..,2
+
+  For each timer that is enabled for PWM usage, we need the following additional
+  configuration settings:
+
+    CONFIG_STM32_TIMx_CHANNEL - Specifies the timer output channel {1,..,4}
+
+  NOTE: The STM32 timers are each capable of generating different signals on
+  each of the four channels with different duty cycles.  That capability is
+  not supported by this driver:  Only one output channel per timer.
+
+  Alternate pin mappings.  The M3 Wildfire board requires only CAN1 remapping
+  On the M3 Wildfire board pin PB9 is wired as TX and pin PB8 is wired as RX.
+  Which then makes the proper connection through the CAN transiver SN65HVD230
+  out to the CAN D-type 9-pn male connector where pin 2 is CANL and pin 7 is CANH.
+
+    CONFIG_STM32_TIM1_FULL_REMAP
+    CONFIG_STM32_TIM1_PARTIAL_REMAP
+    CONFIG_STM32_TIM2_FULL_REMAP
+    CONFIG_STM32_TIM2_PARTIAL_REMAP_1
+    CONFIG_STM32_TIM2_PARTIAL_REMAP_2
+    CONFIG_STM32_TIM3_FULL_REMAP
+    CONFIG_STM32_TIM3_PARTIAL_REMAP
+    CONFIG_STM32_TIM4_REMAP
+    CONFIG_STM32_USART1_REMAP
+    CONFIG_STM32_USART2_REMAP
+    CONFIG_STM32_USART3_FULL_REMAP
+    CONFIG_STM32_USART3_PARTIAL_REMAP
+    CONFIG_STM32_SPI1_REMAP
+    CONFIG_STM32_SPI3_REMAP
+    CONFIG_STM32_I2C1_REMAP
+    CONFIG_STM32_CAN1_REMAP1
+    CONFIG_STM32_CAN1_REMAP2
+    CONFIG_STM32_CAN2_REMAP
+
+  JTAG Enable settings (by default JTAG-DP and SW-DP are disabled):
+    CONFIG_STM32_JTAG_FULL_ENABLE - Enables full SWJ (JTAG-DP + SW-DP)
+    CONFIG_STM32_JTAG_NOJNTRST_ENABLE - Enables full SWJ (JTAG-DP + SW-DP)
+      but without JNTRST.
+    CONFIG_STM32_JTAG_SW_ENABLE - Set JTAG-DP disabled and SW-DP enabled
+
+  STM32F103Z specific device driver settings
+
+    CONFIG_U[S]ARTn_SERIAL_CONSOLE - selects the USARTn (n=1,2,3) or UART
+           m (m=4,5) for the console and ttys0 (default is the USART1).
+    CONFIG_U[S]ARTn_RXBUFSIZE - Characters are buffered as received.
+       This specific the size of the receive buffer
+    CONFIG_U[S]ARTn_TXBUFSIZE - Characters are buffered before
+       being sent.  This specific the size of the transmit buffer
+    CONFIG_U[S]ARTn_BAUD - The configure BAUD of the UART.  Must be
+    CONFIG_U[S]ARTn_BITS - The number of bits.  Must be either 7 or 8.
+    CONFIG_U[S]ARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity
+    CONFIG_U[S]ARTn_2STOP - Two stop bits
+
+    CONFIG_STM32_SPI_INTERRUPTS - Select to enable interrupt driven SPI
+      support. Non-interrupt-driven, poll-waiting is recommended if the
+      interrupt rate would be to high in the interrupt driven case.
+    CONFIG_STM32_SPI_DMA - Use DMA to improve SPI transfer performance.
+      Cannot be used with CONFIG_STM32_SPI_INTERRUPT.
+
+    CONFIG_SDIO_DMA - Support DMA data transfers.  Requires CONFIG_STM32_SDIO
+      and CONFIG_STM32_DMA2.
+    CONFIG_SDIO_PRI - Select SDIO interrupt prority.  Default: 128
+    CONFIG_SDIO_DMAPRIO - Select SDIO DMA interrupt priority.
+      Default:  Medium
+    CONFIG_SDIO_WIDTH_D1_ONLY - Select 1-bit transfer mode.  Default:
+      4-bit transfer mode.
+
+  M3 Wildfire CAN Configuration
+
+    CONFIG_CAN - Enables CAN support (one or both of CONFIG_STM32_CAN1 or
+      CONFIG_STM32_CAN2 must also be defined)
+    CONFIG_CAN_EXTID - Enables support for the 29-bit extended ID.  Default
+      Standard 11-bit IDs.
+    CONFIG_CAN_FIFOSIZE - The size of the circular buffer of CAN messages.
+      Default: 8
+    CONFIG_CAN_NPENDINGRTR - The size of the list of pending RTR requests.
+      Default: 4
+    CONFIG_CAN_LOOPBACK - A CAN driver may or may not support a loopback
+      mode for testing. The STM32 CAN driver does support loopback mode.
+    CONFIG_CAN1_BAUD - CAN1 BAUD rate.  Required if CONFIG_STM32_CAN1 is defined.
+    CONFIG_CAN2_BAUD - CAN1 BAUD rate.  Required if CONFIG_STM32_CAN2 is defined.
+    CONFIG_CAN_TSEG1 - The number of CAN time quanta in segment 1. Default: 6
+    CONFIG_CAN_TSEG2 - the number of CAN time quanta in segment 2. Default: 7
+    CONFIG_CAN_REGDEBUG - If CONFIG_DEBUG is set, this will generate an
+      dump of all CAN registers.
+
+  M3 Wildfire LCD Hardware Configuration
+
+    CONFIG_LCD_LANDSCAPE - Define for 320x240 display "landscape"
+      support. Default is this 320x240 "landscape" orientation
+      (this setting is informative only... not used).
+    CONFIG_LCD_PORTRAIT - Define for 240x320 display "portrait"
+      orientation support.  In this orientation, the M3 Wildfire's
+      LCD ribbon cable is at the bottom of the display. Default is
+      320x240 "landscape" orientation.
+    CONFIG_LCD_RPORTRAIT - Define for 240x320 display "reverse
+      portrait" orientation support.  In this orientation, the
+      M3 Wildfire's LCD ribbon cable is at the top of the display.
+      Default is 320x240 "landscape" orientation.
+    CONFIG_LCD_BACKLIGHT - Define to support a backlight.
+    CONFIG_LCD_PWM - If CONFIG_STM32_TIM1 is also defined, then an
+      adjustable backlight will be provided using timer 1 to generate
+      various pulse widthes.  The granularity of the settings is
+      determined by CONFIG_LCD_MAXPOWER.  If CONFIG_LCD_PWM (or
+      CONFIG_STM32_TIM1) is not defined, then a simple on/off backlight
+      is provided.
+    CONFIG_LCD_RDSHIFT - When reading 16-bit gram data, there appears
+      to be a shift in the returned data.  This value fixes the offset.
+      Default 5.
+
+    The LCD driver dynamically selects the LCD based on the reported LCD
+    ID value.  However, code size can be reduced by suppressing support for
+    individual LCDs using:
+
+    CONFIG_STM32_AM240320_DISABLE
+    CONFIG_STM32_SPFD5408B_DISABLE
+    CONFIG_STM32_R61580_DISABLE
+
+Configurations
+==============
+
+Each M3 Wildfire configuration is maintained in a sudirectory and
+can be selected as follow:
+
+    cd tools
+    ./configure.sh fire-stm32v2/<subdir>
+    cd -
+    . ./setenv.sh
+
+Where <subdir> is one of the following:
+
+  nsh
+  ---
+    Configure the NuttShell (nsh) located at examples/nsh. The nsh configuration
+    contains support for some built-in applications that can be enabled by making
+    some additional minor change to the configuration file.
+
+    NOTE:  This configuration uses to the mconf configuration tool to control
+    the configuration.  See the section entitled "NuttX Configuration Tool"
+    in the top-level README.txt file.
+
+    STATUS:  The board port is basically functional. Not all features have been
+    verified.  The ENC28J60 network is not yet functional.  Networking is
+    enabled by default in this configuration for testing purposes.  To use this
+    configuration, the network must currently be disabled.  To do this using
+    the mconf configuration tool:
+
+    > make menuconfig
+
+    Then de-select "Networking Support" -> "Networking Support"
+
+    UPDATE:  The primary problem with the ENC29J60 is a v2 board issue:  The
+    SPI FLASH and the ENC28J60 shared the same SPI chip select signal (PA4-SPI1-NSS).
+    In order to finish the debug of the ENC28J60, it may be necessary to lift
+    the SPI FLASH chip select pin from the board.
+
diff --git a/nuttx/configs/fire-stm32v2/include/board.h b/nuttx/configs/fire-stm32v2/include/board.h
new file mode 100644
index 000000000..9a5d309ab
--- /dev/null
+++ b/nuttx/configs/fire-stm32v2/include/board.h
@@ -0,0 +1,442 @@
+/************************************************************************************
+ * configs/fire-stm32v2/include/board.h
+ * include/arch/board/board.h
+ *
+ *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <gnutt@nuttx.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __CONFIGS_FIRE_STM32V2_INCLUDE_BOARD_H
+#define __CONFIGS_FIRE_STM32V2_INCLUDE_BOARD_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include <nuttx/config.h>
+#ifndef __ASSEMBLY__
+# include <stdint.h>
+#endif
+#include "stm32_rcc.h"
+#include "stm32_sdio.h"
+#include "stm32_internal.h"
+
+/************************************************************************************
+ * Definitions
+ ************************************************************************************/
+
+/* Clocking *************************************************************************/
+
+/* On-board crystal frequency is 8MHz (HSE) */
+
+#define STM32_BOARD_XTAL        8000000ul
+
+/* PLL source is HSE/1, PLL multipler is 9: PLL frequency is 8MHz (XTAL) x 9 = 72MHz */
+
+#define STM32_CFGR_PLLSRC       RCC_CFGR_PLLSRC
+#define STM32_CFGR_PLLXTPRE     0
+#define STM32_CFGR_PLLMUL       RCC_CFGR_PLLMUL_CLKx9
+#define STM32_PLL_FREQUENCY     (9*STM32_BOARD_XTAL)
+
+/* Use the PLL and set the SYSCLK source to be the PLL */
+
+#define STM32_SYSCLK_SW         RCC_CFGR_SW_PLL
+#define STM32_SYSCLK_SWS        RCC_CFGR_SWS_PLL
+#define STM32_SYSCLK_FREQUENCY  STM32_PLL_FREQUENCY
+
+/* AHB clock (HCLK) is SYSCLK (72MHz) */
+
+#define STM32_RCC_CFGR_HPRE     RCC_CFGR_HPRE_SYSCLK
+#define STM32_HCLK_FREQUENCY    STM32_PLL_FREQUENCY
+#define STM32_BOARD_HCLK        STM32_HCLK_FREQUENCY    /* same as above, to satisfy compiler */
+
+/* APB2 clock (PCLK2) is HCLK (72MHz) */
+
+#define STM32_RCC_CFGR_PPRE2    RCC_CFGR_PPRE2_HCLK
+#define STM32_PCLK2_FREQUENCY   STM32_HCLK_FREQUENCY
+#define STM32_APB2_CLKIN        (STM32_PCLK2_FREQUENCY)   /* Timers 2-7, 12-14 */
+
+/* APB2 timers 1 and 8 will receive PCLK2. */
+
+#define STM32_APB2_TIM1_CLKIN   (STM32_PCLK2_FREQUENCY)
+#define STM32_APB2_TIM8_CLKIN   (STM32_PCLK2_FREQUENCY)
+
+/* APB1 clock (PCLK1) is HCLK/2 (36MHz) */
+
+#define STM32_RCC_CFGR_PPRE1    RCC_CFGR_PPRE1_HCLKd2
+#define STM32_PCLK1_FREQUENCY   (STM32_HCLK_FREQUENCY/2)
+
+/* APB1 timers 2-4 will be twice PCLK1 (I presume the remaining will receive PCLK1) */
+
+#define STM32_APB1_TIM2_CLKIN   (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM3_CLKIN   (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM4_CLKIN   (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM5_CLKIN   (STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM6_CLKIN   (STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM7_CLKIN   (STM32_PCLK1_FREQUENCY)
+
+/* USB divider -- Divide PLL clock by 1.5 */
+
+#define STM32_CFGR_USBPRE       0
+
+/* Timer Frequencies, if APBx is set to 1, frequency is same to APBx
+ * otherwise frequency is 2xAPBx. 
+ * Note: TIM1,8 are on APB2, others on APB1 */
+
+#define STM32_TIM18_FREQUENCY   STM32_HCLK_FREQUENCY
+#define STM32_TIM27_FREQUENCY   STM32_HCLK_FREQUENCY
+
+/* SDIO dividers.  Note that slower clocking is required when DMA is disabled 
+ * in order to avoid RX overrun/TX underrun errors due to delayed responses
+ * to service FIFOs in interrupt driven mode.  These values have not been
+ * tuned!!!
+ *
+ * HCLK=72MHz, SDIOCLK=72MHz, SDIO_CK=HCLK/(178+2)=400 KHz
+ */
+  
+#define SDIO_INIT_CLKDIV        (178 << SDIO_CLKCR_CLKDIV_SHIFT)
+
+/* DMA ON:  HCLK=72 MHz, SDIOCLK=72MHz, SDIO_CK=HCLK/(2+2)=18 MHz
+ * DMA OFF: HCLK=72 MHz, SDIOCLK=72MHz, SDIO_CK=HCLK/(3+2)=14.4 MHz
+ */
+
+#ifdef CONFIG_SDIO_DMA
+#  define SDIO_MMCXFR_CLKDIV    (2 << SDIO_CLKCR_CLKDIV_SHIFT) 
+#else
+#  define SDIO_MMCXFR_CLKDIV    (3 << SDIO_CLKCR_CLKDIV_SHIFT) 
+#endif
+
+/* DMA ON:  HCLK=72 MHz, SDIOCLK=72MHz, SDIO_CK=HCLK/(1+2)=24 MHz
+ * DMA OFF: HCLK=72 MHz, SDIOCLK=72MHz, SDIO_CK=HCLK/(3+2)=14.4 MHz
+ */
+
+#ifdef CONFIG_SDIO_DMA
+#  define SDIO_SDXFR_CLKDIV     (1 << SDIO_CLKCR_CLKDIV_SHIFT)
+#else
+#  define SDIO_SDXFR_CLKDIV     (3 << SDIO_CLKCR_CLKDIV_SHIFT)
+#endif
+
+/* LED definitions ******************************************************************/
+/* The M3 Wildfire has 3 LEDs labeled LED1, LED2 and LED3.  These LEDs are not
+ * used by the NuttX port unless CONFIG_ARCH_LEDS is defined.  In that case, the
+ * usage by the board port is defined in include/board.h and src/up_autoleds.c.
+ * The LEDs are used to encode OS-related events as follows:
+ */
+                                      /* LED1   LED2   LED3 */
+#define LED_STARTED                0  /* OFF    OFF    OFF */
+#define LED_HEAPALLOCATE           1  /* ON     OFF    OFF */
+#define LED_IRQSENABLED            2  /* OFF    ON     OFF */
+#define LED_STACKCREATED           3  /* OFF    OFF    OFF */
+
+#define LED_INIRQ                  4  /* NC     NC     ON  (momentary) */
+#define LED_SIGNAL                 4  /* NC     NC     ON  (momentary) */
+#define LED_ASSERTION              4  /* NC     NC     ON  (momentary) */
+#define LED_PANIC                  4  /* NC     NC     ON  (2Hz flashing) */
+#undef  LED_IDLE                      /* Sleep mode indication not supported */
+
+/* The M3 Wildfire supports several two user buttons:  KEY1 and KEY2 */
+
+#define BUTTON_KEY1                0
+#define BUTTON_KEY2                1
+#define NUM_BUTTONS                2
+
+#define BUTTON_KEY1_BIT            (1 << BUTTON_KEY1)
+#define BUTTON_KEY2_BIT            (1 << BUTTON_KEY2)
+
+/* Pin Remapping ********************************************************************/
+/* USB 2.0
+ *
+ * --- ------ -------------- -------------------------------------------------------------------
+ * PIN NAME   SIGNAL         NOTES
+ * --- ------ -------------- -------------------------------------------------------------------
+ *
+ * 70  PA11   PA11-USBDM     USB2.0
+ * 71  PA12   PA12-USBDP     USB2.0
+ * 2   PE3    PE3-USB-M      USB2.0
+ */
+
+/* 2.4" TFT + Touchscreen
+ *
+ * --- ------ -------------- -------------------------------------------------------------------
+ * PIN NAME   SIGNAL         NOTES
+ * --- ------ -------------- -------------------------------------------------------------------
+ *
+ * 30  PA5    PA5-SPI1-SCK   2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH
+ * 31  PA6    PA6-SPI1-MISO  2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH
+ * 32  PA7    PA7-SPI1-MOSI  2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH
+ * 92  PB6    PB6-I2C1-SCL   2.4" TFT + Touchscreen, AT24C02
+ * 93  PB7    PB7-I2C1-SDA   2.4" TFT + Touchscreen, AT24C02
+ * 81  PD0    PD0-FSMC_D2    2.4" TFT + Touchscreen
+ * 82  PD1    PD1-FSMC_D3    2.4" TFT + Touchscreen
+ * 85  PD4    PD4-FSMC_NOE   2.4" TFT + Touchscreen
+ * 86  PD5    PD5-FSMC_NWE   2.4" TFT + Touchscreen
+ * 88  PD7    PD7-FSMC_NE1   2.4" TFT + Touchscreen
+ * 55  PD8    PD8-FSMC_D13   2.4" TFT + Touchscreen
+ * 56  PD9    PD9-FSMC_D14   2.4" TFT + Touchscreen
+ * 57  PD10   PD10-FSMC_D15  2.4" TFT + Touchscreen
+ * 58  PD11   PD11-FSMC_A16  2.4" TFT + Touchscreen
+ * 60  PD13   PD13-LCD/LIGHT 2.4" TFT + Touchscreen
+ * 61  PD14   PD14-FSMC_D0   2.4" TFT + Touchscreen
+ * 62  PD15   PD15-FSMC_D1   2.4" TFT + Touchscreen
+ * 98  PE1    PE1-FSMC_NBL1  2.4" TFT + Touchscreen, 10Mbit EN28J60 Reset
+ * 38  PE7    PE7-FSMC_D4    2.4" TFT + Touchscreen
+ * 39  PE8    PE8-FSMC_D5    2.4" TFT + Touchscreen
+ * 40  PE9    PE9-FSMC_D6    2.4" TFT + Touchscreen
+ * 41  PE10   PE10-FSMC_D7   2.4" TFT + Touchscreen
+ * 42  PE11   PE11-FSMC_D8   2.4" TFT + Touchscreen
+ * 43  PE12   PE12-FSMC_D9   2.4" TFT + Touchscreen
+ * 44  PE13   PE13-FSMC_D10  2.4" TFT + Touchscreen
+ * 45  PE14   PE14-FSMC_D11  2.4" TFT + Touchscreen
+ * 46  PE15   PE15-FSMC_D12  2.4" TFT + Touchscreen
+ */
+
+#if defined(CONFIG_STM32_SPI1) && defined(CONFIG_STM32_SPI1_REMAP)
+#  error "SPI1 requires CONFIG_STM32_SPI1_REMAP=n"
+#endif
+
+#if defined(CONFIG_STM32_I2C1) && defined(CONFIG_STM32_I2C1_REMAP)
+#  error "SPI1 requires CONFIG_STM32_I2C1_REMAP=n"
+#endif
+
+/* AT24C02
+ *
+ * --- ------ -------------- -------------------------------------------------------------------
+ * PIN NAME   SIGNAL         NOTES
+ * --- ------ -------------- -------------------------------------------------------------------
+ *
+ * 92  PB6    PB6-I2C1-SCL   2.4" TFT + Touchscreen, AT24C02
+ * 93  PB7    PB7-I2C1-SDA   2.4" TFT + Touchscreen, AT24C02
+ */
+
+#if defined(CONFIG_STM32_I2C1) && defined(CONFIG_STM32_I2C1_REMAP)
+#  error "SPI1 requires CONFIG_STM32_I2C1_REMAP=n"
+#endif
+
+/* Potentiometer/ADC
+ *
+ * --- ------ -------------- -------------------------------------------------------------------
+ * PIN NAME   SIGNAL         NOTES
+ * --- ------ -------------- -------------------------------------------------------------------
+ *
+ * 16  PC1    PC1/ADC123-IN11 Potentiometer (R16)
+ * 24  PA1    PC1/ADC123-IN1
+ */
+
+/* USARTs
+ *
+ * --- ------ -------------- -------------------------------------------------------------------
+ * PIN NAME   SIGNAL         NOTES
+ * --- ------ -------------- -------------------------------------------------------------------
+ *
+ * 68  PA9    PA9-US1-TX     MAX3232, DB9 D8, Requires !CONFIG_STM32_USART1_REMAP
+ * 69  PA10   PA10-US1-RX    MAX3232, DB9 D8, Requires !CONFIG_STM32_USART1_REMAP
+ * 25  PA2    PA2-US2-TX     MAX3232, DB9 D7, Requires !CONFIG_STM32_USART2_REMAP
+ * 26  PA3    PA3-US2-RX     MAX3232, DB9 D7, Requires !CONFIG_STM32_USART2_REMAP
+ */
+
+#if defined(CONFIG_STM32_USART1) && defined(CONFIG_STM32_USART1_REMAP)
+#  errror "USART1 requires CONFIG_STM32_USART1_REMAP=n"
+#endif
+
+#if defined(CONFIG_STM32_USART2) && defined(CONFIG_STM32_USART2_REMAP)
+#  errror "USART2 requires CONFIG_STM32_USART2_REMAP=n"
+#endif
+
+/* 2MBit SPI FLASH
+ *
+ * --- ------ -------------- -------------------------------------------------------------------
+ * PIN NAME   SIGNAL         NOTES
+ * --- ------ -------------- -------------------------------------------------------------------
+ *
+ * 29  PA4    PA4-SPI1-NSS   10Mbit ENC28J60, SPI 2M FLASH
+ * 30  PA5    PA5-SPI1-SCK   2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH
+ * 31  PA6    PA6-SPI1-MISO  2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH
+ * 32  PA7    PA7-SPI1-MOSI  2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH
+ */
+
+#if defined(CONFIG_STM32_SPI1) && defined(CONFIG_STM32_SPI1_REMAP)
+#  error "SPI1 requires CONFIG_STM32_SPI1_REMAP=n"
+#endif
+
+/* ENC28J60
+ *
+ * --- ------ -------------- -------------------------------------------------------------------
+ * PIN NAME   SIGNAL         NOTES
+ * --- ------ -------------- -------------------------------------------------------------------
+ *
+ * 29  PA4    PA4-SPI1-NSS   10Mbit ENC28J60, SPI 2M FLASH
+ * 30  PA5    PA5-SPI1-SCK   2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH
+ * 31  PA6    PA6-SPI1-MISO  2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH
+ * 32  PA7    PA7-SPI1-MOSI  2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH
+ * 98  PE1    PE1-FSMC_NBL1  2.4" TFT + Touchscreen, 10Mbit EN28J60 Reset
+ * 4   PE5    (no name)      10Mbps ENC28J60 Interrupt
+ */
+
+#if defined(CONFIG_STM32_SPI1) && defined(CONFIG_STM32_SPI1_REMAP)
+#  error "SPI1 requires CONFIG_STM32_SPI1_REMAP=n"
+#endif
+
+/* MP3
+ *
+ * --- ------ -------------- -------------------------------------------------------------------
+ * PIN NAME   SIGNAL         NOTES
+ * --- ------ -------------- -------------------------------------------------------------------
+ *
+ * 48  PB11   PB11-MP3-RST   MP3
+ * 51  PB12   PB12-SPI2-NSS  MP3
+ * 52  PB13   PB13-SPI2-SCK  MP3
+ * 53  PB14   PB14-SPI2-MISO MP3
+ * 54  PB15   PB15-SPI2-MOSI MP3
+ * 63  PC6    PC6-MP3-XDCS   MP3
+ * 64  PC7    PC7-MP3-DREQ   MP3
+ */
+
+/* SD Card
+ *
+ * --- ------ -------------- -------------------------------------------------------------------
+ * PIN NAME   SIGNAL         NOTES
+ * --- ------ -------------- -------------------------------------------------------------------
+ *
+ * 65  PC8    PC8-SDIO-D0    SD card, pulled high
+ * 66  PC9    PC9-SDIO-D1    SD card, pulled high
+ * 78  PC10   PC10-SDIO-D2   SD card, pulled high
+ * 79  PC11   PC10-SDIO-D3   SD card, pulled high
+ * 80  PC12   PC12-SDIO-CLK  SD card
+ * 83  PD2    PD2-SDIO-CMD   SD card, pulled high
+ */
+
+/* CAN
+ *
+ * --- ------ -------------- -------------------------------------------------------------------
+ * PIN NAME   SIGNAL         NOTES
+ * --- ------ -------------- -------------------------------------------------------------------
+ *
+ * 95  PB8    PB8-CAN-RX     CAN tranceiver, Header 2H
+ * 96  PB9    PB9-CAN-TX     CAN tranceiver, Header 2H
+ */
+
+#if defined(CONFIG_STM32_CAN1) && !defined(CONFIG_STM32_CAN1_REMAP1)
+#  error "SPI1 requires CONFIG_STM32_CAN1_REMAP1=y"
+#endif
+
+/************************************************************************************
+ * Public Data
+ ************************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+#undef EXTERN
+#if defined(__cplusplus)
+#define EXTERN extern "C"
+extern "C" {
+#else
+#define EXTERN extern
+#endif
+
+/************************************************************************************
+ * Public Function Prototypes
+ ************************************************************************************/
+/************************************************************************************
+ * Name: stm32_boardinitialize
+ *
+ * Description:
+ *   All STM32 architectures must provide the following entry point.  This entry point
+ *   is called early in the intitialization -- after all memory has been configured
+ *   and mapped but before any devices have been initialized.
+ *
+ ************************************************************************************/
+
+EXTERN void stm32_boardinitialize(void);
+
+/************************************************************************************
+ * Button support.
+ *
+ * Description:
+ *   up_buttoninit() must be called to initialize button resources.  After
+ *   that, up_buttons() may be called to collect the current state of all
+ *   buttons or up_irqbutton() may be called to register button interrupt
+ *   handlers.
+ *
+ *   After up_buttoninit() has been called, up_buttons() may be called to
+ *   collect the state of all buttons.  up_buttons() returns an 8-bit bit set
+ *   with each bit associated with a button.  See the BUTTON_*_BIT and JOYSTICK_*_BIT
+ *   definitions in board.h for the meaning of each bit.
+ *
+ *   up_irqbutton() may be called to register an interrupt handler that will
+ *   be called when a button is depressed or released.  The ID value is a
+ *   button enumeration value that uniquely identifies a button resource. See the
+ *   BUTTON_* and JOYSTICK_* definitions in board.h for the meaning of enumeration
+ *   value.  The previous interrupt handler address is returned (so that it may
+ *   restored, if so desired).
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_ARCH_BUTTONS
+EXTERN void up_buttoninit(void);
+EXTERN uint8_t up_buttons(void);
+#ifdef CONFIG_ARCH_IRQBUTTONS
+EXTERN xcpt_t up_irqbutton(int id, xcpt_t irqhandler);
+#endif
+#endif
+
+/************************************************************************************
+ * Name:  stm32_ledinit, stm32_setled, and stm32_setleds
+ *
+ * Description:
+ *   If CONFIG_ARCH_LEDS is defined, then NuttX will control the on-board LEDs.  If
+ *   CONFIG_ARCH_LEDS is not defined, then the following interfacesare available to
+ *   control the LEDs from user applications.
+ *
+ ************************************************************************************/
+
+#ifndef CONFIG_ARCH_LEDS
+EXTERN void stm32_ledinit(void);
+EXTERN void stm32_setled(int led, bool ledon);
+EXTERN void stm32_setleds(uint8_t ledset);
+#endif
+
+/************************************************************************************
+ * Name:  fire_lcdclear
+ *
+ * Description:
+ *   This is a non-standard LCD interface just for the M3 Wildfire board.  Because
+ *   of the various rotations, clearing the display in the normal way by writing a
+ *   sequences of runs that covers the entire display can be very slow.  Here the
+ *   dispaly is cleared by simply setting all GRAM memory to the specified color.
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_STM32_FSMC
+EXTERN void fire_lcdclear(uint16_t color);
+#endif
+
+#endif /* __ASSEMBLY__ */
+#endif  /* __CONFIGS_FIRE_STM32V2_INCLUDE_BOARD_H */
diff --git a/nuttx/configs/fire-stm32v2/nsh/Make.defs b/nuttx/configs/fire-stm32v2/nsh/Make.defs
new file mode 100644
index 000000000..cbe3b08c8
--- /dev/null
+++ b/nuttx/configs/fire-stm32v2/nsh/Make.defs
@@ -0,0 +1,196 @@
+############################################################################
+# configs/fire-stm32v2/nsh/Make.defs
+#
+#   Copyright (C) 2012 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt <gnutt@nuttx.org>
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+include ${TOPDIR}/.config
+include ${TOPDIR}/tools/Config.mk
+
+# Setup for the selected toolchain
+
+ifeq ($(CONFIG_STM32_CODESOURCERYW),y)
+  # CodeSourcery under Windows
+  CROSSDEV = arm-none-eabi-
+  ARCROSSDEV = arm-none-eabi-
+  WINTOOL = y
+  ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft
+endif
+ifeq ($(CONFIG_STM32_CODESOURCERYL),y)
+  # CodeSourcery under Linux
+  CROSSDEV = arm-none-eabi-
+  ARCROSSDEV = arm-none-eabi-
+  ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft
+  MAXOPTIMIZATION = -O2
+endif
+ifeq ($(CONFIG_STM32_ATOLLIC_LITE),y)
+  # Atollic toolchain under Windows
+  CROSSDEV = arm-atollic-eabi-
+  ARCROSSDEV =
+  WINTOOL = y
+  ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft
+endif
+ifeq ($(CONFIG_STM32_ATOLLIC_PRO),y)
+  # Atollic toolchain under Windows
+  CROSSDEV = arm-atollic-eabi-
+  ARCROSSDEV = arm-atollic-eabi-
+  WINTOOL = y
+  ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft
+endif
+ifeq ($(CONFIG_STM32_DEVKITARM),y)
+  # devkitARM under Windows
+  CROSSDEV = arm-eabi-
+  ARCROSSDEV = arm-eabi-
+  WINTOOL = y
+  ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft
+endif
+ifeq ($(CONFIG_STM32_RAISONANCE),y)
+  # Raisonance RIDE7 under Windows
+  CROSSDEV = arm-none-eabi-
+  ARCROSSDEV = arm-none-eabi-
+  WINTOOL = y
+  ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft
+endif
+ifeq ($(CONFIG_STM32_BUILDROOT),y)
+  # NuttX buildroot under Linux or Cygwin
+  CROSSDEV = arm-elf-
+  ARCROSSDEV = arm-elf-
+  ARCHCPUFLAGS = -mtune=cortex-m3 -march=armv7-m -mfloat-abi=soft
+  MAXOPTIMIZATION = -Os
+endif
+
+# Pick the linker script
+
+ifeq ($(CONFIG_STM32_DFU),y)
+  LDSCRIPT = ld.script.dfu
+else
+  LDSCRIPT = ld.script
+endif
+
+ifeq ($(WINTOOL),y)
+  # Windows-native toolchains
+  DIRLINK = $(TOPDIR)/tools/winlink.sh
+  DIRUNLINK = $(TOPDIR)/tools/unlink.sh
+  MKDEP = $(TOPDIR)/tools/mknulldeps.sh
+  ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}"
+  ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}"
+  ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}"
+  MAXOPTIMIZATION = -O2
+else
+  # Linux/Cygwin-native toolchain 
+  MKDEP = $(TOPDIR)/tools/mkdeps.sh
+  ARCHINCLUDES = -I. -isystem $(TOPDIR)/include
+  ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx
+  ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)
+endif
+
+CC = $(CROSSDEV)gcc
+CXX = $(CROSSDEV)g++
+CPP = $(CROSSDEV)gcc -E
+LD = $(CROSSDEV)ld
+AR = $(ARCROSSDEV)ar rcs
+NM = $(ARCROSSDEV)nm
+OBJCOPY = $(CROSSDEV)objcopy
+OBJDUMP = $(CROSSDEV)objdump
+
+ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'}
+ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1}
+
+ifeq ("${CONFIG_DEBUG_SYMBOLS}","y")
+  ARCHOPTIMIZATION = -g
+else
+  ARCHOPTIMIZATION = $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
+endif
+
+ARCHCFLAGS = -fno-builtin
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow
+ARCHWARNINGSXX = -Wall -Wshadow
+ARCHDEFINES =
+ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
+
+CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
+CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
+CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES)
+AFLAGS = $(CFLAGS) -D__ASSEMBLY__
+
+NXFLATLDFLAGS1 = -r -d -warn-common
+NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat.ld -no-check-sections
+LDNXFLATFLAGS = -e main -s 2048
+
+OBJEXT = .o
+LIBEXT = .a
+EXEEXT =
+
+ifneq ($(CROSSDEV),arm-elf-)
+  LDFLAGS += -nostartfiles -nodefaultlibs
+endif
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+  LDFLAGS += -g
+endif
+
+define PREPROCESS
+	@echo "CPP: $1->$2"
+	@$(CPP) $(CPPFLAGS) $1 -o $2
+endef
+
+define COMPILE
+	@echo "CC: $1"
+	@$(CC) -c $(CFLAGS) $1 -o $2
+endef
+
+define COMPILEXX
+	@echo "CXX: $1"
+	@$(CXX) -c $(CXXFLAGS) $1 -o $2
+endef
+
+define ASSEMBLE
+	@echo "AS: $1"
+	@$(CC) -c $(AFLAGS) $1 -o $2
+endef
+
+define ARCHIVE
+	echo "AR: $2"; \
+	$(AR) $1 $2 || { echo "$(AR) $1 $2 FAILED!" ; exit 1 ; }
+endef
+
+define CLEAN
+	@rm -f *.o *.a
+endef
+
+HOSTCC = gcc
+HOSTINCLUDES = -I.
+HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -g -pipe
+HOSTLDFLAGS =
+
diff --git a/nuttx/configs/fire-stm32v2/nsh/defconfig b/nuttx/configs/fire-stm32v2/nsh/defconfig
new file mode 100644
index 000000000..1a849ad36
--- /dev/null
+++ b/nuttx/configs/fire-stm32v2/nsh/defconfig
@@ -0,0 +1,980 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# Nuttx/ Configuration
+#
+CONFIG_NUTTX_NEWCONFIG=y
+
+#
+# Build Setup
+#
+# CONFIG_EXPERIMENTAL is not set
+
+#
+# Build Configuration
+#
+# CONFIG_APPS_DIR="../apps"
+# CONFIG_BUILD_2PASS is not set
+
+#
+# Binary Output Formats
+#
+# CONFIG_RRLOAD_BINARY is not set
+CONFIG_INTELHEX_BINARY=y
+# CONFIG_MOTOROLA_SREC is not set
+# CONFIG_RAW_BINARY is not set
+
+#
+# Customize Header Files
+#
+# CONFIG_ARCH_STDBOOL_H is not set
+# CONFIG_ARCH_MATH_H is not set
+# CONFIG_ARCH_STDARG_H is not set
+
+#
+# Debug Options
+#
+# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_SYMBOLS is not set
+
+#
+# System Type
+#
+# CONFIG_ARCH_8051 is not set
+CONFIG_ARCH_ARM=y
+# CONFIG_ARCH_AVR is not set
+# CONFIG_ARCH_HC is not set
+# CONFIG_ARCH_MIPS is not set
+# CONFIG_ARCH_RGMP is not set
+# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_SIM is not set
+# CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_Z16 is not set
+# CONFIG_ARCH_Z80 is not set
+CONFIG_ARCH="arm"
+# CONFIG_ARCH_CHIP_C5471 is not set
+# CONFIG_ARCH_CHIP_CALYPSO is not set
+# CONFIG_ARCH_CHIP_DM320 is not set
+# CONFIG_ARCH_CHIP_IMX is not set
+# CONFIG_ARCH_CHIP_KINETIS is not set
+# CONFIG_ARCH_CHIP_LM3S is not set
+# CONFIG_ARCH_CHIP_LPC17XX is not set
+# CONFIG_ARCH_CHIP_LPC214X is not set
+# CONFIG_ARCH_CHIP_LPC2378 is not set
+# CONFIG_ARCH_CHIP_LPC31XX is not set
+# CONFIG_ARCH_CHIP_LPC43XX is not set
+# CONFIG_ARCH_CHIP_SAM3U is not set
+CONFIG_ARCH_CHIP_STM32=y
+# CONFIG_ARCH_CHIP_STR71X is not set
+CONFIG_ARCH_CORTEXM3=y
+CONFIG_ARCH_FAMILY="armv7-m"
+CONFIG_ARCH_CHIP="stm32"
+CONFIG_ARCH_HAVE_MPU=y
+# CONFIG_ARMV7M_MPU is not set
+CONFIG_ARCH_IRQPRIO=y
+CONFIG_BOARD_LOOPSPERMSEC=5483
+# CONFIG_ARCH_CALIBRATION is not set
+# CONFIG_SERIAL_TERMIOS is not set
+# CONFIG_NET_MULTICAST is not set
+
+#
+# STM32 Configuration Options
+#
+# CONFIG_ARCH_CHIP_STM32F100C8 is not set
+# CONFIG_ARCH_CHIP_STM32F100CB is not set
+# CONFIG_ARCH_CHIP_STM32F100R8 is not set
+# CONFIG_ARCH_CHIP_STM32F100RB is not set
+# CONFIG_ARCH_CHIP_STM32F100V8 is not set
+# CONFIG_ARCH_CHIP_STM32F100VB is not set
+# CONFIG_ARCH_CHIP_STM32F103RET6 is not set
+# CONFIG_ARCH_CHIP_STM32F103VCT6 is not set
+CONFIG_ARCH_CHIP_STM32F103VET6=y
+# CONFIG_ARCH_CHIP_STM32F103ZET6 is not set
+# CONFIG_ARCH_CHIP_STM32F105VBT7 is not set
+# CONFIG_ARCH_CHIP_STM32F107VC is not set
+# CONFIG_ARCH_CHIP_STM32F207IG is not set
+# CONFIG_ARCH_CHIP_STM32F405RG is not set
+# CONFIG_ARCH_CHIP_STM32F405VG is not set
+# CONFIG_ARCH_CHIP_STM32F405ZG is not set
+# CONFIG_ARCH_CHIP_STM32F407VE is not set
+# CONFIG_ARCH_CHIP_STM32F407VG is not set
+# CONFIG_ARCH_CHIP_STM32F407ZE is not set
+# CONFIG_ARCH_CHIP_STM32F407ZG is not set
+# CONFIG_ARCH_CHIP_STM32F407IE is not set
+# CONFIG_ARCH_CHIP_STM32F407IG is not set
+CONFIG_STM32_STM32F10XX=y
+CONFIG_STM32_HIGHDENSITY=y
+CONFIG_STM32_CODESOURCERYW=y
+# CONFIG_STM32_CODESOURCERYL is not set
+# CONFIG_STM32_ATOLLIC_LITE is not set
+# CONFIG_STM32_ATOLLIC_PRO is not set
+# CONFIG_STM32_DEVKITARM is not set
+# CONFIG_STM32_RAISONANCE is not set
+# CONFIG_STM32_BUILDROOT is not set
+# CONFIG_STM32_DFU is not set
+
+#
+# STM32 Peripheral Support
+#
+# CONFIG_STM32_ADC1 is not set
+# CONFIG_STM32_ADC2 is not set
+# CONFIG_STM32_ADC3 is not set
+# CONFIG_STM32_CRC is not set
+# CONFIG_STM32_DMA1 is not set
+CONFIG_STM32_DMA2=y
+CONFIG_STM32_BKP=y
+# CONFIG_STM32_CAN1 is not set
+# CONFIG_STM32_DAC1 is not set
+# CONFIG_STM32_DAC2 is not set
+# CONFIG_STM32_FSMC is not set
+CONFIG_STM32_I2C1=y
+# CONFIG_STM32_I2C2 is not set
+# CONFIG_STM32_IWDG is not set
+CONFIG_STM32_PWR=y
+CONFIG_STM32_SDIO=y
+CONFIG_STM32_SPI1=y
+# CONFIG_STM32_SPI2 is not set
+# CONFIG_STM32_SPI4 is not set
+# CONFIG_STM32_TIM1 is not set
+# CONFIG_STM32_TIM2 is not set
+# CONFIG_STM32_TIM3 is not set
+# CONFIG_STM32_TIM4 is not set
+# CONFIG_STM32_TIM5 is not set
+# CONFIG_STM32_TIM6 is not set
+# CONFIG_STM32_TIM7 is not set
+# CONFIG_STM32_TIM8 is not set
+CONFIG_STM32_USART1=y
+CONFIG_STM32_USART2=y
+# CONFIG_STM32_USART3 is not set
+# CONFIG_STM32_UART4 is not set
+# CONFIG_STM32_UART5 is not set
+CONFIG_STM32_USB=y
+# CONFIG_STM32_WWDG is not set
+CONFIG_STM32_SPI=y
+
+#
+# Alternate Pin Mapping
+#
+# CONFIG_STM32_USART1_REMAP is not set
+# CONFIG_STM32_USART2_REMAP is not set
+# CONFIG_STM32_SPI1_REMAP is not set
+# CONFIG_STM32_I2C1_REMAP is not set
+# CONFIG_STM32_JTAG_DISABLE is not set
+CONFIG_STM32_JTAG_FULL_ENABLE=y
+# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set
+# CONFIG_STM32_JTAG_SW_ENABLE is not set
+# CONFIG_STM32_FORCEPOWER is not set
+# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
+
+#
+# SPI Configuration
+#
+# CONFIG_STM32_SPI_INTERRUPTS is not set
+# CONFIG_STM32_SPI_DMA is not set
+
+#
+# SDIO Configuration
+#
+CONFIG_SDIO_DMA=y
+CONFIG_SDIO_PRI=128
+CONFIG_SDIO_DMAPRIO=0x00001000
+# CONFIG_SDIO_WIDTH_D1_ONLY is not set
+
+#
+# Ethernet MAC configuration
+#
+CONFIG_STM32_PHYADDR=1
+
+#
+# USB Host Configuration
+#
+
+#
+# Architecture Options
+#
+# CONFIG_ARCH_NOINTC is not set
+CONFIG_ARCH_DMA=y
+CONFIG_ARCH_STACKDUMP=y
+
+#
+# Board Settings
+#
+CONFIG_DRAM_START=0x20000000
+CONFIG_DRAM_SIZE=65536
+CONFIG_ARCH_HAVE_INTERRUPTSTACK=y
+# CONFIG_ARCH_INTERRUPTSTACK is not set
+
+#
+# Boot options
+#
+# CONFIG_BOOT_RUNFROMEXTSRAM is not set
+CONFIG_BOOT_RUNFROMFLASH=y
+# CONFIG_BOOT_RUNFROMISRAM is not set
+# CONFIG_BOOT_RUNFROMSDRAM is not set
+# CONFIG_BOOT_COPYTORAM is not set
+
+#
+# Board Selection
+#
+CONFIG_ARCH_BOARD_FIRE_STM32V2=y
+# CONFIG_ARCH_BOARD_CUSTOM is not set
+CONFIG_ARCH_BOARD="fire-stm32v2"
+
+#
+# Common Board Options
+#
+CONFIG_ARCH_HAVE_LEDS=y
+CONFIG_ARCH_LEDS=y
+CONFIG_ARCH_HAVE_BUTTONS=y
+# CONFIG_ARCH_BUTTONS is not set
+CONFIG_ARCH_HAVE_IRQBUTTONS=y
+CONFIG_NSH_MMCSDMINOR=0
+CONFIG_NSH_MMCSDSLOTNO=0
+CONFIG_NSH_MMCSDSPIPORTNO=0
+
+#
+# Board-Specific Options
+#
+
+#
+# M3 Wildfire Configuration
+#
+
+#
+# RTOS Features
+#
+CONFIG_MSEC_PER_TICK=10
+CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_INSTRUMENTATION is not set
+CONFIG_TASK_NAME_SIZE=0
+# CONFIG_JULIAN_TIME is not set
+CONFIG_START_YEAR=2011
+CONFIG_START_MONTH=7
+CONFIG_START_DAY=5
+CONFIG_DEV_CONSOLE=y
+# CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_MUTEX_TYPES is not set
+# CONFIG_PRIORITY_INHERITANCE is not set
+# CONFIG_FDCLONE_DISABLE is not set
+# CONFIG_FDCLONE_STDIO is not set
+CONFIG_SDCLONE_DISABLE=y
+CONFIG_SCHED_WORKQUEUE=y
+CONFIG_SCHED_WORKPRIORITY=192
+CONFIG_SCHED_WORKPERIOD=50000
+CONFIG_SCHED_WORKSTACKSIZE=1024
+CONFIG_SIG_SIGWORK=4
+# CONFIG_SCHED_LPWORK is not set
+CONFIG_SCHED_WAITPID=y
+# CONFIG_SCHED_ATEXIT is not set
+# CONFIG_SCHED_ONEXIT is not set
+CONFIG_USER_ENTRYPOINT="nsh_main"
+CONFIG_DISABLE_OS_API=y
+# CONFIG_DISABLE_CLOCK is not set
+# CONFIG_DISABLE_POSIX_TIMERS is not set
+# CONFIG_DISABLE_PTHREAD is not set
+# CONFIG_DISABLE_SIGNALS is not set
+# CONFIG_DISABLE_MQUEUE is not set
+# CONFIG_DISABLE_MOUNTPOINT is not set
+# CONFIG_DISABLE_ENVIRON is not set
+CONFIG_DISABLE_POLL=y
+
+#
+# Sizes of configurable things (0 disables)
+#
+CONFIG_MAX_TASKS=16
+CONFIG_MAX_TASK_ARGS=4
+CONFIG_NPTHREAD_KEYS=4
+CONFIG_NFILE_DESCRIPTORS=8
+CONFIG_NFILE_STREAMS=8
+CONFIG_NAME_MAX=32
+CONFIG_PREALLOC_MQ_MSGS=4
+CONFIG_MQ_MAXMSGSIZE=32
+CONFIG_MAX_WDOGPARMS=2
+CONFIG_PREALLOC_WDOGS=4
+CONFIG_PREALLOC_TIMERS=4
+
+#
+# Stack and heap information
+#
+# CONFIG_CUSTOM_STACK is not set
+CONFIG_IDLETHREAD_STACKSIZE=1024
+CONFIG_USERMAIN_STACKSIZE=2048
+CONFIG_PTHREAD_STACK_MIN=256
+CONFIG_PTHREAD_STACK_DEFAULT=2048
+
+#
+# Device Drivers
+#
+CONFIG_DEV_NULL=y
+# CONFIG_DEV_ZERO is not set
+# CONFIG_LOOP is not set
+# CONFIG_RAMDISK is not set
+# CONFIG_CAN is not set
+# CONFIG_PWM is not set
+CONFIG_I2C=y
+# CONFIG_I2C_SLAVE is not set
+CONFIG_I2C_TRANSFER=y
+# CONFIG_I2C_WRITEREAD is not set
+CONFIG_I2C_POLLED=y
+# CONFIG_I2C_TRACE is not set
+CONFIG_SPI=y
+# CONFIG_SPI_OWNBUS is not set
+CONFIG_SPI_EXCHANGE=y
+# CONFIG_SPI_CMDDATA is not set
+CONFIG_RTC=y
+# CONFIG_RTC_DATETIME is not set
+# CONFIG_RTC_HIRES is not set
+# CONFIG_RTC_ALARM is not set
+# CONFIG_WATCHDOG is not set
+# CONFIG_ANALOG is not set
+# CONFIG_BCH is not set
+# CONFIG_INPUT is not set
+# CONFIG_LCD is not set
+CONFIG_MMCSD=y
+CONFIG_MMCSD_NSLOTS=1
+# CONFIG_MMCSD_READONLY is not set
+# CONFIG_MMCSD_MULTIBLOCK_DISABLE is not set
+# CONFIG_MMCSD_MMCSUPPORT is not set
+# CONFIG_MMCSD_HAVECARDDETECT is not set
+CONFIG_MMCSD_SPI=y
+CONFIG_MMCSD_SPICLOCK=20000000
+CONFIG_MMCSD_SDIO=y
+# CONFIG_SDIO_MUXBUS is not set
+# CONFIG_MTD is not set
+CONFIG_NETDEVICES=y
+# CONFIG_NET_DM90x0 is not set
+CONFIG_ENC28J60=y
+CONFIG_ENC28J60_NINTERFACES=1
+CONFIG_ENC28J60_SPIMODE=0
+CONFIG_ENC28J60_FREQUENCY=20000000
+# CONFIG_ENC28J60_STATS is not set
+# CONFIG_ENC28J60_HALFDUPPLEX is not set
+# CONFIG_NET_E1000 is not set
+# CONFIG_NET_SLIP is not set
+# CONFIG_NET_VNET is not set
+# CONFIG_PIPES is not set
+# CONFIG_PM is not set
+# CONFIG_POWER is not set
+# CONFIG_SENSORS is not set
+# CONFIG_SERCOMM_CONSOLE is not set
+CONFIG_SERIAL=y
+# CONFIG_LOWLEVEL_CONSOLE is not set
+# CONFIG_16550_UART is not set
+CONFIG_ARCH_HAVE_USART1=y
+CONFIG_ARCH_HAVE_USART2=y
+CONFIG_MCU_SERIAL=y
+CONFIG_STANDARD_SERIAL=y
+CONFIG_USART1_SERIAL_CONSOLE=y
+# CONFIG_USART2_SERIAL_CONSOLE is not set
+# CONFIG_NO_SERIAL_CONSOLE is not set
+
+#
+# USART1 Configuration
+#
+CONFIG_USART1_RXBUFSIZE=256
+CONFIG_USART1_TXBUFSIZE=256
+CONFIG_USART1_BAUD=115200
+CONFIG_USART1_BITS=8
+CONFIG_USART1_PARITY=0
+CONFIG_USART1_2STOP=0
+
+#
+# USART2 Configuration
+#
+CONFIG_USART2_RXBUFSIZE=256
+CONFIG_USART2_TXBUFSIZE=256
+CONFIG_USART2_BAUD=115200
+CONFIG_USART2_BITS=8
+CONFIG_USART2_PARITY=0
+CONFIG_USART2_2STOP=0
+CONFIG_USBDEV=y
+# CONFIG_USBDEV_COMPOSITE is not set
+# CONFIG_USBDEV_ISOCHRONOUS is not set
+# CONFIG_USBDEV_DUALSPEED is not set
+CONFIG_USBDEV_SELFPOWERED=y
+# CONFIG_USBDEV_BUSPOWERED is not set
+# CONFIG_USBDEV_TRACE is not set
+# CONFIG_PL2303 is not set
+# CONFIG_CDCACM is not set
+CONFIG_USBMSC=y
+CONFIG_USBMSC_EP0MAXPACKET=64
+CONFIG_USBMSC_EPBULKOUT=2
+CONFIG_USBMSC_EPBULKIN=5
+CONFIG_USBMSC_NWRREQS=2
+CONFIG_USBMSC_NRDREQS=2
+CONFIG_USBMSC_BULKINREQLEN=256
+CONFIG_USBMSC_BULKOUTREQLEN=256
+CONFIG_USBMSC_VENDORID=0x584e
+CONFIG_USBMSC_VENDORSTR="NuttX"
+CONFIG_USBMSC_PRODUCTID=0x5342
+CONFIG_USBMSC_PRODUCTSTR="USBdev Storage"
+CONFIG_USBMSC_VERSIONNO=0x0399
+CONFIG_USBMSC_REMOVABLE=y
+# CONFIG_USBHOST is not set
+# CONFIG_WIRELESS is not set
+
+#
+# System Logging Device Options
+#
+
+#
+# System Logging
+#
+# CONFIG_RAMLOG is not set
+
+#
+# Networking Support
+#
+CONFIG_NET=y
+# CONFIG_NET_NOINTS is not set
+# CONFIG_NET_MULTIBUFFER is not set
+# CONFIG_NET_IPv6 is not set
+CONFIG_NSOCKET_DESCRIPTORS=16
+CONFIG_NET_NACTIVESOCKETS=16
+CONFIG_NET_SOCKOPTS=y
+CONFIG_NET_BUFSIZE=562
+# CONFIG_NET_TCPURGDATA is not set
+CONFIG_NET_TCP=y
+CONFIG_NET_TCP_CONNS=16
+CONFIG_NET_MAX_LISTENPORTS=16
+CONFIG_NET_TCP_READAHEAD_BUFSIZE=562
+CONFIG_NET_NTCP_READAHEAD_BUFFERS=8
+CONFIG_NET_TCP_RECVDELAY=0
+# CONFIG_NET_TCPBACKLOG is not set
+CONFIG_NET_UDP=y
+CONFIG_NET_UDP_CHECKSUMS=y
+CONFIG_NET_UDP_CONNS=8
+CONFIG_NET_BROADCAST=y
+CONFIG_NET_ICMP=y
+CONFIG_NET_ICMP_PING=y
+# CONFIG_NET_PINGADDRCONF is not set
+# CONFIG_NET_IGMP is not set
+CONFIG_NET_STATISTICS=y
+CONFIG_NET_RECEIVE_WINDOW=562
+CONFIG_NET_ARPTAB_SIZE=16
+# CONFIG_NET_ARP_IPIN is not set
+
+#
+# File Systems
+#
+
+#
+# File system configuration
+#
+CONFIG_FS_FAT=y
+CONFIG_FAT_LCNAMES=y
+CONFIG_FAT_LFN=y
+CONFIG_FAT_MAXFNAME=32
+# CONFIG_FS_FATTIME is not set
+# CONFIG_FAT_DMAMEMORY is not set
+# CONFIG_FS_RAMMAP is not set
+# CONFIG_NFS is not set
+# CONFIG_FS_NXFFS is not set
+# CONFIG_FS_ROMFS is not set
+
+#
+# System Logging
+#
+# CONFIG_SYSLOG is not set
+
+#
+# Memory Management
+#
+# CONFIG_MM_SMALL is not set
+CONFIG_MM_REGIONS=1
+# CONFIG_GRAN is not set
+
+#
+# Library Routines
+#
+CONFIG_STDIO_BUFFER_SIZE=256
+CONFIG_STDIO_LINEBUFFER=y
+CONFIG_NUNGET_CHARS=2
+CONFIG_LIB_HOMEDIR="/"
+# CONFIG_HAVE_LIBM is not set
+# CONFIG_NOPRINTF_FIELDWIDTH is not set
+# CONFIG_LIBC_FLOATINGPOINT is not set
+# CONFIG_EOL_IS_CR is not set
+# CONFIG_EOL_IS_LF is not set
+# CONFIG_EOL_IS_BOTH_CRLF is not set
+CONFIG_EOL_IS_EITHER_CRLF=y
+# CONFIG_LIBC_STRERROR is not set
+# CONFIG_LIBC_PERROR_STDOUT is not set
+CONFIG_ARCH_LOWPUTC=y
+CONFIG_LIB_SENDFILE_BUFSIZE=512
+# CONFIG_ARCH_ROMGETC is not set
+# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+# CONFIG_HAVE_CXX is not set
+# CONFIG_HAVE_CXXINITIALIZE is not set
+# CONFIG_CXX_NEWLONG is not set
+
+#
+# Application Configuration
+#
+
+#
+# Named Applications
+#
+CONFIG_NAMEDAPP=y
+
+#
+# Examples
+#
+
+#
+# ADC example
+#
+# CONFIG_EXAMPLES_ADC is not set
+
+#
+# Buttons example
+#
+# CONFIG_EXAMPLES_BUTTONS is not set
+
+#
+# CAN example
+#
+# CONFIG_EXAMPLES_CAN is not set
+
+#
+# USB CDC/ACM class driver example
+#
+# CONFIG_EXAMPLES_CDCACM is not set
+
+#
+# USB composite class driver example
+#
+# CONFIG_EXAMPLES_COMPOSITE is not set
+
+#
+# DHCP server example
+#
+# CONFIG_EXAMPLES_DHCPD is not set
+
+#
+# FTP client example
+#
+# CONFIG_EXAMPLES_FTPC is not set
+
+#
+# FTP server example
+#
+# CONFIG_EXAMPLES_FTPD is not set
+
+#
+# "Hello, World!" example
+#
+# CONFIG_EXAMPLES_HELLO is not set
+
+#
+# "Hello, World!" C++ example
+#
+# CONFIG_EXAMPLES_HELLOXX is not set
+
+#
+# USB HID keyboard example
+#
+# CONFIG_EXAMPLES_HIDKBD is not set
+
+#
+# IGMP example
+#
+# CONFIG_EXAMPLES_IGMP is not set
+
+#
+# LCD read/write example
+#
+# CONFIG_EXAMPLES_LCDRW is not set
+
+#
+# Memory management example
+#
+# CONFIG_EXAMPLES_MM is not set
+
+#
+# File system mount example
+#
+# CONFIG_EXAMPLES_MOUNT is not set
+
+#
+# FreeModBus example
+#
+# CONFIG_EXAMPLES_MODBUS is not set
+
+#
+# Network test example
+#
+# CONFIG_EXAMPLES_NETTEST is not set
+
+#
+# NuttShell (NSH) example
+#
+CONFIG_EXAMPLES_NSH=y
+
+#
+# NULL example
+#
+# CONFIG_EXAMPLES_NULL is not set
+
+#
+# NX graphics example
+#
+# CONFIG_EXAMPLES_NX is not set
+
+#
+# NxConsole example
+#
+# CONFIG_EXAMPLES_NXCONSOLE is not set
+
+#
+# NXFFS file system example
+#
+# CONFIG_EXAMPLES_NXFFS is not set
+
+#
+# NXFLAT example
+#
+# CONFIG_EXAMPLES_NXFLAT is not set
+
+#
+# NX graphics "Hello, World!" example
+#
+# CONFIG_EXAMPLES_NXHELLO is not set
+
+#
+# NX graphics image example
+#
+# CONFIG_EXAMPLES_NXIMAGE is not set
+
+#
+# NX graphics lines example
+#
+# CONFIG_EXAMPLES_NXLINES is not set
+
+#
+# NX graphics text example
+#
+# CONFIG_EXAMPLES_NXTEXT is not set
+
+#
+# OS test example
+#
+# CONFIG_EXAMPLES_OSTEST is not set
+
+#
+# Pascal "Hello, World!"example
+#
+# CONFIG_EXAMPLES_PASHELLO is not set
+
+#
+# Pipe example
+#
+# CONFIG_EXAMPLES_PIPE is not set
+
+#
+# Poll example
+#
+# CONFIG_EXAMPLES_POLL is not set
+
+#
+# Pulse width modulation (PWM) example
+#
+
+#
+# Quadrature encoder example
+#
+# CONFIG_EXAMPLES_QENCODER is not set
+
+#
+# RGMP example
+#
+# CONFIG_EXAMPLES_RGMP is not set
+
+#
+# ROMFS example
+#
+# CONFIG_EXAMPLES_ROMFS is not set
+
+#
+# sendmail example
+#
+# CONFIG_EXAMPLES_SENDMAIL is not set
+
+#
+# Serial loopback example
+#
+# CONFIG_EXAMPLES_SERLOOP is not set
+
+#
+# Telnet daemon example
+#
+# CONFIG_EXAMPLES_TELNETD is not set
+
+#
+# THTTPD web server example
+#
+# CONFIG_EXAMPLES_THTTPD is not set
+
+#
+# TIFF generation example
+#
+# CONFIG_EXAMPLES_TIFF is not set
+
+#
+# Touchscreen example
+#
+# CONFIG_EXAMPLES_TOUCHSCREEN is not set
+
+#
+# UDP example
+#
+# CONFIG_EXAMPLES_UDP is not set
+
+#
+# uIP web server example
+#
+# CONFIG_EXAMPLES_UIP is not set
+
+#
+# USB serial test example
+#
+# CONFIG_EXAMPLES_USBSERIAL is not set
+
+#
+# USB mass storage class example
+#
+CONFIG_EXAMPLES_USBMSC=y
+CONFIG_EXAMPLES_USBMSC_BUILTIN=y
+CONFIG_EXAMPLES_USBMSC_NLUNS=1
+CONFIG_EXAMPLES_USBMSC_DEVMINOR1=0
+CONFIG_EXAMPLES_USBMSC_DEVPATH1="/dev/mmcsd0"
+CONFIG_EXAMPLES_USBMSC_DEVMINOR2=1
+CONFIG_EXAMPLES_USBMSC_DEVPATH2="/dev/mmcsd1"
+CONFIG_EXAMPLES_USBMSC_DEVMINOR3=2
+CONFIG_EXAMPLES_USBMSC_DEVPATH3="/dev/mmcsd2"
+# CONFIG_EXAMPLES_USBMSC_DEBUGMM is not set
+# CONFIG_EXAMPLES_USBMSC_TRACEINIT is not set
+# CONFIG_EXAMPLES_USBMSC_TRACECLASS is not set
+# CONFIG_EXAMPLES_USBMSC_TRACETRANSFERS is not set
+# CONFIG_EXAMPLES_USBMSC_TRACECONTROLLER is not set
+# CONFIG_EXAMPLES_USBMSC_TRACEINTERRUPTS is not set
+
+#
+# USB serial terminal example
+#
+# CONFIG_EXAMPLES_USBTERM is not set
+
+#
+# Watchdog timer example
+#
+# CONFIG_EXAMPLES_WATCHDOG is not set
+
+#
+# wget example
+#
+# CONFIG_EXAMPLES_WGET is not set
+
+#
+# WLAN example
+#
+# CONFIG_EXAMPLES_WLAN is not set
+
+#
+# Interpreters
+#
+
+#
+# Interpreters
+#
+# CONFIG_FICL is not set
+# CONFIG_PCODE is not set
+
+#
+# Network Utilities
+#
+
+#
+# Networking Utilities
+#
+
+#
+# DHCP client
+#
+# CONFIG_NETUTILS_DHCPC is not set
+
+#
+# DHCP server
+#
+# CONFIG_NETUTILS_DHCPD is not set
+
+#
+# FTP client
+#
+# CONFIG_NETUTILS_FTPC is not set
+
+#
+# FTP server
+#
+# CONFIG_NETUTILS_FTPD is not set
+
+#
+# Name resolution
+#
+CONFIG_NETUTILS_RESOLV=y
+CONFIG_NET_RESOLV_ENTRIES=8
+
+#
+# SMTP
+#
+# CONFIG_NETUTILS_SMTP is not set
+
+#
+# TFTP client
+#
+CONFIG_NETUTILS_TELNETD=y
+
+#
+# TFTP client
+#
+CONFIG_NETUTILS_TFTPC=y
+
+#
+# THTTPD web server
+#
+# CONFIG_NETUTILS_THTTPD is not set
+
+#
+# uIP support library
+#
+CONFIG_NETUTILS_UIPLIB=y
+
+#
+# uIP web client
+#
+CONFIG_NETUTILS_WEBCLIENT=y
+
+#
+# uIP web server
+#
+# CONFIG_NETUTILS_WEBSERVER is not set
+
+#
+# ModBus
+#
+
+#
+# FreeModbus
+#
+# CONFIG_MODBUS is not set
+
+#
+# NSH Library
+#
+CONFIG_NSH_LIBRARY=y
+CONFIG_NSH_BUILTIN_APPS=y
+
+#
+# Disable Individual commands
+#
+# CONFIG_NSH_DISABLE_CAT is not set
+# CONFIG_NSH_DISABLE_CD is not set
+# CONFIG_NSH_DISABLE_CP is not set
+# CONFIG_NSH_DISABLE_DD is not set
+# CONFIG_NSH_DISABLE_ECHO is not set
+# CONFIG_NSH_DISABLE_EXEC is not set
+# CONFIG_NSH_DISABLE_EXIT is not set
+# CONFIG_NSH_DISABLE_FREE is not set
+# CONFIG_NSH_DISABLE_GET is not set
+# CONFIG_NSH_DISABLE_HELP is not set
+# CONFIG_NSH_DISABLE_IFCONFIG is not set
+# CONFIG_NSH_DISABLE_KILL is not set
+# CONFIG_NSH_DISABLE_LOSETUP is not set
+# CONFIG_NSH_DISABLE_LS is not set
+# CONFIG_NSH_DISABLE_MB is not set
+# CONFIG_NSH_DISABLE_MKDIR is not set
+# CONFIG_NSH_DISABLE_MKFATFS is not set
+# CONFIG_NSH_DISABLE_MKFIFO is not set
+# CONFIG_NSH_DISABLE_MKRD is not set
+# CONFIG_NSH_DISABLE_MH is not set
+# CONFIG_NSH_DISABLE_MOUNT is not set
+# CONFIG_NSH_DISABLE_MW is not set
+# CONFIG_NSH_DISABLE_NSFMOUNT is not set
+# CONFIG_NSH_DISABLE_PS is not set
+# CONFIG_NSH_DISABLE_PING is not set
+# CONFIG_NSH_DISABLE_PUT is not set
+# CONFIG_NSH_DISABLE_PWD is not set
+# CONFIG_NSH_DISABLE_RM is not set
+# CONFIG_NSH_DISABLE_RMDIR is not set
+# CONFIG_NSH_DISABLE_SET is not set
+# CONFIG_NSH_DISABLE_SH is not set
+# CONFIG_NSH_DISABLE_SLEEP is not set
+# CONFIG_NSH_DISABLE_TEST is not set
+# CONFIG_NSH_DISABLE_UMOUNT is not set
+# CONFIG_NSH_DISABLE_UNSET is not set
+# CONFIG_NSH_DISABLE_USLEEP is not set
+# CONFIG_NSH_DISABLE_WGET is not set
+# CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_FILEIOSIZE=512
+CONFIG_NSH_LINELEN=64
+CONFIG_NSH_NESTDEPTH=3
+# CONFIG_NSH_DISABLESCRIPT is not set
+# CONFIG_NSH_DISABLEBG is not set
+CONFIG_NSH_CONSOLE=y
+# CONFIG_NSH_USBCONSOLE is not set
+# CONFIG_NSH_CONDEV is not set
+CONFIG_NSH_ARCHINIT=y
+CONFIG_NSH_TELNET=y
+CONFIG_NSH_TELNETD_PORT=23
+CONFIG_NSH_TELNETD_DAEMONPRIO=100
+CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048
+CONFIG_NSH_TELNETD_CLIENTPRIO=100
+CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048
+CONFIG_NSH_IOBUFFER_SIZE=512
+# CONFIG_NSH_DHCPC is not set
+CONFIG_NSH_IPADDR=0x0a000002
+CONFIG_NSH_DRIPADDR=0x0a000001
+CONFIG_NSH_NETMASK=0xffffff00
+# CONFIG_NSH_NOMAC is not set
+
+#
+# System NSH Add-Ons
+#
+
+#
+# Custom free memory command
+#
+# CONFIG_SYSTEM_FREE is not set
+
+#
+# I2C tool
+#
+CONFIG_SYSTEM_I2CTOOL=y
+CONFIG_I2CTOOL_BUILTIN=y
+CONFIG_I2CTOOL_MINBUS=1
+CONFIG_I2CTOOL_MAXBUS=2
+CONFIG_I2CTOOL_MINADDR=0x03
+CONFIG_I2CTOOL_MAXADDR=0x77
+CONFIG_I2CTOOL_MAXREGADDR=0xff
+CONFIG_I2CTOOL_DEFFREQ=100000
+
+#
+# FLASH Program Installation
+#
+# CONFIG_SYSTEM_INSTALL is not set
+
+#
+# readline() support
+#
+CONFIG_SYSTEM_READLINE=y
+CONFIG_READLINE_ECHO=y
+
+#
+# VSN board Add-Ons
+#
+
+#
+# VSN board add-ons
+#
+# CONFIG_VSN_POWEROFF is not set
+# CONFIG_VSN_RAMTRON is not set
+# CONFIG_VSN_SDCARD is not set
+# CONFIG_VSN_SYSINFO is not set
diff --git a/nuttx/configs/fire-stm32v2/nsh/setenv.sh b/nuttx/configs/fire-stm32v2/nsh/setenv.sh
new file mode 100755
index 000000000..e6f4ee2e0
--- /dev/null
+++ b/nuttx/configs/fire-stm32v2/nsh/setenv.sh
@@ -0,0 +1,78 @@
+#!/bin/bash
+# configs/fire-stm32v2/nsh/setenv.sh
+#
+#   Copyright (C) 2012 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt <gnutt@nuttx.org>
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+if [ "$_" = "$0" ] ; then
+  echo "You must source this script, not run it!" 1>&2
+  exit 1
+fi
+
+WD=`pwd`
+if [ ! -x "setenv.sh" ]; then
+  echo "This script must be executed from the top-level NuttX build directory"
+  exit 1
+fi
+
+if [ -z "${PATH_ORIG}" ]; then
+  export PATH_ORIG="${PATH}"
+fi
+
+# This the Cygwin path to the location where I installed the RIDE
+# toolchain under windows.  You will also have to edit this if you install
+# the RIDE toolchain in any other location
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin"
+
+# This the Cygwin path to the location where I installed the CodeSourcery
+# toolchain under windows.  You will also have to edit this if you install
+# the CodeSourcery toolchain in any other location
+export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin"
+
+# These are the Cygwin paths to the locations where I installed the Atollic
+# toolchain under windows.  You will also have to edit this if you install
+# the Atollic toolchain in any other location.  /usr/bin is added before
+# the Atollic bin path because there is are binaries named gcc.exe and g++.exe
+# at those locations as well.
+#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin"
+#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin"
+
+# This the Cygwin path to the location where I build the buildroot
+# toolchain.
+#export TOOLCHAIN_BIN="${WD}/../misc/buildroot/build_arm_nofpu/staging_dir/bin"
+
+# This is the path to the tools/ subdirectory
+export TOOLS_DIR="${WD}/configs/fire-stm32v2/tools"
+
+# Add the path to the toolchain to the PATH variable
+export PATH="${TOOLCHAIN_BIN}:${TOOLS_DIR}:/sbin:/usr/sbin:${PATH_ORIG}"
+
+echo "PATH : ${PATH}"
diff --git a/nuttx/configs/fire-stm32v2/scripts/ld.script b/nuttx/configs/fire-stm32v2/scripts/ld.script
new file mode 100644
index 000000000..443dec50d
--- /dev/null
+++ b/nuttx/configs/fire-stm32v2/scripts/ld.script
@@ -0,0 +1,112 @@
+/****************************************************************************
+ * configs/fire-stm32v2/scripts/ld.script
+ *
+ *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <gnutt@nuttx.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/* The STM32F103VET6 has 512Kb of FLASH beginning at address 0x0800:0000 and
+ * 64Kb of SRAM beginning at address 0x2000:0000.  When booting from FLASH,
+ * FLASH memory is aliased to address 0x0000:0000 where the code expects to
+ * begin execution by jumping to the entry point in the 0x0800:0000 address
+ * range.
+ */
+
+MEMORY
+{
+    flash (rx) : ORIGIN = 0x08000000, LENGTH = 512K
+    sram (rwx) : ORIGIN = 0x20000000, LENGTH = 64K
+}
+
+OUTPUT_ARCH(arm)
+ENTRY(_stext)
+SECTIONS
+{
+	.text : {
+		_stext = ABSOLUTE(.);
+		*(.vectors)
+		*(.text .text.*)        
+		*(.fixup)
+		*(.gnu.warning)
+		*(.rodata .rodata.*)        
+		*(.gnu.linkonce.t.*)
+		*(.glue_7)
+		*(.glue_7t)
+		*(.got)
+		*(.gcc_except_table)
+		*(.gnu.linkonce.r.*)
+		_etext = ABSOLUTE(.);
+	} > flash
+
+	_eronly = ABSOLUTE(.);
+
+	/* The STM32F103Z has 64Kb of SRAM beginning at the following address */
+
+	.data : {
+		_sdata = ABSOLUTE(.);
+		*(.data .data.*)
+		*(.gnu.linkonce.d.*)
+		CONSTRUCTORS
+		_edata = ABSOLUTE(.);
+	} > sram AT > flash
+
+	.ARM.extab : {
+		*(.ARM.extab*)
+	} >sram
+
+	__exidx_start = ABSOLUTE(.);
+	.ARM.exidx : {
+		*(.ARM.exidx*)
+	} >sram
+	__exidx_end = ABSOLUTE(.);
+
+	.bss : {
+		_sbss = ABSOLUTE(.);
+		*(.bss .bss.*)
+		*(.gnu.linkonce.b.*)
+		*(COMMON)
+		_ebss = ABSOLUTE(.);
+	} > sram
+
+	/* Stabs debugging sections. */
+	.stab 0 : { *(.stab) }
+	.stabstr 0 : { *(.stabstr) }
+	.stab.excl 0 : { *(.stab.excl) }
+	.stab.exclstr 0 : { *(.stab.exclstr) }
+	.stab.index 0 : { *(.stab.index) }
+	.stab.indexstr 0 : { *(.stab.indexstr) }
+	.comment 0 : { *(.comment) }
+	.debug_abbrev 0 : { *(.debug_abbrev) }
+	.debug_info 0 : { *(.debug_info) }
+	.debug_line 0 : { *(.debug_line) }
+	.debug_pubnames 0 : { *(.debug_pubnames) }
+	.debug_aranges 0 : { *(.debug_aranges) }
+}
diff --git a/nuttx/configs/fire-stm32v2/scripts/ld.script.dfu b/nuttx/configs/fire-stm32v2/scripts/ld.script.dfu
new file mode 100644
index 000000000..c7add1422
--- /dev/null
+++ b/nuttx/configs/fire-stm32v2/scripts/ld.script.dfu
@@ -0,0 +1,111 @@
+/****************************************************************************
+ * configs/fire-stm32v2/scripts/ld.script.dfu
+ *
+ *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <gnutt@nuttx.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/* The STM32F103VET6 has 512Kb of FLASH beginning at address 0x0800:0000 and
+ * 64Kb of SRAM beginning at address 0x2000:0000.  Here we assume that the
+ * STM3210E-EVAL's DFU bootloader is being used.  In that case, the corrct
+ * load .text load address is 0x08003000 (leaving 464Kb).
+ */
+
+MEMORY
+{
+    flash (rx) : ORIGIN = 0x08003000, LENGTH = 464K
+    sram (rwx) : ORIGIN = 0x20000000, LENGTH = 64K
+}
+
+OUTPUT_ARCH(arm)
+ENTRY(_stext)
+SECTIONS
+{
+	.text : {
+		_stext = ABSOLUTE(.);
+		*(.vectors)
+		*(.text .text.*)        
+		*(.fixup)
+		*(.gnu.warning)
+		*(.rodata .rodata.*)        
+		*(.gnu.linkonce.t.*)
+		*(.glue_7)
+		*(.glue_7t)
+		*(.got)
+		*(.gcc_except_table)
+		*(.gnu.linkonce.r.*)
+		_etext = ABSOLUTE(.);
+	} > flash
+
+	_eronly = ABSOLUTE(.);
+
+	/* The STM32F103Z has 64Kb of SRAM beginning at the following address */
+
+	.data : {
+		_sdata = ABSOLUTE(.);
+		*(.data .data.*)
+		*(.gnu.linkonce.d.*)
+		CONSTRUCTORS
+		_edata = ABSOLUTE(.);
+	} > sram AT > flash
+
+	.ARM.extab : {
+		*(.ARM.extab*)
+	} >sram
+
+	__exidx_start = ABSOLUTE(.);
+	.ARM.exidx : {
+		*(.ARM.exidx*)
+	} >sram
+	__exidx_end = ABSOLUTE(.);
+
+	.bss : {
+		_sbss = ABSOLUTE(.);
+		*(.bss .bss.*)
+		*(.gnu.linkonce.b.*)
+		*(COMMON)
+		_ebss = ABSOLUTE(.);
+	} > sram
+
+	/* Stabs debugging sections. */
+	.stab 0 : { *(.stab) }
+	.stabstr 0 : { *(.stabstr) }
+	.stab.excl 0 : { *(.stab.excl) }
+	.stab.exclstr 0 : { *(.stab.exclstr) }
+	.stab.index 0 : { *(.stab.index) }
+	.stab.indexstr 0 : { *(.stab.indexstr) }
+	.comment 0 : { *(.comment) }
+	.debug_abbrev 0 : { *(.debug_abbrev) }
+	.debug_info 0 : { *(.debug_info) }
+	.debug_line 0 : { *(.debug_line) }
+	.debug_pubnames 0 : { *(.debug_pubnames) }
+	.debug_aranges 0 : { *(.debug_aranges) }
+}
diff --git a/nuttx/configs/fire-stm32v2/src/Makefile b/nuttx/configs/fire-stm32v2/src/Makefile
new file mode 100644
index 000000000..4c4fd1d41
--- /dev/null
+++ b/nuttx/configs/fire-stm32v2/src/Makefile
@@ -0,0 +1,123 @@
+############################################################################
+# configs/fire-stm32v2/src/Makefile
+#
+#   Copyright (C) 2012 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt <gnutt@nuttx.org>
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+-include $(TOPDIR)/Make.defs
+
+CFLAGS		+= -I$(TOPDIR)/sched
+
+ASRCS		= 
+AOBJS		= $(ASRCS:.S=$(OBJEXT))
+
+CSRCS		= up_boot.c up_spi.c up_usbdev.c up_mmcsd.c
+
+ifeq ($(CONFIG_STM32_FSMC),y)
+CSRCS		+= up_lcd.c up_selectlcd.c
+endif
+
+ifeq ($(CONFIG_HAVE_CXX),y)
+CSRCS		+= up_cxxinitialize.c
+endif
+
+ifeq ($(CONFIG_ARCH_LEDS),y)
+CSRCS		+= up_autoleds.c
+else
+CSRCS		+= up_userleds.c
+endif
+
+ifeq ($(CONFIG_ENC28J60),y)
+CSRCS		+= up_enc28j60.c
+endif
+
+ifeq ($(CONFIG_ARCH_BUTTONS),y)
+CSRCS		+=  up_buttons.c
+endif
+
+ifeq ($(CONFIG_NSH_ARCHINIT),y)
+CSRCS		+= up_nsh.c
+endif
+
+ifeq ($(CONFIG_USBMSC),y)
+CSRCS		+= up_usbmsc.c
+endif
+
+ifeq ($(CONFIG_USBDEV_COMPOSITE),y)
+CSRCS		+= up_composite.c
+endif
+
+ifeq ($(CONFIG_WATCHDOG),y)
+CSRCS		+= up_watchdog.c
+endif
+
+COBJS		= $(CSRCS:.c=$(OBJEXT))
+
+SRCS		= $(ASRCS) $(CSRCS)
+OBJS		= $(AOBJS) $(COBJS)
+
+ARCH_SRCDIR	= $(TOPDIR)/arch/$(CONFIG_ARCH)/src
+ifeq ($(WINTOOL),y)
+  CFLAGS	+= -I "${shell cygpath -w $(ARCH_SRCDIR)/chip}" \
+  		   -I "${shell cygpath -w $(ARCH_SRCDIR)/common}" \
+  		   -I "${shell cygpath -w $(ARCH_SRCDIR)/armv7-m}"
+else
+  CFLAGS	+= -I$(ARCH_SRCDIR)/chip -I$(ARCH_SRCDIR)/common -I$(ARCH_SRCDIR)/armv7-m
+endif
+
+all: libboard$(LIBEXT)
+
+$(AOBJS): %$(OBJEXT): %.S
+	$(call ASSEMBLE, $<, $@)
+
+$(COBJS) $(LINKOBJS): %$(OBJEXT): %.c
+	$(call COMPILE, $<, $@)
+
+libboard$(LIBEXT): $(OBJS)
+	@( for obj in $(OBJS) ; do \
+		$(call ARCHIVE, $@, $${obj}); \
+	done ; )
+
+.depend: Makefile $(SRCS)
+	@$(MKDEP) $(CC) -- $(CFLAGS) -- $(SRCS) >Make.dep
+	@touch $@
+
+depend: .depend
+
+clean:
+	@rm -f libboard$(LIBEXT) *~ .*.swp
+	$(call CLEAN)
+
+distclean: clean
+	@rm -f Make.dep .depend
+
+-include Make.dep
diff --git a/nuttx/configs/fire-stm32v2/src/fire-internal.h b/nuttx/configs/fire-stm32v2/src/fire-internal.h
new file mode 100644
index 000000000..801fb127e
--- /dev/null
+++ b/nuttx/configs/fire-stm32v2/src/fire-internal.h
@@ -0,0 +1,307 @@
+/************************************************************************************
+ * configs/fire-stm32v2/src/fire-internal.h
+ * arch/arm/src/board/fire-internal.n
+ *
+ *   Copyright (C) 2009 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <gnutt@nuttx.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __CONFIGS_FIRE_STM32V2_SRC_FIRE_INTERNAL_H
+#define __CONFIGS_FIRE_STM32V2_SRC_FIRE_INTERNAL_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include <nuttx/config.h>
+#include <nuttx/compiler.h>
+#include <stdint.h>
+
+/************************************************************************************
+ * Definitions
+ ************************************************************************************/
+
+/* How many SPI modules does this chip support? Most support 2 SPI modules (others
+ * may support more -- in such case, the following must be expanded).
+ */
+
+#if STM32_NSPI < 1
+#  undef CONFIG_STM32_SPI1
+#  undef CONFIG_STM32_SPI2
+#elif STM32_NSPI < 2
+#  undef CONFIG_STM32_SPI2
+#endif
+
+/* There is only CAN1 on the M3 Wildfire board */
+
+#if defined(CONFIG_STM32_CAN2)
+#  warning "The M3 Wildfire only supports CAN1"
+#endif
+
+/* M3 Wildfire GPIOs ****************************************************************/
+/* Camera
+ *
+ * --- ------ -------------- -------------------------------------------------------------------
+ * PIN NAME   SIGNAL         NOTES
+ * --- ------ -------------- -------------------------------------------------------------------
+ *
+ * 23  PA0    PA0-C-VSYNC    Camera (P9)
+ * 67  PA8    PA8-C-XCLK     Camera (P9)
+ * 91  PB5    PB5-C-WRST     Camera (P9)
+ * 95  PB8    PB8-C-DO_0     Camera (P9)
+ * 96  PB9    PB9-C-DO_1     Camera (P9)
+ * 47  PB10   PB10-C-DO_2    Camera (P9)
+ * 48  PB11   PB11-C-DO_3    Camera (P9)
+ * 51  PB12   PB12-C-DO_4    Camera (P9)
+ * 52  PB13   PB13-C-DO_5    Camera (P9)
+ * 53  PB14   PB14-C-DO_6    Camera (P9)
+ * 54  PB15   PB15-C-DO_7    Camera (P9)
+ * 63  PC6    PC6-C-SIO_C    Camera (P9)
+ * 64  PC7    PC7-C-SIO_D    Camera (P9)
+ * 84  PD3    PD3-C-WEN      Camera (P9)
+ * 87  PD6    PD6-C-OE       Camera (P9)
+ * 59  PD12   C-LED_EN       Camera (P9)
+ * 97  PE0    PE0-C-RRST     Camera (P9)
+ * 1   PE2    PE2-C-RCLK     Camera (P9)
+ */
+
+/* Bell
+ *
+ * --- ------ -------------- -------------------------------------------------------------------
+ * PIN NAME   SIGNAL         NOTES
+ * --- ------ -------------- -------------------------------------------------------------------
+ *
+ * 3   PE4    PE4-BEEP       LS1 Bell
+ */
+
+/* 2.4" TFT + Touchscreen
+ *
+ * --- ------ -------------- -------------------------------------------------------------------
+ * PIN NAME   SIGNAL         NOTES
+ * --- ------ -------------- -------------------------------------------------------------------
+ *
+ * 30  PA5    PA5-SPI1-SCK   2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH
+ * 31  PA6    PA6-SPI1-MISO  2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH
+ * 32  PA7    PA7-SPI1-MOSI  2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH
+ * 92  PB6    PB6-I2C1-SCL   2.4" TFT + Touchscreen, AT24C02
+ * 93  PB7    PB7-I2C1-SDA   2.4" TFT + Touchscreen, AT24C02
+ * 81  PD0    PD0-FSMC_D2    2.4" TFT + Touchscreen
+ * 82  PD1    PD1-FSMC_D3    2.4" TFT + Touchscreen
+ * 85  PD4    PD4-FSMC_NOE   2.4" TFT + Touchscreen
+ * 86  PD5    PD5-FSMC_NWE   2.4" TFT + Touchscreen
+ * 88  PD7    PD7-FSMC_NE1   2.4" TFT + Touchscreen
+ * 55  PD8    PD8-FSMC_D13   2.4" TFT + Touchscreen
+ * 56  PD9    PD9-FSMC_D14   2.4" TFT + Touchscreen
+ * 57  PD10   PD10-FSMC_D15  2.4" TFT + Touchscreen
+ * 58  PD11   PD11-FSMC_A16  2.4" TFT + Touchscreen
+ * 60  PD13   PD13-LCD/LIGHT 2.4" TFT + Touchscreen
+ * 61  PD14   PD14-FSMC_D0   2.4" TFT + Touchscreen
+ * 62  PD15   PD15-FSMC_D1   2.4" TFT + Touchscreen
+ * 98  PE1    PE1-FSMC_NBL1  2.4" TFT + Touchscreen
+ * 38  PE7    PE7-FSMC_D4    2.4" TFT + Touchscreen
+ * 39  PE8    PE8-FSMC_D5    2.4" TFT + Touchscreen
+ * 40  PE9    PE9-FSMC_D6    2.4" TFT + Touchscreen
+ * 41  PE10   PE10-FSMC_D7   2.4" TFT + Touchscreen
+ * 42  PE11   PE11-FSMC_D8   2.4" TFT + Touchscreen
+ * 43  PE12   PE12-FSMC_D9   2.4" TFT + Touchscreen
+ * 44  PE13   PE13-FSMC_D10  2.4" TFT + Touchscreen
+ * 45  PE14   PE14-FSMC_D11  2.4" TFT + Touchscreen
+ * 46  PE15   PE15-FSMC_D12  2.4" TFT + Touchscreen
+ */
+
+#define GPIO_LCD_BACKLIGHT (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
+                            GPIO_OUTPUT_CLEAR|GPIO_PORTD|GPIO_PIN13)
+
+/* GPIO_LCD_CS - Is there some kind of chip select for SPI1? */
+
+/* LEDs
+ *
+ * --- ------ -------------- -------------------------------------------------------------------
+ * PIN NAME   SIGNAL         NOTES
+ * --- ------ -------------- -------------------------------------------------------------------
+ *
+ * 18  PC3    PC3-LED1       LED1, Active low (pulled high)
+ * 33  PC4    PC4-LED2       LED2, Active low (pulled high)
+ * 34  PC5    PC5-LED3       LED3, Active low (pulled high)
+ */
+
+#define GPIO_LED1       (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
+                         GPIO_OUTPUT_CLEAR|GPIO_PORTC|GPIO_PIN3)
+#define GPIO_LED2       (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
+                         GPIO_OUTPUT_CLEAR|GPIO_PORTC|GPIO_PIN4)
+#define GPIO_LED3       (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
+                         GPIO_OUTPUT_CLEAR|GPIO_PORTC|GPIO_PIN5)
+
+/* Buttons
+ *
+ * --- ------ -------------- -------------------------------------------------------------------
+ * PIN NAME   SIGNAL         NOTES
+ * --- ------ -------------- -------------------------------------------------------------------
+ *
+ * 35  PB0    PB0-KEY1       KEY1, Low when closed (pulled high if open)
+ * 36  PB1    PB1-KEY2       KEY2, Low when closed (pulled high if open)
+ */
+
+#define MIN_IRQBUTTON   BUTTON_KEY1
+#define MAX_IRQBUTTON   BUTTON_KEY2
+#define NUM_IRQBUTTONS  (MAX_IRQBUTTON - MIN_IRQBUTTON + 1)
+
+#define GPIO_BTN_KEY1   (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|\
+                         GPIO_EXTI|GPIO_PORTB|GPIO_PIN0)
+#define GPIO_BTN_KEY2   (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|\
+                         GPIO_EXTI|GPIO_PORTB|GPIO_PIN1)
+
+/* 2MBit SPI FLASH
+ *
+ * --- ------ -------------- -------------------------------------------------------------------
+ * PIN NAME   SIGNAL         NOTES
+ * --- ------ -------------- -------------------------------------------------------------------
+ *
+ * 29  PA4    PA4-SPI1-NSS   10Mbit ENC28J60, SPI 2M FLASH
+ * 30  PA5    PA5-SPI1-SCK   2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH
+ * 31  PA6    PA6-SPI1-MISO  2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH
+ * 32  PA7    PA7-SPI1-MOSI  2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH
+ */
+
+#ifndef CONFIG_ENC28J60
+#  define GPIO_FLASH_CS    (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
+                            GPIO_OUTPUT_SET|GPIO_PORTA|GPIO_PIN4)
+#endif
+
+/* ENC28J60
+ *
+ * --- ------ -------------- -------------------------------------------------------------------
+ * PIN NAME   SIGNAL         NOTES
+ * --- ------ -------------- -------------------------------------------------------------------
+ *
+ * 29  PA4    PA4-SPI1-NSS   10Mbit ENC28J60, SPI 2M FLASH
+ * 30  PA5    PA5-SPI1-SCK   2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH
+ * 31  PA6    PA6-SPI1-MISO  2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH
+ * 32  PA7    PA7-SPI1-MOSI  2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH
+ * 98  PE1    PE1-FSMC_NBL1  2.4" TFT + Touchscreen, 10Mbit EN28J60 Reset
+ * 4   PE5    (no name)      10Mbps ENC28J60 Interrupt
+ */
+
+#if defined(CONFIG_STM32_FSMC) && defined(CONFIG_ENC28J60)
+#  warning "TFT LCD and ENCJ2860 shared PE1"
+#endif
+
+/* CS and Reset are active low.  Initial states are not selected and not in
+ * reset (driver does a soft reset).
+ */
+
+#ifdef CONFIG_ENC28J60
+#  define GPIO_ENC28J60_CS    (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
+                               GPIO_OUTPUT_SET|GPIO_PORTA|GPIO_PIN4)
+#  define GPIO_ENC28J60_RESET (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
+                               GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN1)
+#  define GPIO_ENC28J60_INTR  (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|\
+                               GPIO_EXTI|GPIO_PORTE|GPIO_PIN5)
+#endif
+
+/* MP3
+ *
+ * --- ------ -------------- -------------------------------------------------------------------
+ * PIN NAME   SIGNAL         NOTES
+ * --- ------ -------------- -------------------------------------------------------------------
+ *
+ * 48  PB11   PB11-MP3-RST   MP3
+ * 51  PB12   PB12-SPI2-NSS  MP3
+ * 52  PB13   PB13-SPI2-SCK  MP3
+ * 53  PB14   PB14-SPI2-MISO MP3
+ * 54  PB15   PB15-SPI2-MOSI MP3
+ * 63  PC6    PC6-MP3-XDCS   MP3
+ * 64  PC7    PC7-MP3-DREQ   MP3
+ */
+
+#define GPIO_MP3_CS    (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
+                         GPIO_OUTPUT_SET|GPIO_PORTC|GPIO_PIN6)
+
+/************************************************************************************
+ * Public Types
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public data
+ ************************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: stm32_spiinitialize
+ *
+ * Description:
+ *   Called to configure SPI chip select GPIO pins for the M3 Wildfire board.
+ *
+ ************************************************************************************/
+
+void weak_function stm32_spiinitialize(void);
+
+/************************************************************************************
+ * Name: stm32_usbinitialize
+ *
+ * Description:
+ *   Called to setup USB-related GPIO pins for the M3 Wildfire board.
+ *
+ ************************************************************************************/
+
+void weak_function stm32_usbinitialize(void);
+
+/************************************************************************************
+ * Name: stm32_selectlcd
+ *
+ * Description:
+ *   Initialize to the LCD
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_STM32_FSMC
+void stm32_selectlcd(void);
+#endif
+
+/****************************************************************************
+ * Name: stm32_sdinitialize
+ *
+ * Description:
+ *   Initialize the SPI-based SD card.  Requires CONFIG_DISABLE_MOUNTPOINT=n
+ *   and CONFIG_STM32_SDIO=y
+ *
+ ****************************************************************************/
+
+int stm32_sdinitialize(int minor);
+
+#endif /* __ASSEMBLY__ */
+#endif /* __CONFIGS_FIRE_STM32V2_SRC_FIRE_INTERNAL_H */
+
diff --git a/nuttx/configs/fire-stm32v2/src/up_autoleds.c b/nuttx/configs/fire-stm32v2/src/up_autoleds.c
new file mode 100644
index 000000000..4e70b01dd
--- /dev/null
+++ b/nuttx/configs/fire-stm32v2/src/up_autoleds.c
@@ -0,0 +1,388 @@
+/****************************************************************************
+ * configs/fire-stm32v2/src/up_autoleds.c
+ * arch/arm/src/board/up_autoleds.c
+ *
+ *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <gnutt@nuttx.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <stdint.h>
+#include <stdbool.h>
+#include <debug.h>
+
+#include <arch/board/board.h>
+#include <nuttx/power/pm.h>
+
+#include "chip.h"
+#include "up_arch.h"
+#include "up_internal.h"
+#include "stm32_internal.h"
+#include "fire-internal.h"
+
+/****************************************************************************
+ * Definitions
+ ****************************************************************************/
+
+/* Enables debug output from this file (needs CONFIG_DEBUG with
+ * CONFIG_DEBUG_VERBOSE too)
+ */
+
+#undef LED_DEBUG  /* Define to enable debug */
+
+#ifdef LED_DEBUG
+#  define leddbg  lldbg
+#  define ledvdbg llvdbg
+#else
+#  define leddbg(x...)
+#  define ledvdbg(x...)
+#endif
+
+/* The following definitions map the encoded LED setting to GPIO settings.
+ * 
+ * OFFBITS    ONBITS
+ * CLR  SET  CLR  SET
+ * 210  210  210  210
+ */
+
+#define FIRE_LED1         (1 << 0)
+#define FIRE_LED2         (1 << 1)
+#define FIRE_LED3         (1 << 2)
+
+#define ON_SETBITS_SHIFT  (0)
+#define ON_CLRBITS_SHIFT  (3)
+#define OFF_SETBITS_SHIFT (6)
+#define OFF_CLRBITS_SHIFT (9)
+
+#define ON_BITS(v)        ((v) & 0x3f)
+#define OFF_BITS(v)       (((v) >> 6) & 0x03f)
+#define SETBITS(b)        ((b) & 0x07)
+#define CLRBITS(b)        (((b) >> 3) & 0x07)
+
+#define ON_SETBITS(v)     (SETBITS(ON_BITS(v))
+#define ON_CLRBITS(v)     (CLRBITS(ON_BITS(v))
+#define OFF_SETBITS(v)    (SETBITS(OFF_BITS(v))
+#define OFF_CLRBITS(v)    (CLRBITS(OFF_BITS(v))
+
+/*                                        ON               OFF
+ *  -------------------------- -- ------------------ -----------------
+ *                                LED1   LED2  LED3  LED1  LED2  LED3
+ *  -------------------------- -- ------ ----- ----- ----- ----- -----
+ *  LED_STARTED                0  OFF    OFF   OFF   OFF   OFF   OFF
+ *  LED_HEAPALLOCATE           1  ON     OFF   OFF   OFF   OFF   OFF
+ *  LED_IRQSENABLED            2  OFF    ON    OFF   ON    OFF   OFF
+ *  LED_STACKCREATED           3  OFF    OFF   OFF   OFF   ON    OFF
+ *
+ *  LED_INIRQ                  4  NC     NC    ON    NC    NC    OFF
+ *  LED_SIGNAL                 4  NC     NC    ON    NC    NC    OFF
+ *  LED_ASSERTION              4  NC     NC    ON    NC    NC    OFF
+ *  LED_PANIC                  4  NC     NC    ON    NC    NC    OFF
+ *  -------------------------- -- ------ ----- ----- ----- ----- -----
+ */
+
+#define LED_STARTED_ON_SETBITS       (0)
+#define LED_STARTED_ON_CLRBITS       ((FIRE_LED1|FIRE_LED2|FIRE_LED3) << ON_CLRBITS_SHIFT)
+#define LED_STARTED_OFF_SETBITS      LED_STARTED_ON_SETBITS
+#define LED_STARTED_OFF_CLRBITS      LED_STARTED_ON_CLRBITS
+
+#define LED_HEAPALLOCATE_ON_SETBITS  ((FIRE_LED1) << ON_SETBITS_SHIFT)
+#define LED_HEAPALLOCATE_ON_CLRBITS  ((FIRE_LED2|FIRE_LED3) << ON_CLRBITS_SHIFT)
+#define LED_HEAPALLOCATE_OFF_SETBITS LED_STARTED_ON_SETBITS
+#define LED_HEAPALLOCATE_OFF_CLRBITS LED_STARTED_ON_CLRBITS
+
+#define LED_IRQSENABLED_ON_SETBITS   ((FIRE_LED2) << ON_SETBITS_SHIFT)
+#define LED_IRQSENABLED_ON_CLRBITS   ((FIRE_LED1|FIRE_LED3) << ON_CLRBITS_SHIFT)
+#define LED_IRQSENABLED_OFF_SETBITS  LED_HEAPALLOCATE_ON_SETBITS
+#define LED_IRQSENABLED_OFF_CLRBITS  LED_HEAPALLOCATE_ON_CLRBITS
+
+#define LED_STACKCREATED_ON_SETBITS  (0)
+#define LED_STACKCREATED_ON_CLRBITS  ((FIRE_LED1|FIRE_LED2|FIRE_LED3) << ON_CLRBITS_SHIFT)
+#define LED_STACKCREATED_OFF_SETBITS LED_IRQSENABLED_ON_SETBITS
+#define LED_STACKCREATED_OFF_CLRBITS LED_IRQSENABLED_ON_CLRBITS
+
+#define LED_FLASH_ON_SETBITS         ((FIRE_LED3) << ON_SETBITS_SHIFT)
+#define LED_FLASH_ON_CLRBITS         ((0) << ON_CLRBITS_SHIFT)
+#define LED_FLASH_OFF_SETBITS        ((0) << OFF_SETBITS_SHIFT)
+#define LED_FLASH_OFF_CLRBITS        ((FIRE_LED3) << OFF_CLRBITS_SHIFT)
+
+/**************************************************************************************
+ * Private Function Protototypes
+ **************************************************************************************/
+
+/* LED State Controls */
+
+static inline void led_clrbits(unsigned int clrbits);
+static inline void led_setbits(unsigned int setbits);
+static void led_setonoff(unsigned int bits);
+
+/* LED Power Management */
+
+#ifdef CONFIG_PM
+static void led_pm_notify(struct pm_callback_s *cb, enum pm_state_e pmstate);
+static int led_pm_prepare(struct pm_callback_s *cb, enum pm_state_e pmstate);
+#endif
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+static const uint16_t g_ledbits[8] =
+{
+  (LED_STARTED_ON_SETBITS       | LED_STARTED_ON_CLRBITS |
+   LED_STARTED_OFF_SETBITS      | LED_STARTED_OFF_CLRBITS),
+
+  (LED_HEAPALLOCATE_ON_SETBITS  | LED_HEAPALLOCATE_ON_CLRBITS |
+   LED_HEAPALLOCATE_OFF_SETBITS | LED_HEAPALLOCATE_OFF_CLRBITS),
+
+  (LED_IRQSENABLED_ON_SETBITS   | LED_IRQSENABLED_ON_CLRBITS |
+   LED_IRQSENABLED_OFF_SETBITS  | LED_IRQSENABLED_OFF_CLRBITS),
+
+  (LED_STACKCREATED_ON_SETBITS  | LED_STACKCREATED_ON_CLRBITS |
+   LED_STACKCREATED_OFF_SETBITS | LED_STACKCREATED_OFF_CLRBITS),
+
+  (LED_FLASH_ON_SETBITS         | LED_FLASH_ON_CLRBITS |
+   LED_FLASH_OFF_SETBITS        | LED_FLASH_OFF_CLRBITS)
+};
+
+#ifdef CONFIG_PM
+static struct pm_callback_s g_ledscb =
+{
+  .notify  = led_pm_notify,
+  .prepare = led_pm_prepare,
+};
+#endif
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: led_clrbits
+ *
+ * Description:
+ *   Clear all LEDs to the bit encoded state.  The LEDs are pulled up and,
+ *   hence, active low.
+ *
+ ****************************************************************************/
+
+static inline void led_clrbits(unsigned int clrbits)
+{
+  if ((clrbits & FIRE_LED1) != 0)
+    {
+      stm32_gpiowrite(GPIO_LED1, true);
+    }
+
+  if ((clrbits & FIRE_LED2) != 0)
+    {
+      stm32_gpiowrite(GPIO_LED2, true);
+    }
+
+  if ((clrbits & FIRE_LED3) != 0)
+    {
+      stm32_gpiowrite(GPIO_LED3, true);
+    }
+}
+
+/****************************************************************************
+ * Name: led_setbits
+ *
+ * Description:
+ *   Set all LEDs to the bit encoded state.  The LEDs are pulled up and,
+ *   hence, active low.
+ *
+ ****************************************************************************/
+
+static inline void led_setbits(unsigned int setbits)
+{
+  if ((setbits & FIRE_LED1) != 0)
+    {
+      stm32_gpiowrite(GPIO_LED1, false);
+    }
+
+  if ((setbits & FIRE_LED2) != 0)
+    {
+      stm32_gpiowrite(GPIO_LED2, false);
+    }
+
+  if ((setbits & FIRE_LED3) != 0)
+    {
+      stm32_gpiowrite(GPIO_LED3, false);
+    }
+}
+
+/****************************************************************************
+ * Name: led_setonoff
+ *
+ * Description:
+ *   Set/clear all LEDs to the bit encoded state
+ *
+ ****************************************************************************/
+
+static void led_setonoff(unsigned int bits)
+{
+  led_clrbits(CLRBITS(bits));
+  led_setbits(SETBITS(bits));
+}
+
+/****************************************************************************
+ * Name: led_pm_notify
+ *
+ * Description:
+ *   Notify the driver of new power state. This callback is called after
+ *   all drivers have had the opportunity to prepare for the new power state.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_PM
+static void led_pm_notify(struct pm_callback_s *cb , enum pm_state_e pmstate)
+{
+  switch (pmstate)
+    {
+      case(PM_NORMAL):
+        {
+          /* Restore normal LEDs operation */
+
+        }
+        break;
+
+      case(PM_IDLE):
+        {
+          /* Entering IDLE mode - Turn leds off */
+
+        }
+        break;
+
+      case(PM_STANDBY):
+        {
+          /* Entering STANDBY mode - Logic for PM_STANDBY goes here */
+
+        }
+        break;
+
+      case(PM_SLEEP):
+        {
+          /* Entering SLEEP mode - Logic for PM_SLEEP goes here */
+
+        }
+        break;
+
+      default:
+        {
+          /* Should not get here */
+
+        }
+        break;
+    }
+}
+#endif
+
+/****************************************************************************
+ * Name: led_pm_prepare
+ *
+ * Description:
+ *   Request the driver to prepare for a new power state. This is a warning
+ *   that the system is about to enter into a new power state. The driver
+ *   should begin whatever operations that may be required to enter power
+ *   state. The driver may abort the state change mode by returning a
+ *   non-zero value from the callback function.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_PM
+static int led_pm_prepare(struct pm_callback_s *cb , enum pm_state_e pmstate)
+{
+  /* No preparation to change power modes is required by the LEDs driver.
+   * We always accept the state change by returning OK.
+   */
+
+  return OK;
+}
+#endif
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_ledinit
+ ****************************************************************************/
+
+#ifdef CONFIG_ARCH_LEDS
+void up_ledinit(void)
+{
+   /* Configure LED1-4 GPIOs for output */
+
+   stm32_configgpio(GPIO_LED1);
+   stm32_configgpio(GPIO_LED2);
+   stm32_configgpio(GPIO_LED3);
+}
+
+/****************************************************************************
+ * Name: up_ledon
+ ****************************************************************************/
+
+void up_ledon(int led)
+{
+  led_setonoff(ON_BITS(g_ledbits[led]));
+}
+
+/****************************************************************************
+ * Name: up_ledoff
+ ****************************************************************************/
+
+void up_ledoff(int led)
+{
+  led_setonoff(OFF_BITS(g_ledbits[led]));
+}
+
+/****************************************************************************
+ * Name: up_ledpminitialize
+ ****************************************************************************/
+
+#ifdef CONFIG_PM
+void up_ledpminitialize(void)
+{
+  /* Register to receive power management callbacks */
+
+  int ret = pm_register(&g_ledscb);
+  if (ret != OK)
+  {
+      up_ledon(LED_ASSERTION);
+    }
+}
+#endif /* CONFIG_PM */
+
+#endif /* CONFIG_ARCH_LEDS */
diff --git a/nuttx/configs/fire-stm32v2/src/up_boot.c b/nuttx/configs/fire-stm32v2/src/up_boot.c
new file mode 100644
index 000000000..bb87afcdf
--- /dev/null
+++ b/nuttx/configs/fire-stm32v2/src/up_boot.c
@@ -0,0 +1,102 @@
+/************************************************************************************
+ * configs/fire-stm32v2/src/up_boot.c
+ * arch/arm/src/board/up_boot.c
+ *
+ *   Copyright (C) 2009, 2012 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <gnutt@nuttx.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <debug.h>
+
+#include <arch/board/board.h>
+
+#include "up_arch.h"
+#include "fire-internal.h"
+
+/************************************************************************************
+ * Definitions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Private Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: stm32_boardinitialize
+ *
+ * Description:
+ *   All STM32 architectures must provide the following entry point.  This entry point
+ *   is called early in the intitialization -- after all memory has been configured
+ *   and mapped but before any devices have been initialized.
+ *
+ ************************************************************************************/
+
+void stm32_boardinitialize(void)
+{
+  /* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak function
+   * stm32_spiinitialize() has been brought into the link.
+   */
+
+#if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2)
+  if (stm32_spiinitialize)
+    {
+      stm32_spiinitialize();
+    }
+#endif
+
+  /* Initialize USB is 1) USBDEV is selected, 2) the USB controller is not
+   * disabled, and 3) the weak function stm32_usbinitialize() has been brought
+   * into the build.
+   */
+
+#if defined(CONFIG_USBDEV) && defined(CONFIG_STM32_USB)
+  if (stm32_usbinitialize)
+    {
+      stm32_usbinitialize();
+    }
+#endif
+
+  /* Configure on-board LEDs if LED support has been selected. */
+
+#ifdef CONFIG_ARCH_LEDS
+  up_ledinit();
+#endif
+}
diff --git a/nuttx/configs/fire-stm32v2/src/up_buttons.c b/nuttx/configs/fire-stm32v2/src/up_buttons.c
new file mode 100644
index 000000000..738d65d5f
--- /dev/null
+++ b/nuttx/configs/fire-stm32v2/src/up_buttons.c
@@ -0,0 +1,153 @@
+/****************************************************************************
+ * configs/fire-stm32v2/src/up_buttons.c
+ *
+ *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <gnutt@nuttx.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <stdint.h>
+
+#include <arch/board/board.h>
+#include "fire-internal.h"
+
+#ifdef CONFIG_ARCH_BUTTONS
+
+/****************************************************************************
+ * Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_buttoninit
+ *
+ * Description:
+ *   up_buttoninit() must be called to initialize button resources.  After
+ *   that, up_buttons() may be called to collect the current state of all
+ *   buttons or up_irqbutton() may be called to register button interrupt
+ *   handlers.
+ *
+ ****************************************************************************/
+
+void up_buttoninit(void)
+{
+  /* Configure the GPIO pins as inputs.  NOTE that EXTI interrupts are 
+   * configured for some pins but NOT used in this file
+   */
+
+  stm32_configgpio(GPIO_BTN_KEY1);
+  stm32_configgpio(GPIO_BTN_KEY2);
+}
+
+/****************************************************************************
+ * Name: up_buttons
+ ****************************************************************************/
+
+uint8_t up_buttons(void)
+{
+  uint8_t ret = 0;
+
+  /* Check that state of each key.  A LOW value means that the key is pressed, */
+
+  if (!stm32_gpioread(GPIO_BTN_KEY1))
+    {
+      ret |= BUTTON_KEY1_BIT;
+    }
+
+  if (!stm32_gpioread(GPIO_BTN_KEY2))
+    {
+      ret |= BUTTON_KEY2_BIT;
+    }
+
+  return ret;
+}
+
+/************************************************************************************
+ * Button support.
+ *
+ * Description:
+ *   up_buttoninit() must be called to initialize button resources.  After
+ *   that, up_buttons() may be called to collect the current state of all
+ *   buttons or up_irqbutton() may be called to register button interrupt
+ *   handlers.
+ *
+ *   After up_buttoninit() has been called, up_buttons() may be called to
+ *   collect the state of all buttons.  up_buttons() returns an 8-bit bit set
+ *   with each bit associated with a button.  See the BUTTON_*_BIT and JOYSTICK_*_BIT
+ *   definitions in board.h for the meaning of each bit.
+ *
+ *   up_irqbutton() may be called to register an interrupt handler that will
+ *   be called when a button is depressed or released.  The ID value is a
+ *   button enumeration value that uniquely identifies a button resource. See the
+ *   BUTTON_* and JOYSTICK_* definitions in board.h for the meaning of enumeration
+ *   value.  The previous interrupt handler address is returned (so that it may
+ *   restored, if so desired).
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_ARCH_IRQBUTTONS
+xcpt_t up_irqbutton(int id, xcpt_t irqhandler)
+{
+  uint16_t gpio;
+
+  if (id == BUTTON_KEY1)
+    {
+      gpio = GPIO_KEY1;
+    }
+  else if (id == BUTTON_KEY2)
+    {
+      gpio = GPIO_KEY2;
+    }
+  else
+    {
+      return NULL;
+    }
+
+  return stm32_gpiosetevent(gpio, true, true, true, irqhandler);
+}
+#endif
+#endif /* CONFIG_ARCH_BUTTONS */
diff --git a/nuttx/configs/fire-stm32v2/src/up_composite.c b/nuttx/configs/fire-stm32v2/src/up_composite.c
new file mode 100644
index 000000000..6ebc06176
--- /dev/null
+++ b/nuttx/configs/fire-stm32v2/src/up_composite.c
@@ -0,0 +1,106 @@
+/****************************************************************************
+ * configs/fire-stm32v2/src/up_composite.c
+ *
+ *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <gnutt@nuttx.org>
+ *
+ * Configure and register the STM32 SPI-based MMC/SD block driver.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <stdio.h>
+#include <debug.h>
+
+#include "fire-internal.h"
+
+/****************************************************************************
+ * Pre-Processor Definitions
+ ****************************************************************************/
+/* Configuration ************************************************************/
+/* Device minor number */
+
+#ifndef CONFIG_EXAMPLES_COMPOSITE_DEVMINOR1
+#  define CONFIG_EXAMPLES_COMPOSITE_DEVMINOR1 0
+#endif
+
+/* Debug ********************************************************************/
+
+#ifdef CONFIG_CPP_HAVE_VARARGS
+#  ifdef CONFIG_DEBUG
+#    define message(...) lib_lowprintf(__VA_ARGS__)
+#    define msgflush()
+#  else
+#    define message(...) printf(__VA_ARGS__)
+#    define msgflush() fflush(stdout)
+#  endif
+#else
+#  ifdef CONFIG_DEBUG
+#    define message lib_lowprintf
+#    define msgflush()
+#  else
+#    define message printf
+#    define msgflush() fflush(stdout)
+#  endif
+#endif
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: composite_archinitialize
+ *
+ * Description:
+ *   Perform architecture specific initialization
+ *
+ ****************************************************************************/
+
+int composite_archinitialize(void)
+{
+  /* If examples/composite is built as an NSH command, then SD slot should
+   * already have been initized in nsh_archinitialize() (see up_nsh.c).  In
+   * this case, there is nothing further to be done here.
+   *
+   * NOTE: CONFIG_NSH_BUILTIN_APPS is not a fool-proof indication that NSH
+   * was built.
+   */
+
+#ifndef CONFIG_NSH_BUILTIN_APPS
+  return sd_mount(CONFIG_EXAMPLES_COMPOSITE_DEVMINOR1);
+#else
+  return OK;
+#endif /* CONFIG_NSH_BUILTIN_APPS */
+}
diff --git a/nuttx/configs/fire-stm32v2/src/up_cxxinitialize.c b/nuttx/configs/fire-stm32v2/src/up_cxxinitialize.c
new file mode 100644
index 000000000..d4afdd20b
--- /dev/null
+++ b/nuttx/configs/fire-stm32v2/src/up_cxxinitialize.c
@@ -0,0 +1,155 @@
+/************************************************************************************
+ * configs/fire-stm32v2/src/up_cxxinitialize.c
+ * arch/arm/src/board/up_cxxinitialize.c
+ *
+ *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <gnutt@nuttx.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <debug.h>
+
+#include <nuttx/arch.h>
+
+#include <arch/stm32/chip.h>
+#include "chip.h"
+
+#if defined(CONFIG_HAVE_CXX) && defined(CONFIG_HAVE_CXXINITIALIZE)
+
+/************************************************************************************
+ * Definitions
+ ************************************************************************************/
+/* Debug ****************************************************************************/
+/* Non-standard debug that may be enabled just for testing the static constructors */
+
+#ifndef CONFIG_DEBUG
+#  undef CONFIG_DEBUG_CXX
+#endif
+
+#ifdef CONFIG_DEBUG_CXX
+#  define cxxdbg              dbg
+#  define cxxlldbg            lldbg
+#  ifdef CONFIG_DEBUG_VERBOSE
+#    define cxxvdbg           vdbg
+#    define cxxllvdbg         llvdbg
+#  else
+#    define cxxvdbg(x...)
+#    define cxxllvdbg(x...)
+#  endif
+#else
+#  define cxxdbg(x...)
+#  define cxxlldbg(x...)
+#  define cxxvdbg(x...)
+#  define cxxllvdbg(x...)
+#endif
+
+/************************************************************************************
+ * Private Types
+ ************************************************************************************/
+/* This type defines one entry in initialization array */
+
+typedef void (*initializer_t)(void);
+
+/************************************************************************************
+ * External references
+ ************************************************************************************/
+/* _sinit and _einit are symbols exported by the linker script that mark the
+ * beginning and the end of the C++ initialization section.
+ */
+
+extern initializer_t _sinit;
+extern initializer_t _einit;
+
+/* _stext and _etext are symbols exported by the linker script that mark the
+ * beginning and the end of text.
+ */
+
+extern uint32_t _stext;
+extern uint32_t _etext;
+
+/************************************************************************************
+ * Private Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/****************************************************************************
+ * Name: up_cxxinitialize
+ *
+ * Description:
+ *   If C++ and C++ static constructors are supported, then this function
+ *   must be provided by board-specific logic in order to perform
+ *   initialization of the static C++ class instances.
+ *
+ *   This function should then be called in the application-specific
+ *   user_start logic in order to perform the C++ initialization.  NOTE
+ *   that no component of the core NuttX RTOS logic is involved; This
+ *   function defintion only provides the 'contract' between application
+ *   specific C++ code and platform-specific toolchain support
+ *
+ ***************************************************************************/
+
+void up_cxxinitialize(void)
+{
+  initializer_t *initp;
+
+  cxxdbg("_sinit: %p _einit: %p _stext: %p _etext: %p\n",
+         &_sinit, &_einit, &_stext, &_etext);
+
+  /* Visit each entry in the initialzation table */
+
+  for (initp = &_sinit; initp != &_einit; initp++)
+    {
+      initializer_t initializer = *initp;
+      cxxdbg("initp: %p initializer: %p\n", initp, initializer);
+
+      /* Make sure that the address is non-NULL and lies in the text region
+       * defined by the linker script.  Some toolchains may put NULL values
+       * or counts in the initialization table
+       */
+
+      if ((void*)initializer > (void*)&_stext && (void*)initializer < (void*)&_etext)
+        {
+          cxxdbg("Calling %p\n", initializer);
+          initializer();
+        }
+    }
+}
+
+#endif /* CONFIG_HAVE_CXX && CONFIG_HAVE_CXXINITIALIZE */
+
diff --git a/nuttx/configs/fire-stm32v2/src/up_enc28j60.c b/nuttx/configs/fire-stm32v2/src/up_enc28j60.c
new file mode 100644
index 000000000..5247f5886
--- /dev/null
+++ b/nuttx/configs/fire-stm32v2/src/up_enc28j60.c
@@ -0,0 +1,211 @@
+/****************************************************************************
+ * configs/fire-stm32v2/src/up_enc28j60.c
+ *
+ *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <gnutt@nuttx.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/* 2MBit SPI FLASH OR ENC28J60
+ *
+ * --- ------ -------------- -----------------------------------------------------
+ * PIN NAME   SIGNAL         NOTES
+ * --- ------ -------------- -----------------------------------------------------
+ *
+ * 29  PA4    PA4-SPI1-NSS   10Mbit ENC28J60, SPI 2M FLASH
+ * 30  PA5    PA5-SPI1-SCK   2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH
+ * 31  PA6    PA6-SPI1-MISO  2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH
+ * 32  PA7    PA7-SPI1-MOSI  2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH
+ */
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <stdint.h>
+#include <stdio.h>
+#include <debug.h>
+
+#include <nuttx/spi.h>
+#include <nuttx/net/enc28j60.h>
+
+#include <arch/board/board.h>
+
+#include "chip.h"
+#include "up_arch.h"
+#include "up_internal.h"
+#include "fire-internal.h"
+
+#ifdef CONFIG_ENC28J60
+
+/****************************************************************************
+ * Definitions
+ ****************************************************************************/
+/* Configuration ************************************************************/
+/* ENC28J60
+ *
+ * --- ------ -------------- -----------------------------------------------------
+ * PIN NAME   SIGNAL         NOTES
+ * --- ------ -------------- -----------------------------------------------------
+ *
+ * 29  PA4    PA4-SPI1-NSS   10Mbit ENC28J60, SPI 2M FLASH
+ * 30  PA5    PA5-SPI1-SCK   2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH
+ * 31  PA6    PA6-SPI1-MISO  2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH
+ * 32  PA7    PA7-SPI1-MOSI  2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH
+ * 98  PE1    PE1-FSMC_NBL1  2.4" TFT + Touchscreen, 10Mbit EN28J60 Reset
+ * 4   PE5    (no name)      10Mbps ENC28J60 Interrupt
+ */
+
+/* ENC28J60 is on SPI1 */
+
+#ifndef CONFIG_STM32_SPI1
+# error "Need CONFIG_STM32_SPI1 in the configuration"
+#endif
+
+/* SPI Assumptions **********************************************************/
+
+#define ENC28J60_SPI_PORTNO 1   /* On SPI1 */
+#define ENC28J60_DEVNO      0   /* Only one ENC28J60 */
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+struct stm32_lower_s
+{
+  const struct enc_lower_s lower;    /* Low-level MCU interface */
+  xcpt_t                   handler;  /* ENC28J60 interrupt handler */
+};
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+static int  up_attach(FAR const struct enc_lower_s *lower, xcpt_t handler);
+static void up_enable(FAR const struct enc_lower_s *lower);
+static void up_disable(FAR const struct enc_lower_s *lower);
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/* The ENC28J60 normal provides interrupts to the MCU via a GPIO pin.  The
+ * following structure provides an MCU-independent mechanixm for controlling
+ * the ENC28J60 GPIO interrupt.
+ */
+
+static struct stm32_lower_s g_enclower =
+{
+  .lower =
+  {
+    .attach  = up_attach,
+    .enable  = up_enable,
+    .disable = up_disable
+  },
+  .handler = NULL,
+};
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: struct enc_lower_s methods
+ ****************************************************************************/
+
+static int up_attach(FAR const struct enc_lower_s *lower, xcpt_t handler)
+{
+  FAR struct stm32_lower_s *priv = (FAR struct stm32_lower_s *)lower;
+
+  /* Just save the handler for use when the interrupt is enabled */
+
+  priv->handler = handler;
+  return OK;
+}
+
+static void up_enable(FAR const struct enc_lower_s *lower)
+{
+  FAR struct stm32_lower_s *priv = (FAR struct stm32_lower_s *)lower;
+
+  DEBUGASSERT(priv->handler);
+  (void)stm32_gpiosetevent(GPIO_ENC28J60_INTR, true, true, true, priv->handler);
+}
+
+static void up_disable(FAR const struct enc_lower_s *lower)
+{
+  (void)stm32_gpiosetevent(GPIO_ENC28J60_INTR, true, true, true, NULL);
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_netinitialize
+ ****************************************************************************/
+
+void up_netinitialize(void)
+{
+  FAR struct spi_dev_s *spi;
+  int ret;
+
+  /* Assumptions:
+   * 1) ENC28J60 pins were configured in up_spi.c early in the boot-up phase.
+   * 2) Clocking for the SPI1 peripheral was also provided earlier in boot-up.
+   */
+
+  spi = up_spiinitialize(ENC28J60_SPI_PORTNO);
+  if (!spi)
+    {
+      nlldbg("Failed to initialize SPI port %d\n", ENC28J60_SPI_PORTNO);
+      return;
+    }
+
+  /* Take ENC28J60 out of reset (active low)*/
+
+  stm32_gpiowrite(GPIO_ENC28J60_RESET, true);
+
+  /* Bind the SPI port to the ENC28J60 driver */
+
+  ret = enc_initialize(spi, &g_enclower.lower, ENC28J60_DEVNO);
+  if (ret < 0)
+    {
+      nlldbg("Failed to bind SPI port %d ENC28J60 device %d: %d\n",
+             ENC28J60_SPI_PORTNO, ENC28J60_DEVNO, ret);
+      return;
+    }
+
+  nllvdbg("Bound SPI port %d to ENC28J60 device %d\n",
+        ENC28J60_SPI_PORTNO, ENC28J60_DEVNO);
+}
+
+#endif /* CONFIG_ENC28J60 */
diff --git a/nuttx/configs/fire-stm32v2/src/up_mmcsd.c b/nuttx/configs/fire-stm32v2/src/up_mmcsd.c
new file mode 100644
index 000000000..c0c6693d3
--- /dev/null
+++ b/nuttx/configs/fire-stm32v2/src/up_mmcsd.c
@@ -0,0 +1,122 @@
+/****************************************************************************
+ * config/fire-stm32v2/src/up_mmcsd.c
+ * arch/arm/src/board/up_mmcsd.c
+ *
+ *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <gnutt@nuttx.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <stdio.h>
+#include <debug.h>
+#include <errno.h>
+
+#include <nuttx/sdio.h>
+#include <nuttx/mmcsd.h>
+
+#include "fire-internal.h"
+
+/****************************************************************************
+ * Pre-Processor Definitions
+ ****************************************************************************/
+/* Configuration ************************************************************/
+
+#define HAVE_MMCSD           1 /* Assume that we have SD support */
+#define STM32_MMCSDSLOTNO    0 /* There is only one slot */
+
+/* Can't support MMC/SD features if the SDIO peripheral is disabled */
+
+#ifndef CONFIG_STM32_SDIO
+#  undef HAVE_MMCSD
+#endif
+
+/* Can't support MMC/SD features if mountpoints are disabled */
+
+#ifdef CONFIG_DISABLE_MOUNTPOINT
+#  undef HAVE_MMCSD
+#endif
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32_sdinitialize
+ *
+ * Description:
+ *   Initialize the SPI-based SD card.  Requires CONFIG_DISABLE_MOUNTPOINT=n
+ *   and CONFIG_STM32_SDIO=y
+ *
+ ****************************************************************************/
+
+int stm32_sdinitialize(int minor)
+{
+#ifdef HAVE_MMCSD
+  FAR struct sdio_dev_s *sdio;
+  int ret;
+
+  /* First, get an instance of the SDIO interface */
+
+  sdio = sdio_initialize(STM32_MMCSDSLOTNO);
+  if (!sdio)
+    {
+      fdbg("Failed to initialize SDIO slot %d\n", STM32_MMCSDSLOTNO);
+      return -ENODEV;
+    }
+
+  fvdbg("Initialized SDIO slot %d\n", STM32_MMCSDSLOTNO);
+
+  /* Now bind the SDIO interface to the MMC/SD driver */
+
+  ret = mmcsd_slotinitialize(minor, sdio);
+  if (ret != OK)
+    {
+      fdbg("Failed to bind SDIO slot %d to the MMC/SD driver, minor=%d\n",
+              STM32_MMCSDSLOTNO, minor);
+    }
+
+  fvdbg("Bound SDIO slot %d to the MMC/SD driver, minor=%d\n",
+         STM32_MMCSDSLOTNO, minor);
+  
+  /* Then let's guess and say that there is a card in the slot.  I need to check to
+   * see if the M3 Wildfire board supports a GPIO to detect if there is a card in
+   * the slot.
+   */
+
+  sdio_mediachange(sdio, true);
+#endif
+  return OK;
+}
diff --git a/nuttx/configs/fire-stm32v2/src/up_nsh.c b/nuttx/configs/fire-stm32v2/src/up_nsh.c
new file mode 100644
index 000000000..f728a227a
--- /dev/null
+++ b/nuttx/configs/fire-stm32v2/src/up_nsh.c
@@ -0,0 +1,151 @@
+/****************************************************************************
+ * config/fire-stm32v2/src/up_nsh.c
+ * arch/arm/src/board/up_nsh.c
+ *
+ *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <gnutt@nuttx.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <stdbool.h>
+#include <stdio.h>
+#include <debug.h>
+#include <errno.h>
+
+#include "stm32_internal.h"
+#include "fire-internal.h"
+
+/****************************************************************************
+ * Pre-Processor Definitions
+ ****************************************************************************/
+/* Configuration ************************************************************/
+
+/* Assume that we support everything until convinced otherwise */
+
+#define HAVE_MMCSD    1
+#define HAVE_USBDEV   1
+
+/* Configuration ************************************************************/
+/* SPI1 connects to the SD CARD (and to the SPI FLASH) */
+
+#define STM32_MMCSDSPIPORTNO   1  /* SPI1 */
+#define STM32_MMCSDSLOTNO      0  /* Only one slot */
+
+/* Can't support MMC/SD features if the SDIO peripheral is disabled */
+
+#ifndef CONFIG_STM32_SDIO
+#  undef HAVE_MMCSD
+#endif
+
+/* Can't support MMC/SD features if mountpoints are disabled */
+
+#ifdef CONFIG_DISABLE_MOUNTPOINT
+#  undef HAVE_MMCSD
+#endif
+
+/* Default MMC/SD minor number */
+
+#ifdef HAVE_MMCSD
+#  ifndef CONFIG_NSH_MMCSDMINOR
+#    define CONFIG_NSH_MMCSDMINOR 0
+#  endif
+
+/* Default MMC/SD SLOT number */
+
+#  if defined(CONFIG_NSH_MMCSDSLOTNO) && CONFIG_NSH_MMCSDSLOTNO != STM32_MMCSDSLOTNO
+#    error "Only one MMC/SD slot:  Slot 0"
+#    undef  CONFIG_NSH_MMCSDSLOTNO
+#    define CONFIG_NSH_MMCSDSLOTNO STM32_MMCSDSLOTNO
+#  endif
+
+#  ifndef CONFIG_NSH_MMCSDSLOTNO
+#    define CONFIG_NSH_MMCSDSLOTNO STM32_MMCSDSLOTNO
+#  endif
+#endif
+
+/* Can't support USB host or device features if the USB peripheral or the USB
+ * device infrastructure is not enabled
+ */
+
+#if !defined(CONFIG_STM32_USB) || !defined(CONFIG_USBDEV)
+#  undef HAVE_USBDEV
+#endif
+
+/* Debug ********************************************************************/
+
+#ifdef CONFIG_CPP_HAVE_VARARGS
+#  ifdef CONFIG_DEBUG
+#    define message(...) lib_lowprintf(__VA_ARGS__)
+#  else
+#    define message(...) printf(__VA_ARGS__)
+#  endif
+#else
+#  ifdef CONFIG_DEBUG
+#    define message lib_lowprintf
+#  else
+#    define message printf
+#  endif
+#endif
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: nsh_archinitialize
+ *
+ * Description:
+ *   Perform architecture specific initialization
+ *
+ ****************************************************************************/
+
+int nsh_archinitialize(void)
+{
+#ifdef HAVE_MMCSD
+  int ret;
+
+  /* Initialize the SDIO-based MMC/SD slot */
+
+  ret = stm32_sdinitialize(CONFIG_NSH_MMCSDMINOR);
+  if (ret < 0)
+    {
+      message("nsh_archinitialize: Failed to initialize MMC/SD slot %d: %d\n",
+              CONFIG_NSH_MMCSDSLOTNO, ret);
+      return ret;
+    }
+#endif
+  return OK;
+}
diff --git a/nuttx/configs/fire-stm32v2/src/up_selectlcd.c b/nuttx/configs/fire-stm32v2/src/up_selectlcd.c
new file mode 100644
index 000000000..99d18cd27
--- /dev/null
+++ b/nuttx/configs/fire-stm32v2/src/up_selectlcd.c
@@ -0,0 +1,210 @@
+/************************************************************************************
+ * configs/fire-stm32v2/src/up_selectlcd.c
+ * arch/arm/src/board/up_selectlcd.c
+ *
+ *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <gnutt@nuttx.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <stdint.h>
+#include <assert.h>
+#include <debug.h>
+
+#include <arch/board/board.h>
+
+#include "chip.h"
+#include "up_arch.h"
+
+#include "stm32_fsmc.h"
+#include "stm32_gpio.h"
+#include "stm32_internal.h"
+#include "fire-internal.h"
+
+#ifdef CONFIG_STM32_FSMC
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+#ifndef CONFIG_STM32_FSMC
+#  warning "FSMC is not enabled"
+#endif
+
+#if STM32_NGPIO_PORTS < 6
+#  error "Required GPIO ports not enabled"
+#endif
+
+/************************************************************************************
+ * Public Data
+ ************************************************************************************/
+
+/* 2.4" TFT + Touchscreen.  FSMC Bank1
+ *
+ * --- ------ -------------- -------------------------------------------------------------------
+ * PIN NAME   SIGNAL         NOTES
+ * --- ------ -------------- -------------------------------------------------------------------
+ *
+ * 30  PA5    PA5-SPI1-SCK   2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH
+ * 31  PA6    PA6-SPI1-MISO  2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH
+ * 32  PA7    PA7-SPI1-MOSI  2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH
+ * 92  PB6    PB6-I2C1-SCL   2.4" TFT + Touchscreen, AT24C02
+ * 93  PB7    PB7-I2C1-SDA   2.4" TFT + Touchscreen, AT24C02
+ * 81  PD0    PD0-FSMC_D2    2.4" TFT + Touchscreen
+ * 82  PD1    PD1-FSMC_D3    2.4" TFT + Touchscreen
+ * 85  PD4    PD4-FSMC_NOE   2.4" TFT + Touchscreen
+ * 86  PD5    PD5-FSMC_NWE   2.4" TFT + Touchscreen
+ * 88  PD7    PD7-FSMC_NE1   2.4" TFT + Touchscreen
+ * 55  PD8    PD8-FSMC_D13   2.4" TFT + Touchscreen
+ * 56  PD9    PD9-FSMC_D14   2.4" TFT + Touchscreen
+ * 57  PD10   PD10-FSMC_D15  2.4" TFT + Touchscreen
+ * 58  PD11   PD11-FSMC_A16  2.4" TFT + Touchscreen
+ * 60  PD13   PD13-LCD/LIGHT 2.4" TFT + Touchscreen
+ * 61  PD14   PD14-FSMC_D0   2.4" TFT + Touchscreen
+ * 62  PD15   PD15-FSMC_D1   2.4" TFT + Touchscreen
+ * 98  PE1    PE1-FSMC_NBL1  2.4" TFT + Touchscreen
+ * 38  PE7    PE7-FSMC_D4    2.4" TFT + Touchscreen
+ * 39  PE8    PE8-FSMC_D5    2.4" TFT + Touchscreen
+ * 40  PE9    PE9-FSMC_D6    2.4" TFT + Touchscreen
+ * 41  PE10   PE10-FSMC_D7   2.4" TFT + Touchscreen
+ * 42  PE11   PE11-FSMC_D8   2.4" TFT + Touchscreen
+ * 43  PE12   PE12-FSMC_D9   2.4" TFT + Touchscreen
+ * 44  PE13   PE13-FSMC_D10  2.4" TFT + Touchscreen
+ * 45  PE14   PE14-FSMC_D11  2.4" TFT + Touchscreen
+ * 46  PE15   PE15-FSMC_D12  2.4" TFT + Touchscreen
+ *
+ * NOTE:  SPI and I2C pin configuration is controlled in the SPI and I2C drivers, respectively.
+ */
+
+static const uint16_t g_lcdconfig[NCOMMON_CONFIG] =
+{
+  /* Address Lines:  A16 only */
+
+  GPIO_NPS_A16,
+
+  /* Data Lines: D0... D15 */
+
+  GPIO_NPS_D0,  GPIO_NPS_D1,  GPIO_NPS_D2,  GPIO_NPS_D3,
+  GPIO_NPS_D4,  GPIO_NPS_D5,  GPIO_NPS_D6,  GPIO_NPS_D7,
+  GPIO_NPS_D8,  GPIO_NPS_D9,  GPIO_NPS_D10, GPIO_NPS_D11,
+  GPIO_NPS_D12, GPIO_NPS_D13, GPIO_NPS_D14, GPIO_NPS_D15,
+
+  /* NOE, NWE, NE1, NBL1 */
+
+  GPIO_NPS_NOE, GPIO_NPS_NWE, GPIO_NPS_NE1, GPIO_NPS_NBL1,
+
+  /* Backlight GPIO */
+
+  GPIO_LCD_BACKLIGHT
+};
+#define NLCD_CONFIG (sizeof(g_lcdconfig) / sizeof(uint16_t))
+
+/************************************************************************************
+ * Private Data
+ ************************************************************************************/
+
+/************************************************************************************
+ * Private Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: stm32_enablefsmc
+ *
+ * Description:
+ *  Enable clocking to the FSMC module
+ *
+ ************************************************************************************/
+
+static inline void stm32_enablefsmc(void)
+{
+  uint32_t regval;
+
+  /* Enable AHB clocking to the FSMC */
+
+  regval  = getreg32( STM32_RCC_AHBENR);
+  regval |= RCC_AHBENR_FSMCEN;
+  putreg32(regval, STM32_RCC_AHBENR);
+}
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: stm32_selectlcd
+ *
+ * Description:
+ *   Initialize to the LCD pin configuration.
+ *
+ ************************************************************************************/
+
+void stm32_selectlcd(void)
+{
+  irqstate_t flags;
+  int i;
+
+  /* Configure LCD GPIO pis */
+
+  flags = irqsave();
+  for (i = 0; i < NLCD_GPIOS; i++)
+    {
+      stm32_configgpio(g_lcdconfig[i]);
+    }
+
+  /* Enable AHB clocking to the FSMC */
+
+  stm32_enablefsmc();
+
+  /* Bank1 NOR/SRAM control register configuration */
+
+  putreg32(FSMC_BCR_SRAM | FSMC_BCR_MWID16 | FSMC_BCR_WREN, STM32_FSMC_BCR1);
+
+  /* Bank1 NOR/SRAM timing register configuration */
+
+  putreg32(FSMC_BTR_ADDSET(1)|FSMC_BTR_ADDHLD(0)|FSMC_BTR_DATAST(2)|FSMC_BTR_BUSTRUN(0)|
+           FSMC_BTR_CLKDIV(0)|FSMC_BTR_DATLAT(0)|FSMC_BTR_ACCMODA, STM32_FSMC_BTR1);
+
+  putreg32(0xffffffff, STM32_FSMC_BWTR4);
+
+  /* Enable the bank by setting the MBKEN bit */
+
+  putreg32(FSMC_BCR_MBKEN | FSMC_BCR_SRAM | FSMC_BCR_MWID16 | FSMC_BCR_WREN, STM32_FSMC_BCR1);
+  irqrestore(flags);
+}
+
+#endif /* CONFIG_STM32_FSMC */
+
+
diff --git a/nuttx/configs/fire-stm32v2/src/up_spi.c b/nuttx/configs/fire-stm32v2/src/up_spi.c
new file mode 100644
index 000000000..b2ef301b6
--- /dev/null
+++ b/nuttx/configs/fire-stm32v2/src/up_spi.c
@@ -0,0 +1,216 @@
+/************************************************************************************
+ * configs/fire-stm32v2/src/up_spi.c
+ * arch/arm/src/board/up_spi.c
+ *
+ *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <gnutt@nuttx.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <stdint.h>
+#include <stdbool.h>
+#include <debug.h>
+
+#include <nuttx/spi.h>
+#include <arch/board/board.h>
+
+#include "up_arch.h"
+#include "chip.h"
+#include "stm32_internal.h"
+#include "fire-internal.h"
+
+#if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2)
+
+/************************************************************************************
+ * Definitions
+ ************************************************************************************/
+
+/* Enables debug output from this file (needs CONFIG_DEBUG too) */
+
+#undef SPI_DEBUG   /* Define to enable debug */
+#undef SPI_VERBOSE /* Define to enable verbose debug */
+
+#ifdef SPI_DEBUG
+#  define spidbg  lldbg
+#  ifdef SPI_VERBOSE
+#    define spivdbg lldbg
+#  else
+#    define spivdbg(x...)
+#  endif
+#else
+#  undef SPI_VERBOSE
+#  define spidbg(x...)
+#  define spivdbg(x...)
+#endif
+
+/************************************************************************************
+ * Private Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: stm32_spiinitialize
+ *
+ * Description:
+ *   Called to configure SPI chip select GPIO pins for the M3 Wildfire board.
+ *
+ ************************************************************************************/
+
+void weak_function stm32_spiinitialize(void)
+{
+  /* NOTE: Clocking for SPI1 and/or SPI2 was already provided in stm32_rcc.c.
+   *       Configurations of SPI pins is performed in stm32_spi.c.
+   *       Here, we only initialize chip select pins unique to the board
+   *       architecture.
+   */
+
+#ifdef CONFIG_STM32_SPI1
+  /* Configure the TFT/Touchscreen CS GPIO */
+
+#if 0 /* Need to study this */
+  stm32_configgpio(GPIO_LCD_CS);
+#endif
+
+  /* Configure the TFT/Touchscreen and ENC28J60 or SPI-based FLASH PIOs */
+
+  /* Configure ENC28J60 SPI1 CS (also RESET and interrupt pins) */
+
+#ifdef CONFIG_ENC28J60
+  stm32_configgpio(GPIO_ENC28J60_CS);
+  stm32_configgpio(GPIO_ENC28J60_RESET);
+  stm32_configgpio(GPIO_ENC28J60_INTR);
+#else
+
+  /* Configure FLASH SPI1 CS */
+
+  stm32_configgpio(GPIO_FLASH_CS);
+#endif
+
+#endif /* CONFIG_STM32_SPI1 */
+
+#ifdef CONFIG_STM32_SPI2
+  /* Configure the MP3 SPI2 CS GPIO */
+
+  stm32_configgpio(GPIO_MP3_CS);
+
+#endif /* CONFIG_STM32_SPI2 */
+}
+
+/****************************************************************************
+ * Name:  stm32_spi1/2/3select and stm32_spi1/2/3status
+ *
+ * Description:
+ *   The external functions, stm32_spi1/2/3select and stm32_spi1/2/3status must be
+ *   provided by board-specific logic.  They are implementations of the select
+ *   and status methods of the SPI interface defined by struct spi_ops_s (see
+ *   include/nuttx/spi.h). All other methods (including up_spiinitialize())
+ *   are provided by common STM32 logic.  To use this common SPI logic on your
+ *   board:
+ *
+ *   1. Provide logic in stm32_boardinitialize() to configure SPI chip select
+ *      pins.
+ *   2. Provide stm32_spi1/2/3select() and stm32_spi1/2/3status() functions in your
+ *      board-specific logic.  These functions will perform chip selection and
+ *      status operations using GPIOs in the way your board is configured.
+ *   3. Add a calls to up_spiinitialize() in your low level application
+ *      initialization logic
+ *   4. The handle returned by up_spiinitialize() may then be used to bind the
+ *      SPI driver to higher level logic (e.g., calling
+ *      mmcsd_spislotinitialize(), for example, will bind the SPI driver to
+ *      the SPI MMC/SD driver).
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_STM32_SPI1
+void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
+{
+  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+
+#if 0 /* Need to study this */
+  if (devid == SPIDEV_LCD)
+    {
+      /* Set the GPIO low to select and high to de-select */
+
+      stm32_gpiowrite(GPIO_LCD_CS, !selected);
+    }
+  else
+#endif
+#ifdef CONFIG_ENC28J60
+  if (devid == SPIDEV_ETHERNET)
+    {
+      /* Set the GPIO low to select and high to de-select */
+
+      stm32_gpiowrite(GPIO_ENC28J60_CS, !selected);
+    }
+#else
+  if (devid == SPIDEV_FLASH)
+    {
+      /* Set the GPIO low to select and high to de-select */
+
+      stm32_gpiowrite(GPIO_FLASH_CS, !selected);
+    }
+#endif
+}
+
+uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
+{
+  return SPI_STATUS_PRESENT;
+}
+#endif
+
+#ifdef CONFIG_STM32_SPI2
+void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
+{
+  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+
+  if (devid == SPIDEV_AUDIO)
+    {
+      /* Set the GPIO low to select and high to de-select */
+
+      stm32_gpiowrite(GPIO_MP3_CS, !selected);
+    }
+}
+
+uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
+{
+  return SPI_STATUS_PRESENT;
+}
+#endif
+
+#endif /* CONFIG_STM32_SPI1 || CONFIG_STM32_SPI2 */
diff --git a/nuttx/configs/fire-stm32v2/src/up_usbdev.c b/nuttx/configs/fire-stm32v2/src/up_usbdev.c
new file mode 100644
index 000000000..e335edd43
--- /dev/null
+++ b/nuttx/configs/fire-stm32v2/src/up_usbdev.c
@@ -0,0 +1,120 @@
+/************************************************************************************
+ * configs/fire-stm32v2/src/up_usbdev.c
+ * arch/arm/src/board/up_boot.c
+ *
+ *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <gnutt@nuttx.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <sys/types.h>
+#include <stdint.h>
+#include <stdbool.h>
+#include <debug.h>
+
+#include <nuttx/usb/usbdev.h>
+#include <nuttx/usb/usbdev_trace.h>
+
+#include "up_arch.h"
+#include "stm32_internal.h"
+#include "fire-internal.h"
+
+/************************************************************************************
+ * Definitions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Private Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: stm32_usbinitialize
+ *
+ * Description:
+ *   Called to setup USB-related GPIO pins for the M3 Wildfire board.
+ *
+ ************************************************************************************/
+
+void stm32_usbinitialize(void)
+{
+  /* USB Soft Connect Pullup */
+
+#if 0 /* REVISIT */
+  stm32_configgpio(GPIO_USB_PULLUP);
+#endif
+}
+
+/************************************************************************************
+ * Name:  stm32_usbpullup
+ *
+ * Description:
+ *   If USB is supported and the board supports a pullup via GPIO (for USB software
+ *   connect and disconnect), then the board software must provide stm32_pullup.
+ *   See include/nuttx/usb/usbdev.h for additional description of this method.
+ *   Alternatively, if no pull-up GPIO the following EXTERN can be redefined to be
+ *   NULL.
+ *
+ ************************************************************************************/
+
+int stm32_usbpullup(FAR struct usbdev_s *dev, bool enable)
+{
+  usbtrace(TRACE_DEVPULLUP, (uint16_t)enable);
+#if 0 /* REVISIT */
+  stm32_gpiowrite(GPIO_USB_PULLUP, !enable);
+#endif
+  return OK;
+}
+
+/************************************************************************************
+ * Name:  stm32_usbsuspend
+ *
+ * Description:
+ *   Board logic must provide the stm32_usbsuspend logic if the USBDEV driver is
+ *   used.  This function is called whenever the USB enters or leaves suspend mode.
+ *   This is an opportunity for the board logic to shutdown clocks, power, etc.
+ *   while the USB is suspended.
+ *
+ ************************************************************************************/
+
+void stm32_usbsuspend(FAR struct usbdev_s *dev, bool resume)
+{
+  ulldbg("resume: %d\n", resume);
+}
+
diff --git a/nuttx/configs/fire-stm32v2/src/up_usbmsc.c b/nuttx/configs/fire-stm32v2/src/up_usbmsc.c
new file mode 100644
index 000000000..8a8269539
--- /dev/null
+++ b/nuttx/configs/fire-stm32v2/src/up_usbmsc.c
@@ -0,0 +1,103 @@
+/****************************************************************************
+ * configs/fire-stm32v2/src/up_usbmsc.c
+ *
+ *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <gnutt@nuttx.org>
+ *
+ * Configure and register the STM32 SPI-based MMC/SD block driver.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <stdio.h>
+#include <debug.h>
+#include <errno.h>
+
+#include "stm32_internal.h"
+
+/****************************************************************************
+ * Pre-Processor Definitions
+ ****************************************************************************/
+/* Configuration ************************************************************/
+
+#ifndef CONFIG_EXAMPLES_USBMSC_DEVMINOR1
+#  define CONFIG_EXAMPLES_USBMSC_DEVMINOR1 0
+#endif
+
+/* Debug ********************************************************************/
+
+#ifdef CONFIG_CPP_HAVE_VARARGS
+#  ifdef CONFIG_DEBUG
+#    define message(...) lib_lowprintf(__VA_ARGS__)
+#    define msgflush()
+#  else
+#    define message(...) printf(__VA_ARGS__)
+#    define msgflush() fflush(stdout)
+#  endif
+#else
+#  ifdef CONFIG_DEBUG
+#    define message lib_lowprintf
+#    define msgflush()
+#  else
+#    define message printf
+#    define msgflush() fflush(stdout)
+#  endif
+#endif
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: usbmsc_archinitialize
+ *
+ * Description:
+ *   Perform architecture specific initialization
+ *
+ ****************************************************************************/
+
+int usbmsc_archinitialize(void)
+{
+  /* If examples/usbmsc is built as an NSH command, then SD slot should
+   * already have been initized in nsh_archinitialize() (see up_nsh.c).  In
+   * this case, there is nothing further to be done here.
+   */
+
+#ifndef CONFIG_EXAMPLES_USBMSC_BUILTIN
+  return stm32_sdinitialize(CONFIG_EXAMPLES_USBMSC_DEVMINOR1);
+#else
+  return OK;
+#endif
+}
diff --git a/nuttx/configs/fire-stm32v2/src/up_userleds.c b/nuttx/configs/fire-stm32v2/src/up_userleds.c
new file mode 100644
index 000000000..da43d03ad
--- /dev/null
+++ b/nuttx/configs/fire-stm32v2/src/up_userleds.c
@@ -0,0 +1,139 @@
+/****************************************************************************
+ * configs/fire-stm32v2/src/up_userleds.c
+ * arch/arm/src/board/up_userleds.c
+ *
+ *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <gnutt@nuttx.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <stdint.h>
+#include <stdbool.h>
+#include <debug.h>
+
+#include <arch/board/board.h>
+
+#include "chip.h"
+#include "up_arch.h"
+#include "up_internal.h"
+#include "stm32_internal.h"
+#include "fire-internal.h"
+
+#ifndef CONFIG_ARCH_LEDS
+
+/****************************************************************************
+ * Definitions
+ ****************************************************************************/
+
+/* Enables debug output from this file (needs CONFIG_DEBUG with
+ * CONFIG_DEBUG_VERBOSE too)
+ */
+
+#undef LED_DEBUG  /* Define to enable debug */
+
+#ifdef LED_DEBUG
+#  define leddbg  lldbg
+#  define ledvdbg llvdbg
+#else
+#  define leddbg(x...)
+#  define ledvdbg(x...)
+#endif
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+/* This array maps an LED number to GPIO pin configuration */
+
+static uint32_t g_ledcfg[BOARD_NLEDS] = 
+{
+  GPIO_LED1, GPIO_LED2, GPIO_LED3
+};
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32_ledinit
+ ****************************************************************************/
+
+void stm32_ledinit(void)
+{
+   /* Configure LED1-4 GPIOs for output */
+
+   stm32_configgpio(GPIO_LED1);
+   stm32_configgpio(GPIO_LED2);
+   stm32_configgpio(GPIO_LED3);
+}
+
+/****************************************************************************
+ * Name: stm32_setled
+ *
+ * Description:
+ *   Set one LED to the 'ledon' state.  The LEDs are pulled up and, hence,
+ *   active low.
+ *
+ ****************************************************************************/
+
+void stm32_setled(int led, bool ledon)
+{
+  if ((unsigned)led < BOARD_NLEDS)
+    {
+      stm32_gpiowrite(g_ledcfg[led], !ledon);
+    }
+}
+
+/****************************************************************************
+ * Name: stm32_setleds
+ *
+ * Description:
+ *   Set each LED to the bit encoded state.  The LEDs are pulled up and,
+ *   hence, active low.
+ *
+ ****************************************************************************/
+
+void stm32_setleds(uint8_t ledset)
+{
+  stm32_gpiowrite(BOARD_LED1, (ledset & BOARD_LED1_BIT) == 0);
+  stm32_gpiowrite(BOARD_LED2, (ledset & BOARD_LED2_BIT) == 0);
+  stm32_gpiowrite(BOARD_LED3, (ledset & BOARD_LED3_BIT) == 0);
+}
+
+#endif /* !CONFIG_ARCH_LEDS */
diff --git a/nuttx/configs/fire-stm32v2/src/up_watchdog.c b/nuttx/configs/fire-stm32v2/src/up_watchdog.c
new file mode 100644
index 000000000..5b11ebc17
--- /dev/null
+++ b/nuttx/configs/fire-stm32v2/src/up_watchdog.c
@@ -0,0 +1,136 @@
+/************************************************************************************
+ * configs/fire-stm32v2/src/up_watchdog.c
+ * arch/arm/src/board/up_watchdog.c
+ *
+ *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <gnutt@nuttx.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <errno.h>
+#include <debug.h>
+
+#include <nuttx/watchdog.h>
+#include <arch/board/board.h>
+
+#include "stm32_wdg.h"
+
+#ifdef CONFIG_WATCHDOG
+
+/************************************************************************************
+ * Definitions
+ ************************************************************************************/
+/* Configuration *******************************************************************/
+/* Wathdog hardware should be enabled */
+
+#if !defined(CONFIG_STM32_WWDG) && !defined(CONFIG_STM32_IWDG)
+#  warning "One of CONFIG_STM32_WWDG or CONFIG_STM32_IWDG must be defined"
+#endif
+
+/* Select the path to the registered watchdog timer device */
+
+#ifndef CONFIG_STM32_WDG_DEVPATH
+#  ifdef CONFIG_EXAMPLES_WATCHDOG_DEVPATH
+#    define CONFIG_STM32_WDG_DEVPATH CONFIG_EXAMPLES_WATCHDOG_DEVPATH
+#  else
+#    define CONFIG_STM32_WDG_DEVPATH "/dev/watchdog0"
+#  endif
+#endif
+
+/* Use the un-calibrated LSI frequency if we have nothing better */
+
+#if defined(CONFIG_STM32_IWDG) && !defined(CONFIG_STM32_LSIFREQ)
+#  define CONFIG_STM32_LSIFREQ STM32_LSI_FREQUENCY
+#endif
+
+/* Debug ***************************************************************************/
+/* Non-standard debug that may be enabled just for testing the watchdog timer */
+
+#ifndef CONFIG_DEBUG
+#  undef CONFIG_DEBUG_WATCHDOG
+#endif
+
+#ifdef CONFIG_DEBUG_WATCHDOG
+#  define wdgdbg                 dbg
+#  define wdglldbg               lldbg
+#  ifdef CONFIG_DEBUG_VERBOSE
+#    define wdgvdbg              vdbg
+#    define wdgllvdbg            llvdbg
+#  else
+#    define wdgvdbg(x...)
+#    define wdgllvdbg(x...)
+#  endif
+#else
+#  define wdgdbg(x...)
+#  define wdglldbg(x...)
+#  define wdgvdbg(x...)
+#  define wdgllvdbg(x...)
+#endif
+
+/************************************************************************************
+ * Private Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/****************************************************************************
+ * Name: up_wdginitialize()
+ *
+ * Description:
+ *   Perform architecuture-specific initialization of the Watchdog hardware.
+ *   This interface must be provided by all configurations using
+ *   apps/examples/watchdog
+ *
+ ****************************************************************************/
+
+int up_wdginitialize(void)
+{
+  /* Initialize tha register the watchdog timer device */
+
+#if defined(CONFIG_STM32_WWDG)
+  stm32_wwdginitialize(CONFIG_STM32_WDG_DEVPATH);
+  return OK;
+#elif defined(CONFIG_STM32_IWDG)
+  stm32_iwdginitialize(CONFIG_STM32_WDG_DEVPATH, CONFIG_STM32_LSIFREQ);
+  return OK;
+#else
+  return -ENODEV;
+#endif
+}
+
+#endif /* CONFIG_WATCHDOG */
author	patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3>	2012-09-17 18:18:44 +0000
committer	patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3>	2012-09-17 18:18:44 +0000
commit	57623d42ebb04f0a0b9e6eb7c0847a3ece2aa0ff (patch)
tree	25d07d14e920d31c0b1947c9ca586f2a01fc32d8 /nuttx/configs/fire-stm32v2
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