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authorLorenz Meier <lm@inf.ethz.ch>2013-01-19 14:52:33 +0100
committerLorenz Meier <lm@inf.ethz.ch>2013-01-19 14:52:33 +0100
commita10ff0fe1cd7525fdcf9fe9b11ff9e42ea0e2926 (patch)
tree54f3d72fd7e836dc21585569da2a4f6561e6b1d1 /nuttx
parentc15093bb5591b24c590fc6f8278f26d5807ac882 (diff)
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First round of testing successful - back to I2C code from Dec / Nov 2012
Diffstat (limited to 'nuttx')
-rwxr-xr-xnuttx/configs/px4fmu/nsh/defconfig32
1 files changed, 30 insertions, 2 deletions
diff --git a/nuttx/configs/px4fmu/nsh/defconfig b/nuttx/configs/px4fmu/nsh/defconfig
index 7bb4d1003..0b27b552e 100755
--- a/nuttx/configs/px4fmu/nsh/defconfig
+++ b/nuttx/configs/px4fmu/nsh/defconfig
@@ -348,6 +348,16 @@ CONFIG_CAN_LOOPBACK=n
CONFIG_CAN1_BAUD=700000
CONFIG_CAN2_BAUD=700000
+
+# XXX remove after integration testing
+# Allow 180 us per byte, a wide margin for the 400 KHz clock we're using
+# e.g. 9.6 ms for an EEPROM page write, 0.9 ms for a MAG update
+CONFIG_STM32_I2CTIMEOUS_PER_BYTE=200
+# Constant overhead for generating I2C start / stop conditions
+CONFIG_STM32_I2CTIMEOUS_START_STOP=700
+# XXX this is bad and we want it gone
+CONFIG_I2C_WRITEREAD=y
+
#
# I2C configuration
#
@@ -357,14 +367,32 @@ CONFIG_I2C_TRANSFER=y
CONFIG_I2C_TRACE=n
CONFIG_I2C_RESET=y
+
+
+# XXX re-enable after integration testing
+
+#
+# I2C configuration
+#
+#CONFIG_I2C=y
+#CONFIG_I2C_POLLED=y
+#CONFIG_I2C_TRANSFER=y
+#CONFIG_I2C_TRACE=n
+#CONFIG_I2C_RESET=y
+
# Dynamic timeout
#CONFIG_STM32_I2C_DYNTIMEO=y
#CONFIG_STM32_I2C_DYNTIMEO_STARTSTOP=500
#CONFIG_STM32_I2C_DYNTIMEO_USECPERBYTE=200
# Fixed per-transaction timeout
-CONFIG_STM32_I2CTIMEOSEC=0
-CONFIG_STM32_I2CTIMEOMS=10
+#CONFIG_STM32_I2CTIMEOSEC=0
+#CONFIG_STM32_I2CTIMEOMS=10
+
+
+
+
+
#
# General build options