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| author | px4dev <px4@purgatory.org> | 2013-08-04 19:43:05 -0700 |
|---|---|---|
| committer | px4dev <px4@purgatory.org> | 2013-08-04 19:43:05 -0700 |
| commit | 567f621754f1f68ed0aae560e9590805045fa3e0 (patch) | |
| tree | d011518345829f943412961c4415f71b8ba92359 /src/drivers/stm32 | |
| parent | c33048b52186b88ddab2a9c9fdad24c7b64e7e22 (diff) | |
| download | px4-firmware-567f621754f1f68ed0aae560e9590805045fa3e0.tar.gz px4-firmware-567f621754f1f68ed0aae560e9590805045fa3e0.tar.bz2 px4-firmware-567f621754f1f68ed0aae560e9590805045fa3e0.zip | |
Fix an issue with the pwm_servo driver when using one of the STM32 advanced timers.
Diffstat (limited to 'src/drivers/stm32')
| -rw-r--r-- | src/drivers/stm32/drv_pwm_servo.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/drivers/stm32/drv_pwm_servo.c b/src/drivers/stm32/drv_pwm_servo.c index 7b060412c..dbb45a138 100644 --- a/src/drivers/stm32/drv_pwm_servo.c +++ b/src/drivers/stm32/drv_pwm_servo.c @@ -88,6 +88,7 @@ #define rCCR4(_tmr) REG(_tmr, STM32_GTIM_CCR4_OFFSET) #define rDCR(_tmr) REG(_tmr, STM32_GTIM_DCR_OFFSET) #define rDMAR(_tmr) REG(_tmr, STM32_GTIM_DMAR_OFFSET) +#define rBDTR(_tmr) REG(_tmr, STM32_ATIM_BDTR_OFFSET) static void pwm_timer_init(unsigned timer); static void pwm_timer_set_rate(unsigned timer, unsigned rate); @@ -110,6 +111,11 @@ pwm_timer_init(unsigned timer) rCCER(timer) = 0; rDCR(timer) = 0; + if ((pwm_timers[timer].base == STM32_TIM1_BASE) || (pwm_timers[timer].base == STM32_TIM8_BASE)) { + /* master output enable = on */ + rBDTR(timer) = ATIM_BDTR_MOE; + } + /* configure the timer to free-run at 1MHz */ rPSC(timer) = (pwm_timers[timer].clock_freq / 1000000) - 1; |