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| author | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2012-03-29 23:14:29 +0000 |
|---|---|---|
| committer | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2012-03-29 23:14:29 +0000 |
| commit | 1288df87876d67ee2aabe887a8ac8e5c944cf84d (patch) | |
| tree | c4f3ba1ad8032118fb2fc0b6d46e78a3bbfb81c5 | |
| parent | 67ea31797d0a81295664484a61aebd54607f3c86 (diff) | |
| download | px4-nuttx-1288df87876d67ee2aabe887a8ac8e5c944cf84d.tar.gz px4-nuttx-1288df87876d67ee2aabe887a8ac8e5c944cf84d.tar.bz2 px4-nuttx-1288df87876d67ee2aabe887a8ac8e5c944cf84d.zip | |
Fix types in STM32 PWM driver comments
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4540 42af7a65-404d-4744-a932-0658087f49c3
| -rw-r--r-- | nuttx/arch/arm/src/stm32/stm32_pwm.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/nuttx/arch/arm/src/stm32/stm32_pwm.c b/nuttx/arch/arm/src/stm32/stm32_pwm.c index 3b0fc20a7..a3ef23e57 100644 --- a/nuttx/arch/arm/src/stm32/stm32_pwm.c +++ b/nuttx/arch/arm/src/stm32/stm32_pwm.c @@ -756,7 +756,7 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv, ccenable = ATIM_CCER_CC1E; - /* Set the CCRMR1 mode values (leave CCRMR2 zero) */ + /* Set the CCMR1 mode values (leave CCMR2 zero) */ ocmode1 = (ATIM_CCMR_CCS_CCOUT << ATIM_CCMR1_CC1S_SHIFT) | (ATIM_CCMR_MODE_PWM1 << ATIM_CCMR1_OC1M_SHIFT) | @@ -774,7 +774,7 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv, ccenable = ATIM_CCER_CC2E; - /* Set the CCRMR1 mode values (leave CCRMR2 zero) */ + /* Set the CCMR1 mode values (leave CCMR2 zero) */ ocmode1 = (ATIM_CCMR_CCS_CCOUT << ATIM_CCMR1_CC2S_SHIFT) | (ATIM_CCMR_MODE_PWM1 << ATIM_CCMR1_OC2M_SHIFT) | @@ -792,7 +792,7 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv, ccenable = ATIM_CCER_CC3E; - /* Set the CCRMR2 mode values (leave CCRMR1 zero) */ + /* Set the CCMR2 mode values (leave CCMR1 zero) */ ocmode2 = (ATIM_CCMR_CCS_CCOUT << ATIM_CCMR2_CC3S_SHIFT) | (ATIM_CCMR_MODE_PWM1 << ATIM_CCMR2_OC3M_SHIFT) | @@ -810,7 +810,7 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv, ccenable = ATIM_CCER_CC4E; - /* Set the CCRMR2 mode values (leave CCRMR1 zero) */ + /* Set the CCMR2 mode values (leave CCMR1 zero) */ ocmode2 = (ATIM_CCMR_CCS_CCOUT << ATIM_CCMR2_CC4S_SHIFT) | (ATIM_CCMR_MODE_PWM1 << ATIM_CCMR2_OC4M_SHIFT) | |