Add EFM32 interrupt vector defintions

8 files changed, 505 insertions, 3 deletions

diff --git a/nuttx/arch/arm/include/efm32/chip.h b/nuttx/arch/arm/include/efm32/chip.h
index 9b3fb6cee..9b3fb6cee 100755..100644
--- a/nuttx/arch/arm/include/efm32/chip.h
+++ b/nuttx/arch/arm/include/efm32/chip.h
diff --git a/nuttx/arch/arm/include/efm32/efm32g_irq.h b/nuttx/arch/arm/include/efm32/efm32g_irq.h
new file mode 100644
index 000000000..9d98485ab
--- /dev/null
+++ b/nuttx/arch/arm/include/efm32/efm32g_irq.h
@@ -0,0 +1,122 @@
+/*****************************************************************************
+ * arch/arm/include/efm32s/efm32g_irq.h
+ *
+ *   Copyright (C) 2014 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <gnutt@nuttx.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ *****************************************************************************/
+
+/* This file should never be included directed but, rather, only indirectly
+ * through nuttx/irq.h
+ */
+
+#ifndef __ARCH_ARM_INCLUDE_EFM32G_IRQ_H
+#define __ARCH_ARM_INCLUDE_EFM32G_IRQ_H
+
+/*****************************************************************************
+ * Included Files
+ *****************************************************************************/
+
+/*****************************************************************************
+ * Pre-processor Definitions
+ *****************************************************************************/
+
+/* IRQ numbers.  The IRQ number corresponds vector number and hence map
+ * directly to bits in the NVIC.  This does, however, waste several words of
+ * memory in the IRQ to handle mapping tables.
+ *
+ * Processor Exceptions (vectors 0-15).  These common definitions can be
+ * found in nuttx/arch/arm/include/efm32/irq.h
+ *
+ * External interrupts (vectors >= 16)
+ */
+                                                        /* IRQ# Source      */
+#define EFM32_IRQ_DMA        (EFM32_IRQ_INTERRUPTS+ 0)  /*  0   DMA         */
+#define EFM32_IRQ_GPIO_EVEN  (EFM32_IRQ_INTERRUPTS+ 1)  /*  1   GPIO_EVEN   */
+#define EFM32_IRQ_TIMER0     (EFM32_IRQ_INTERRUPTS+ 2)  /*  2   TIMER0      */
+#define EFM32_IRQ_USART0_RX  (EFM32_IRQ_INTERRUPTS+ 3)  /*  3   USART0_RX   */
+#define EFM32_IRQ_USART0_TX  (EFM32_IRQ_INTERRUPTS+ 4)  /*  4   USART0_TX   */
+#define EFM32_IRQ_ACMP       (EFM32_IRQ_INTERRUPTS+ 5)  /*  5   ACMP0/ACMP1 */
+#define EFM32_IRQ_ADC0       (EFM32_IRQ_INTERRUPTS+ 6)  /*  6   ADC0        */
+#define EFM32_IRQ_DAC0       (EFM32_IRQ_INTERRUPTS+ 7)  /*  7   DAC0        */
+#define EFM32_IRQ_I2C0       (EFM32_IRQ_INTERRUPTS+ 8)  /*  8   I2C0        */
+#define EFM32_IRQ_GPIO_ODD   (EFM32_IRQ_INTERRUPTS+ 9)  /*  9   GPIO_ODD    */
+#define EFM32_IRQ_TIMER1     (EFM32_IRQ_INTERRUPTS+10)  /* 10   TIMER1      */
+#define EFM32_IRQ_TIMER2     (EFM32_IRQ_INTERRUPTS+11)  /* 11   TIMER2      */
+#define EFM32_IRQ_USART1_RX  (EFM32_IRQ_INTERRUPTS+12)  /* 12   USART1_RX   */
+#define EFM32_IRQ_USART1_TX  (EFM32_IRQ_INTERRUPTS+13)  /* 13   USART1_TX   */
+#define EFM32_IRQ_USART2_RX  (EFM32_IRQ_INTERRUPTS+14)  /* 14   USART2_RX   */
+#define EFM32_IRQ_USART2_TX  (EFM32_IRQ_INTERRUPTS+15)  /* 15   USART2_TX   */
+#define EFM32_IRQ_UART0_RX   (EFM32_IRQ_INTERRUPTS+16)  /* 16   UART0_RX    */
+#define EFM32_IRQ_UART0_TX   (EFM32_IRQ_INTERRUPTS+17)  /* 17   UART0_TX    */
+#define EFM32_IRQ_LEUART0    (EFM32_IRQ_INTERRUPTS+18)  /* 18   LEUART0     */
+#define EFM32_IRQ_LEUART1    (EFM32_IRQ_INTERRUPTS+19)  /* 19   LEUART1     */
+#define EFM32_IRQ_LETIMER0   (EFM32_IRQ_INTERRUPTS+20)  /* 20   LETIMER0    */
+#define EFM32_IRQ_PCNT0      (EFM32_IRQ_INTERRUPTS+21)  /* 21   PCNT0       */
+#define EFM32_IRQ_PCNT1      (EFM32_IRQ_INTERRUPTS+22)  /* 22   PCNT1       */
+#define EFM32_IRQ_PCNT2      (EFM32_IRQ_INTERRUPTS+23)  /* 23   PCNT2       */
+#define EFM32_IRQ_RTC        (EFM32_IRQ_INTERRUPTS+24)  /* 24   RTC         */
+#define EFM32_IRQ_CMU        (EFM32_IRQ_INTERRUPTS+25)  /* 25   CMU         */
+#define EFM32_IRQ_VCMP       (EFM32_IRQ_INTERRUPTS+26)  /* 26   VCMP        */
+#define EFM32_IRQ_LCD        (EFM32_IRQ_INTERRUPTS+27)  /* 27   LCD         */
+#define EFM32_IRQ_MSC        (EFM32_IRQ_INTERRUPTS+28)  /* 28   MSC         */
+#define EFM32_IRQ_AES        (EFM32_IRQ_INTERRUPTS+29)  /* 29   AES         */
+
+#define NR_VECTORS           (EFM32_IRQ_INTERRUPTS+30)
+#define NR_IRQS              (EFM32_IRQ_INTERRUPTS+30)
+
+/*****************************************************************************
+ * Public Types
+ *****************************************************************************/
+
+/*****************************************************************************
+ * Public Data
+ *****************************************************************************/
+
+#ifndef __ASSEMBLY__
+#ifdef __cplusplus
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/*****************************************************************************
+ * Public Functions
+ *****************************************************************************/
+
+#undef EXTERN
+#ifdef __cplusplus
+}
+#endif
+#endif
+
+#endif /* __ARCH_ARM_INCLUDE_EFM32G_IRQ_H */
diff --git a/nuttx/arch/arm/include/efm32/efm32gg_irq.h b/nuttx/arch/arm/include/efm32/efm32gg_irq.h
new file mode 100644
index 000000000..d52aa425d
--- /dev/null
+++ b/nuttx/arch/arm/include/efm32/efm32gg_irq.h
@@ -0,0 +1,131 @@
+/*****************************************************************************
+ * arch/arm/include/efm32s/efm32gg_irq.h
+ *
+ *   Copyright (C) 2014 Pierre-noel Bouteville . All rights reserved.
+ *   Author: Pierre-noel Bouteville <pnb990@gmail.com>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ *****************************************************************************/
+
+/* This file should never be included directed but, rather, only indirectly
+ * through nuttx/irq.h
+ */
+
+#ifndef __ARCH_ARM_INCLUDE_EFM32GG_IRQ_H
+#define __ARCH_ARM_INCLUDE_EFM32GG_IRQ_H
+
+/*****************************************************************************
+ * Included Files
+ *****************************************************************************/
+
+/*****************************************************************************
+ * Pre-processor Definitions
+ *****************************************************************************/
+
+/* IRQ numbers.  The IRQ number corresponds vector number and hence map
+ * directly to bits in the NVIC.  This does, however, waste several words of
+ * memory in the IRQ to handle mapping tables.
+ *
+ * Processor Exceptions (vectors 0-15).  These common definitions can be
+ * found in nuttx/arch/arm/include/efm32/irq.h
+ *
+ * External interrupts (vectors >= 16)
+ */
+
+#define EFM32_IRQ_DMA           (EFM32_IRQ_INTERRUPTS+ 0)
+#define EFM32_IRQ_GPIO_EVEN     (EFM32_IRQ_INTERRUPTS+ 1)
+#define EFM32_IRQ_TIMER0        (EFM32_IRQ_INTERRUPTS+ 2)
+#define EFM32_IRQ_USART0_RX     (EFM32_IRQ_INTERRUPTS+ 3)
+#define EFM32_IRQ_USART0_TX     (EFM32_IRQ_INTERRUPTS+ 4)
+#define EFM32_IRQ_USB           (EFM32_IRQ_INTERRUPTS+ 5)
+#define EFM32_IRQ_ACMP          (EFM32_IRQ_INTERRUPTS+ 6)
+#define EFM32_IRQ_ADC0          (EFM32_IRQ_INTERRUPTS+ 7)
+#define EFM32_IRQ_DAC0          (EFM32_IRQ_INTERRUPTS+ 8)
+#define EFM32_IRQ_I2C0          (EFM32_IRQ_INTERRUPTS+ 9)
+#define EFM32_IRQ_I2C1          (EFM32_IRQ_INTERRUPTS+10)
+#define EFM32_IRQ_GPIO_ODD      (EFM32_IRQ_INTERRUPTS+11)
+#define EFM32_IRQ_TIMER1        (EFM32_IRQ_INTERRUPTS+12)
+#define EFM32_IRQ_TIMER2        (EFM32_IRQ_INTERRUPTS+13)
+#define EFM32_IRQ_TIMER3        (EFM32_IRQ_INTERRUPTS+14)
+#define EFM32_IRQ_USART1_RX     (EFM32_IRQ_INTERRUPTS+15)
+#define EFM32_IRQ_USART1_TX     (EFM32_IRQ_INTERRUPTS+16)
+#define EFM32_IRQ_LESENSE       (EFM32_IRQ_INTERRUPTS+17)
+#define EFM32_IRQ_USART2_RX     (EFM32_IRQ_INTERRUPTS+18)
+#define EFM32_IRQ_USART2_TX     (EFM32_IRQ_INTERRUPTS+19)
+#define EFM32_IRQ_UART0_RX      (EFM32_IRQ_INTERRUPTS+20)
+#define EFM32_IRQ_UART0_TX      (EFM32_IRQ_INTERRUPTS+21)
+#define EFM32_IRQ_UART1_RX      (EFM32_IRQ_INTERRUPTS+22)
+#define EFM32_IRQ_UART1_TX      (EFM32_IRQ_INTERRUPTS+23)
+#define EFM32_IRQ_LEUART0       (EFM32_IRQ_INTERRUPTS+24)
+#define EFM32_IRQ_LEUART1       (EFM32_IRQ_INTERRUPTS+25)
+#define EFM32_IRQ_LETIMER0      (EFM32_IRQ_INTERRUPTS+26)
+#define EFM32_IRQ_PCNT0         (EFM32_IRQ_INTERRUPTS+27)
+#define EFM32_IRQ_PCNT1         (EFM32_IRQ_INTERRUPTS+28)
+#define EFM32_IRQ_PCNT2         (EFM32_IRQ_INTERRUPTS+29)
+#define EFM32_IRQ_RTC           (EFM32_IRQ_INTERRUPTS+30)
+#define EFM32_IRQ_BURTC         (EFM32_IRQ_INTERRUPTS+31)
+#define EFM32_IRQ_CMU           (EFM32_IRQ_INTERRUPTS+32)
+#define EFM32_IRQ_VCMP          (EFM32_IRQ_INTERRUPTS+33)
+#define EFM32_IRQ_LCD           (EFM32_IRQ_INTERRUPTS+34)
+#define EFM32_IRQ_MSC           (EFM32_IRQ_INTERRUPTS+35)
+#define EFM32_IRQ_AES           (EFM32_IRQ_INTERRUPTS+36)
+#define EFM32_IRQ_EBI           (EFM32_IRQ_INTERRUPTS+37)
+#define EFM32_IRQ_EMI           (EFM32_IRQ_INTERRUPTS+38)
+
+#define NR_VECTORS              (EFM32_IRQ_INTERRUPTS+39)
+#define NR_IRQS                 (EFM32_IRQ_INTERRUPTS+39)
+
+/*****************************************************************************
+ * Public Types
+ *****************************************************************************/
+
+/*****************************************************************************
+ * Public Data
+ *****************************************************************************/
+
+#ifndef __ASSEMBLY__
+#ifdef __cplusplus
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/*****************************************************************************
+ * Public Functions
+ *****************************************************************************/
+
+#undef EXTERN
+#ifdef __cplusplus
+}
+#endif
+#endif
+
+#endif /* __ARCH_ARM_INCLUDE_EFM32GG_IRQ_H */
diff --git a/nuttx/arch/arm/include/efm32/efm32tg_irq.h b/nuttx/arch/arm/include/efm32/efm32tg_irq.h
new file mode 100644
index 000000000..5b21d404e
--- /dev/null
+++ b/nuttx/arch/arm/include/efm32/efm32tg_irq.h
@@ -0,0 +1,115 @@
+/*****************************************************************************
+ * arch/arm/include/efm32s/efm32tg_irq.h
+ *
+ *   Copyright (C) 2014 Pierre-noel Bouteville . All rights reserved.
+ *   Author: Pierre-noel Bouteville <pnb990@gmail.com>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ *****************************************************************************/
+
+/* This file should never be included directed but, rather, only indirectly
+ * through nuttx/irq.h
+ */
+
+#ifndef __ARCH_ARM_INCLUDE_EFM32TG_IRQ_H
+#define __ARCH_ARM_INCLUDE_EFM32TG_IRQ_H
+
+/*****************************************************************************
+ * Included Files
+ *****************************************************************************/
+
+/*****************************************************************************
+ * Pre-processor Definitions
+ *****************************************************************************/
+
+/* IRQ numbers.  The IRQ number corresponds vector number and hence map
+ * directly to bits in the NVIC.  This does, however, waste several words of
+ * memory in the IRQ to handle mapping tables.
+ *
+ * Processor Exceptions (vectors 0-15).  These common definitions can be
+ * found in nuttx/arch/arm/include/efm32/irq.h
+ *
+ * External interrupts (vectors >= 16)
+ */
+
+#define EFM32_IRQ_DMA         (EFM32_IRQ_INTERRUPTS+ 0)
+#define EFM32_IRQ_GPIO_EVEN   (EFM32_IRQ_INTERRUPTS+ 1)
+#define EFM32_IRQ_TIMER0      (EFM32_IRQ_INTERRUPTS+ 2)
+#define EFM32_IRQ_USART0_RX   (EFM32_IRQ_INTERRUPTS+ 3)
+#define EFM32_IRQ_USART0_TX   (EFM32_IRQ_INTERRUPTS+ 4)
+#define EFM32_IRQ_ACMP        (EFM32_IRQ_INTERRUPTS+ 5)
+#define EFM32_IRQ_ADC0        (EFM32_IRQ_INTERRUPTS+ 6)
+#define EFM32_IRQ_DAC0        (EFM32_IRQ_INTERRUPTS+ 7)
+#define EFM32_IRQ_I2C0        (EFM32_IRQ_INTERRUPTS+ 8)
+#define EFM32_IRQ_GPIO_ODD    (EFM32_IRQ_INTERRUPTS+ 9)
+#define EFM32_IRQ_TIMER1      (EFM32_IRQ_INTERRUPTS+10)
+#define EFM32_IRQ_USART1_RX   (EFM32_IRQ_INTERRUPTS+11)
+#define EFM32_IRQ_USART1_TX   (EFM32_IRQ_INTERRUPTS+12)
+#define EFM32_IRQ_LESENSE     (EFM32_IRQ_INTERRUPTS+13)
+#define EFM32_IRQ_LEUART0     (EFM32_IRQ_INTERRUPTS+14)
+#define EFM32_IRQ_LETIMER0    (EFM32_IRQ_INTERRUPTS+15)
+#define EFM32_IRQ_PCNT0       (EFM32_IRQ_INTERRUPTS+16)
+#define EFM32_IRQ_RTC         (EFM32_IRQ_INTERRUPTS+17)
+#define EFM32_IRQ_CMU         (EFM32_IRQ_INTERRUPTS+18)
+#define EFM32_IRQ_VCMP        (EFM32_IRQ_INTERRUPTS+19)
+#define EFM32_IRQ_LCD         (EFM32_IRQ_INTERRUPTS+20)
+#define EFM32_IRQ_MSC         (EFM32_IRQ_INTERRUPTS+21)
+#define EFM32_IRQ_AES         (EFM32_IRQ_INTERRUPTS+22)
+
+#define NR_VECTORS            (EFM32_IRQ_INTERRUPTS+23)
+#define NR_IRQS               (EFM32_IRQ_INTERRUPTS+23)
+
+/*****************************************************************************
+ * Public Types
+ *****************************************************************************/
+
+/*****************************************************************************
+ * Public Data
+ *****************************************************************************/
+
+#ifndef __ASSEMBLY__
+#ifdef __cplusplus
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/*****************************************************************************
+ * Public Functions
+ *****************************************************************************/
+
+#undef EXTERN
+#ifdef __cplusplus
+}
+#endif
+#endif
+
+#endif /* __ARCH_ARM_INCLUDE_EFM32TG_IRQ_H */
diff --git a/nuttx/arch/arm/include/efm32/irq.h b/nuttx/arch/arm/include/efm32/irq.h
new file mode 100644
index 000000000..fb348b1c5
--- /dev/null
+++ b/nuttx/arch/arm/include/efm32/irq.h
@@ -0,0 +1,118 @@
+/************************************************************************************
+ * arch/arm/include/efm32s/irq.h
+ *
+ *   Copyright (C) 2014 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <gnutt@nuttx.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/* This file should never be included directed but, rather, only indirectly through
+ * nuttx/irq.h
+ */
+
+#ifndef __ARCH_ARM_INCLUDE_EFM32_IRQ_H
+#define __ARCH_ARM_INCLUDE_EFM32_IRQ_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <nuttx/irq.h>
+#include <arch/efm32/chip.h>
+
+/************************************************************************************
+ * Definitions
+ ************************************************************************************/
+
+/* IRQ numbers.  The IRQ number corresponds vector number and hence map directly to
+ * bits in the NVIC.  This does, however, waste several words of memory in the IRQ
+ * to handle mapping tables.
+ */
+
+/* Processor Exceptions (vectors 0-15) */
+
+#define EFM32_IRQ_RESERVED       (0) /* Reserved vector (only used with CONFIG_DEBUG) */
+                                     /* Vector  0: Reset stack pointer value */
+                                     /* Vector  1: Reset (not handler as an IRQ) */
+#define EFM32_IRQ_NMI            (2) /* Vector  2: Non-Maskable Interrupt (NMI) */
+#define EFM32_IRQ_HARDFAULT      (3) /* Vector  3: Hard fault */
+#define EFM32_IRQ_MEMFAULT       (4) /* Vector  4: Memory management (MPU) */
+#define EFM32_IRQ_BUSFAULT       (5) /* Vector  5: Bus fault */
+#define EFM32_IRQ_USAGEFAULT     (6) /* Vector  6: Usage fault */
+#define EFM32_IRQ_SVCALL        (11) /* Vector 11: SVC call */
+#define EFM32_IRQ_DBGMONITOR    (12) /* Vector 12: Debug Monitor */
+                                     /* Vector 13: Reserved */
+#define EFM32_IRQ_PENDSV        (14) /* Vector 14: Pendable system service request */
+#define EFM32_IRQ_SYSTICK       (15) /* Vector 15: System tick */
+
+/* External interrupts (vectors >= 16).  These definitions are chip-specific */
+
+#define EFM32_IRQ_INTERRUPTS    (16) /* Vector number of the first external interrupt */
+
+#if defined(CONFIG_EFM32_EFM32TG)
+#  include <arch/efm32/efm32tg_irq.h>
+#elif defined(CONFIG_EFM32_EFM32G)
+#  include <arch/efm32/efm32g_irq.h>
+#elif defined(CONFIG_EFM32_EFM32GG)
+#  include <arch/efm32/efm32gg_irq.h>
+#else
+#  error "Unsupported EFM32 chip"
+#endif
+
+/************************************************************************************
+ * Public Types
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Data
+ ************************************************************************************/
+
+#ifndef __ASSEMBLY__
+#ifdef __cplusplus
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+#undef EXTERN
+#ifdef __cplusplus
+}
+#endif
+#endif
+
+#endif /* __ARCH_ARM_INCLUDE_EFM32_IRQ_H */
diff --git a/nuttx/configs/efm32-g8xx-stk/README.txt b/nuttx/configs/efm32-g8xx-stk/README.txt
new file mode 100644
index 000000000..46fa9400d
--- /dev/null
+++ b/nuttx/configs/efm32-g8xx-stk/README.txt
@@ -0,0 +1,16 @@
+README
+======
+
+  This README file discusses the port of NuttX to the Silicon Labs EFM32™ Gecko Starter Kit (EFM32-G8XX-STK). The Gecko Starter Kit features:
+
+    • EFM32G890F128 MCU with 128 kB flash and 16 kB RAM
+    •   32.768 kHz crystal
+    •   32 MHz crystal
+    • Advanced Energy Monitoring
+    • Touch slider
+    • 4x40 LCD
+    • 4 User LEDs
+    • 2 pushbutton switches
+    • Reset button and a switch to disconnect the battery.
+    • On-board SEGGER J-Link USB emulator
+    •   ARM 20 pin JTAG/SWD standard Debug in/out connector
diff --git a/nuttx/configs/efm32-g8xx-stk/nsh/Make.defs b/nuttx/configs/efm32-g8xx-stk/nsh/Make.defs
index 47fdb324d..4b7e46154 100644
--- a/nuttx/configs/efm32-g8xx-stk/nsh/Make.defs
+++ b/nuttx/configs/efm32-g8xx-stk/nsh/Make.defs
@@ -46,13 +46,13 @@ ifeq ($(WINTOOL),y)
   MKDEP = $(TOPDIR)/tools/mknulldeps.sh
   ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}"
   ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}"
-  ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$LDSCRIPT}"
+  ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}"
 else
   # Linux/Cygwin-native toolchain 
   MKDEP = $(TOPDIR)/tools/mkdeps.sh
   ARCHINCLUDES = -I. -isystem $(TOPDIR)/include
   ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx
-  ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$LDSCRIPT
+  ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)
 endif
 
 CC = $(CROSSDEV)gcc
diff --git a/nuttx/configs/efm32-g8xx-stk/src/efm32_boot.c b/nuttx/configs/efm32-g8xx-stk/src/efm32_boot.c
index 4529b3261..ebe9ad0df 100644
--- a/nuttx/configs/efm32-g8xx-stk/src/efm32_boot.c
+++ b/nuttx/configs/efm32-g8xx-stk/src/efm32_boot.c
@@ -39,7 +39,7 @@
 
 #include <nuttx/config.h>
 
-#include "efm3_g8xx_stk.h"
+#include "efm32-g8xx-stk.h"
 
 /****************************************************************************
  * Public Functions