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author | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2010-12-30 01:15:40 +0000 |
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committer | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2010-12-30 01:15:40 +0000 |
commit | 82b05c9e4614659354b499d4bc33001bed4be45d (patch) | |
tree | 56a286f237c0edc795198a4a57c792614fc5150a | |
parent | 8db80799779006fd09162b986854db5068e528f5 (diff) | |
download | px4-nuttx-82b05c9e4614659354b499d4bc33001bed4be45d.tar.gz px4-nuttx-82b05c9e4614659354b499d4bc33001bed4be45d.tar.bz2 px4-nuttx-82b05c9e4614659354b499d4bc33001bed4be45d.zip |
cosmetic
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3221 42af7a65-404d-4744-a932-0658087f49c3
-rwxr-xr-x | nuttx/arch/arm/src/lpc17xx/lpc17_usbhost.c | 3 | ||||
-rwxr-xr-x | nuttx/include/nuttx/usb/ohci.h | 4 |
2 files changed, 4 insertions, 3 deletions
diff --git a/nuttx/arch/arm/src/lpc17xx/lpc17_usbhost.c b/nuttx/arch/arm/src/lpc17xx/lpc17_usbhost.c index e7e71d3ab..291d53ab7 100755 --- a/nuttx/arch/arm/src/lpc17xx/lpc17_usbhost.c +++ b/nuttx/arch/arm/src/lpc17xx/lpc17_usbhost.c @@ -1409,6 +1409,7 @@ FAR struct usbhost_driver_s *usbhost_initialize(int controller) * 10: reserved * 11: U1=host, U2=device * + * We need only select U1=host (Bit 0=1); * NOTE: The PORTSEL clock needs to be enabled when accessing OTGSTCTRL */ @@ -1418,7 +1419,7 @@ FAR struct usbhost_driver_s *usbhost_initialize(int controller) lpc17_putreg((LPC17_CLKCTRL_ENABLES & ~USBDEV_CLK_PORTSELCLK), LPC17_USBOTG_CLKCTRL); - /* Step 3: Configure I/O pins */ + /* Configure I/O pins */ usbhost_dumpgpio(); lpc17_configgpio(GPIO_USB_DP); /* Positive differential data */ diff --git a/nuttx/include/nuttx/usb/ohci.h b/nuttx/include/nuttx/usb/ohci.h index d8d1d5cdf..cb96bc2c3 100755 --- a/nuttx/include/nuttx/usb/ohci.h +++ b/nuttx/include/nuttx/usb/ohci.h @@ -139,8 +139,8 @@ /* Bits 17-31: Reserved */ /* HcInterruptStatus: HC interrupt status (7.1.4), - * HcInterruptEnable: HC interrupt enable (7.1.5), and - * HcInterruptDisable: HC interrupt disable (7.1.6) + * HcInterruptEnable: HC interrupt enable (7.1.5), and + * HcInterruptDisable: HC interrupt disable (7.1.6) */ #define OHCI_INT_SO (1 << 0) /* Bit 0: Scheduling overrun */ |