Fixe LM3S GPIO output settings; fix Eagle-100 LEDs

git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1823 42af7a65-404d-4744-a932-0658087f49c3

11 files changed, 212 insertions, 17 deletions

diff --git a/nuttx/ChangeLog b/nuttx/ChangeLog
index 0c3fbe37b..6fddaa371 100644
--- a/nuttx/ChangeLog
+++ b/nuttx/ChangeLog
@@ -732,4 +732,6 @@
 	  Micromint Eagle100 board.
 	* arch/arm/src/lm3s: Added an SSI driver for the LM3S6918
 	* examples/nsh: Added MMC/SD support for the LM3S6918
+	* arch/arm/src/lm3s: Fix logic for setting and clearing output GPIOs (critical
+	  fix!).
 
diff --git a/nuttx/Documentation/NuttX.html b/nuttx/Documentation/NuttX.html
index 432ba4e7a..828a759b2 100644
--- a/nuttx/Documentation/NuttX.html
+++ b/nuttx/Documentation/NuttX.html
@@ -1422,6 +1422,8 @@ nuttx-0.4.7 2009-xx-xx Gregory Nutt <spudmonkey@racsa.co.cr>
 	  Micromint Eagle100 board.
 	* arch/arm/src/lm3s: Added an SSI driver for the LM3S6918
 	* examples/nsh: Added MMC/SD support for the LM3S6918
+	* arch/arm/src/lm3s: Fix logic for setting and clearing output GPIOs (critical
+	  fix!).
 
 pascal-0.1.3 2009-xx-xx Gregory Nutt <spudmonkey@racsa.co.cr>
 
diff --git a/nuttx/TODO b/nuttx/TODO
index 8a0c35b26..679077b22 100644
--- a/nuttx/TODO
+++ b/nuttx/TODO
@@ -24,7 +24,7 @@ NuttX TODO List (Last updated April 12, 2009)
   (2)  ARM/i.MX (arch/arm/src/imx/)
   (3)  ARM/LPC214x (arch/arm/src/lpc214x/)
   (4)  ARM/STR71x (arch/arm/src/str71x/)
-  (2)  ARM/LM3S6918 (arch/arm/src/lm3s/)
+  (1)  ARM/LM3S6918 (arch/arm/src/lm3s/)
   (4)  pjrc-8052 / MCS51 (arch/pjrc-8051/)
   (2)  Hitachi/Renesas SH-1 (arch/sh/src/sh1)
   (4)  Renesas M16C/26 (arch/sh/src/m16c)
@@ -539,10 +539,6 @@ o ARM/STR71x (arch/arm/src/str71x/)
 o ARM/LM3S6918 (arch/arm/src/lm3s/)
   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
 
-  Description: Eagle-100 LEDs do not work.  This has to be a simple problem to fix.
-  Status:      Open
-  Priority:    Low
-
   Description: Still need to implement I2C
   Status:      Open
   Priority:    Low
diff --git a/nuttx/arch/arm/src/lm3s/Make.defs b/nuttx/arch/arm/src/lm3s/Make.defs
index 6a9416aa6..c668d7486 100644
--- a/nuttx/arch/arm/src/lm3s/Make.defs
+++ b/nuttx/arch/arm/src/lm3s/Make.defs
@@ -47,7 +47,7 @@ CMN_CSRCS	= up_allocateheap.c up_assert.c up_blocktask.c up_copystate.c \
 CHIP_ASRCS	= 
 CHIP_CSRCS	= lm3s_start.c lm3s_syscontrol.c lm3s_irq.c \
 		  lm3s_gpio.c lm3s_gpioirq.c lm3s_timerisr.c lm3s_lowputc.c \
-		  lm3s_serial.c lm3s_ssi.c
+		  lm3s_serial.c lm3s_ssi.c lm3s_dumpgpio.c
 
 ifdef CONFIG_NET
 CHIP_CSRCS	+= lm3s_ethernet.c
diff --git a/nuttx/arch/arm/src/lm3s/lm3s_dumpgpio.c b/nuttx/arch/arm/src/lm3s/lm3s_dumpgpio.c
new file mode 100644
index 000000000..766ad911b
--- /dev/null
+++ b/nuttx/arch/arm/src/lm3s/lm3s_dumpgpio.c
@@ -0,0 +1,154 @@
+/****************************************************************************
+ * arch/arm/src/lm3s/lm3s_dumpgpio.c
+ *
+ *   Copyright (C) 2009 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+#include <sys/types.h>
+
+#include <debug.h>
+
+#include <nuttx/arch.h>
+
+#include "up_arch.h"
+
+#include "chip.h"
+#include "lm3s_internal.h"
+
+/****************************************************************************
+ * Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+/* NOTE: this is duplicated in lm3s_gpio.c */
+
+static const uint32 g_gpiobase[8] =
+{
+  LM3S_GPIOA_BASE, LM3S_GPIOB_BASE, LM3S_GPIOC_BASE, LM3S_GPIOD_BASE,
+  LM3S_GPIOE_BASE, LM3S_GPIOF_BASE, LM3S_GPIOG_BASE, LM3S_GPIOH_BASE,
+};
+
+static const char g_portchar[8]   = { 'A', 'B', 'C', 'D', 'E', 'F', 'G', 'H' };
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: lm3s_gpiobaseaddress
+ *
+ * Description:
+ *   Given a GPIO enumeration value, return the base address of the
+ *   associated GPIO registers.
+ *
+ ****************************************************************************/
+
+static inline uint32 lm3s_gpiobaseaddress(int port)
+{
+  return g_gpiobase[port & 7];
+}
+
+/****************************************************************************
+ * Name: lm3s_gpioport
+ *
+ * Description:
+ *   Given a GPIO enumeration value, return the base address of the
+ *   associated GPIO registers.
+ *
+ ****************************************************************************/
+
+static inline ubyte lm3s_gpioport(int port)
+{
+  return g_portchar[port & 7];
+}
+
+/****************************************************************************
+ * Global Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Function:  lm3s_dumpgpio
+ *
+ * Description:
+ *   Dump all GPIO registers associated with the provided base address
+ *
+ ****************************************************************************/
+
+int lm3s_dumpgpio(uint32 pinset, const char *msg)
+{
+  irqstate_t   flags;
+  unsigned int port = (pinset & GPIO_PORT_MASK) >> GPIO_PORT_SHIFT;
+  uint32       base;
+  uint32       rcgc2;
+  boolean      enabled;
+
+  /* Get the base address associated with the GPIO port */
+
+  base = lm3s_gpiobaseaddress(port);
+
+  /* The following requires exclusive access to the GPIO registers */
+
+  flags   = irqsave();
+  rcgc2   = getreg32(LM3S_SYSCON_RCGC2);
+  enabled = ((rcgc2 & SYSCON_RCGC2_GPIO(port)) != 0);
+
+  lldbg("GPIO%c pinset: %08x base: %08x -- %s\n",
+        lm3s_gpioport(port), pinset, base, msg);
+  lldbg("  RCGC2: %08x (%s)\n",
+        rcgc2, enabled ? "enabled" : "disabled" );
+
+  /* Don't bother with the rest unless the port is enabled */
+  
+  if (enabled)
+    {
+      lldbg("  AFSEL: %02x DEN: %02x DIR: %02x DATA: %02x\n",
+            getreg32(base + LM3S_GPIO_AFSEL_OFFSET), getreg32(base + LM3S_GPIO_DEN_OFFSET),
+            getreg32(base + LM3S_GPIO_DIR_OFFSET), getreg32(base + LM3S_GPIO_DATA_OFFSET + 0x3fc));
+      lldbg("  IS:    %02x IBE: %02x IEV: %02x IM:  %02x RIS: %02x MIS: %02x\n",
+            getreg32(base + LM3S_GPIO_IEV_OFFSET), getreg32(base + LM3S_GPIO_IM_OFFSET),
+            getreg32(base + LM3S_GPIO_RIS_OFFSET), getreg32(base + LM3S_GPIO_MIS_OFFSET));
+      lldbg("  2MA:   %02x 4MA: %02x 8MA: %02x ODR: %02x PUR %02x PDR: %02x SLR: %02x\n",
+            getreg32(base + LM3S_GPIO_DR2R_OFFSET), getreg32(base + LM3S_GPIO_DR4R_OFFSET),
+            getreg32(base + LM3S_GPIO_DR8R_OFFSET), getreg32(base + LM3S_GPIO_ODR_OFFSET),
+            getreg32(base + LM3S_GPIO_PUR_OFFSET), getreg32(base + LM3S_GPIO_PDR_OFFSET),
+            getreg32(base + LM3S_GPIO_SLR_OFFSET));
+    }
+  irqrestore(flags);
+}
diff --git a/nuttx/arch/arm/src/lm3s/lm3s_gpio.c b/nuttx/arch/arm/src/lm3s/lm3s_gpio.c
index 891a2fdb0..d289022a9 100644
--- a/nuttx/arch/arm/src/lm3s/lm3s_gpio.c
+++ b/nuttx/arch/arm/src/lm3s/lm3s_gpio.c
@@ -789,7 +789,7 @@ void lm3s_gpiowrite(uint32 pinset, boolean value)
    * "... All bits are cleared by a reset."
    */
 
-  putreg32((uint32)value << pinno, base + LM3S_GPIO_DATA_OFFSET + (pinno << 2));
+  putreg32((uint32)value << pinno, base + LM3S_GPIO_DATA_OFFSET + (1 << (pinno + 2)));
 }
 
 /****************************************************************************
@@ -828,5 +828,5 @@ boolean lm3s_gpioread(uint32 pinset, boolean value)
    *  are cleared by a reset."
    */
 
-  return (getreg32(base + LM3S_GPIO_DATA_OFFSET + (pinno << 2)) != 0);
+  return (getreg32(base + LM3S_GPIO_DATA_OFFSET + (1 << (pinno + 2))) != 0);
 }
\ No newline at end of file
diff --git a/nuttx/arch/arm/src/lm3s/lm3s_internal.h b/nuttx/arch/arm/src/lm3s/lm3s_internal.h
index 3a52344a2..70249a191 100644
--- a/nuttx/arch/arm/src/lm3s/lm3s_internal.h
+++ b/nuttx/arch/arm/src/lm3s/lm3s_internal.h
@@ -280,6 +280,16 @@ EXTERN void lm3s_gpiowrite(uint32 pinset, boolean value);
 EXTERN boolean lm3s_gpioread(uint32 pinset, boolean value);
 
 /****************************************************************************
+ * Function:  lm3s_dumpgpio
+ *
+ * Description:
+ *   Dump all GPIO registers associated with the provided base address
+ *
+ ****************************************************************************/
+
+EXTERN int lm3s_dumpgpio(uint32 pinset, const char *msg);
+
+/****************************************************************************
  * Name: gpio_irqinitialize
  *
  * Description:
diff --git a/nuttx/configs/eagle100/include/board.h b/nuttx/configs/eagle100/include/board.h
index 16cae3d78..096ca8410 100644
--- a/nuttx/configs/eagle100/include/board.h
+++ b/nuttx/configs/eagle100/include/board.h
@@ -114,7 +114,8 @@
 
 /* GPIO for microSD card chip select */
 
-#define SDC_CS   (GPIO_PORTG | 2)
+#define SDCCS_GPIO (GPIO_FUNC_OUTPUT | GPIO_PADTYPE_STDWPU | GPIO_STRENGTH_4MA | GPIO_VALUE_ONE | GPIO_PORTG | 2)
+#define LED_GPIO   (GPIO_FUNC_OUTPUT | GPIO_VALUE_ONE | GPIO_PORTE | 1)
 
 /************************************************************************************
  * Public Function Prototypes
diff --git a/nuttx/configs/eagle100/src/up_boot.c b/nuttx/configs/eagle100/src/up_boot.c
index 4b7d5f6ef..874d3dc06 100644
--- a/nuttx/configs/eagle100/src/up_boot.c
+++ b/nuttx/configs/eagle100/src/up_boot.c
@@ -41,6 +41,8 @@
 #include <nuttx/config.h>

 #include <sys/types.h>

 

+#include <debug.h>

+

 #include <arch/board/board.h>

 

 #include "up_arch.h"

@@ -70,7 +72,7 @@ void lm3s_boardinitialize(void)
 {

   /* Configure the SPI-based microSD CS GPIO */

 

-  lm3s_configgpio(SDC_CS | GPIO_PADTYPE_STDWPU | GPIO_STRENGTH_4MA | GPIO_VALUE_ONE);

+  lm3s_configgpio(SDCCS_GPIO);

 

   /* Configure on-board LEDs */

 

diff --git a/nuttx/configs/eagle100/src/up_leds.c b/nuttx/configs/eagle100/src/up_leds.c
index 5a9d36382..5cb6be0d7 100644
--- a/nuttx/configs/eagle100/src/up_leds.c
+++ b/nuttx/configs/eagle100/src/up_leds.c
@@ -41,6 +41,8 @@
 #include <nuttx/config.h>
 #include <sys/types.h>
 
+#include <debug.h>
+
 #include <arch/board/board.h>
 
 #include "chip.h"
@@ -52,6 +54,28 @@
  * Definitions
  ****************************************************************************/
 
+/* Enables debug output from this file (needs CONFIG_DEBUG with
+ * CONFIG_DEBUG_VERBOSE too)
+ */
+
+#undef LED_DEBUG /* Define to enable debug */
+
+#ifdef LED_DEBUG
+#  define leddbg  lldbg
+#  define ledvdbg llvdbg
+#else
+#  define leddbg(x...)
+#  define ledvdbg(x...)
+#endif
+
+/* Dump GPIO registers */
+
+#ifdef LED_DEBUG
+#  define led_dumpgpio(m) lm3s_dumpgpio(LED_GPIO, m)
+#else
+#  define led_dumpgpio(m)
+#endif
+
 /****************************************************************************
  * Private Data
  ****************************************************************************/
@@ -73,13 +97,13 @@ static boolean g_nest;
 #ifdef CONFIG_ARCH_LEDS
 void up_ledinit(void)
 {
-  /* Make sure that the GPIOE peripheral is enabled */
-
-  modifyreg32(LM3S_SYSCON_RCGC2_OFFSET, 0, SYSCON_RCGC2_GPIOE);
+  leddbg("Initializing\n");
 
   /* Configure Port E, Bit 1 as an output, initial value=OFF */
 
-  lm3s_configgpio(GPIO_FUNC_OUTPUT | GPIO_VALUE_ZERO | GPIO_PORTE | 1);
+  led_dumpgpio("up_ledinit before lm3s_configgpio()");
+  lm3s_configgpio(LED_GPIO);
+  led_dumpgpio("up_ledinit after lm3s_configgpio()");
   g_nest = 0;
 }
 
@@ -103,7 +127,9 @@ void up_ledon(int led)
         g_nest++;
       case LED_IRQSENABLED:
       case LED_STACKCREATED:
-        modifyreg32(LM3S_GPIOE_DATA, 0, (1 << 1));
+        led_dumpgpio("up_ledon: before lm3s_gpiowrite()");
+        lm3s_gpiowrite(LED_GPIO, FALSE);
+        led_dumpgpio("up_ledon: after lm3s_gpiowrite()");
         break;
     }
 }
@@ -129,7 +155,9 @@ void up_ledoff(int led)
       case LED_PANIC:
         if (--g_nest <= 0)
           {
-            modifyreg32(LM3S_GPIOE_DATA, (1 << 1), 0);
+            led_dumpgpio("up_ledoff: before lm3s_gpiowrite()");
+            lm3s_gpiowrite(LED_GPIO, TRUE);
+            led_dumpgpio("up_ledoff: after lm3s_gpiowrite()");
           }
         break;
     }
diff --git a/nuttx/configs/eagle100/src/up_ssi.c b/nuttx/configs/eagle100/src/up_ssi.c
index 2a09ce4a8..c14c7ab89 100644
--- a/nuttx/configs/eagle100/src/up_ssi.c
+++ b/nuttx/configs/eagle100/src/up_ssi.c
@@ -84,7 +84,7 @@ void lm3s_spiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, boolean sel
     {

       /* Assert the CS pin to the card */

 

-      lm3s_gpiowrite(SDC_CS, selected ? 0 : 1);

+      lm3s_gpiowrite(SDCCS_GPIO, !selected);

     }

 }