Add Kinesis DMA header files

git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3858 42af7a65-404d-4744-a932-0658087f49c3

2 files changed, 718 insertions, 0 deletions

diff --git a/nuttx/arch/arm/src/kinetis/kinetis_dma.h b/nuttx/arch/arm/src/kinetis/kinetis_dma.h
new file mode 100644
index 000000000..4eb1aeca9
--- /dev/null
+++ b/nuttx/arch/arm/src/kinetis/kinetis_dma.h
@@ -0,0 +1,607 @@
+/****************************************************************************************************
+ * arch/arm/src/kinetis/kinetis_dma.h
+ *
+ *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_DMA_H
+#define __ARCH_ARM_SRC_KINETIS_KINETIS_DMA_H
+
+/****************************************************************************************************
+ * Included Files
+ ****************************************************************************************************/
+
+#include <nuttx/config.h>
+
+#include "chip.h"
+
+/****************************************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************************************/
+
+/* Register Offsets *********************************************************************************/
+
+#define KINETIS_DMA_CR_OFFSET             0x0000 /* Control Register */
+#define KINETIS_DMA_ES_OFFSET             0x0004 /* Error Status Register */
+#define KINETIS_DMA_ERQ_OFFSET            0x000c /* Enable Request Register */
+#define KINETIS_DMA_EEI_OFFSET            0x0014 /* Enable Error Interrupt Register */
+#define KINETIS_DMA_CEEI_OFFSET           0x0018 /* Clear Enable Error Interrupt Register */
+#define KINETIS_DMA_SEEI_OFFSET           0x0019 /* Set Enable Error Interrupt Register */
+#define KINETIS_DMA_CERQ_OFFSET           0x001a /* Clear Enable Request Register */
+#define KINETIS_DMA_SERQ_OFFSET           0x001b /* Set Enable Request Register */
+#define KINETIS_DMA_CDNE_OFFSET           0x001c /* Clear DONE Status Bit Register */
+#define KINETIS_DMA_SSRT_OFFSET           0x001d /* Set START Bit Register */
+#define KINETIS_DMA_CERR_OFFSET           0x001e /* Clear Error Register */
+#define KINETIS_DMA_CINT_OFFSET           0x001f /* Clear Interrupt Request Register */
+#define KINETIS_DMA_INT_OFFSET            0x0024 /* Interrupt Request Register */
+#define KINETIS_DMA_ERR_OFFSET            0x002c /* Error Register */
+#define KINETIS_DMA_HRS_OFFSET            0x0034 /* Hardware Request Status Register */
+
+#define KINETIS_DMA_DCHPRI3_OFFSET        0x0100 /* Channel 3 Priority Register */
+#define KINETIS_DMA_DCHPRI2_OFFSET        0x0101 /* Channel 2 Priority Register */
+#define KINETIS_DMA_DCHPRI1_OFFSET        0x0102 /* Channel 1 Priority Register */
+#define KINETIS_DMA_DCHPRI0_OFFSET        0x0103 /* Channel 0 Priority Register */
+#define KINETIS_DMA_DCHPRI7_OFFSET        0x0104 /* Channel 7 Priority Register */
+#define KINETIS_DMA_DCHPRI6_OFFSET        0x0105 /* Channel 6 Priority Register */
+#define KINETIS_DMA_DCHPRI5_OFFSET        0x0106 /* Channel 5 Priority Register */
+#define KINETIS_DMA_DCHPRI4_OFFSET        0x0107 /* Channel 4 Priority Register */
+#define KINETIS_DMA_DCHPRI11_OFFSET       0x0108 /* Channel 11 Priority Register */
+#define KINETIS_DMA_DCHPRI10_OFFSET       0x0109 /* Channel 10 Priority Register */
+#define KINETIS_DMA_DCHPRI9_OFFSET        0x010a /* Channel 9 Priority Register */
+#define KINETIS_DMA_DCHPRI8_OFFSET        0x010b /* Channel 8 Priority Register */
+#define KINETIS_DMA_DCHPRI15_OFFSET       0x010c /* Channel 15 Priority Register */
+#define KINETIS_DMA_DCHPRI14_OFFSET       0x010d /* Channel 14 Priority Register */
+#define KINETIS_DMA_DCHPRI13_OFFSET       0x010e /* Channel 13 Priority Register */
+#define KINETIS_DMA_DCHPRI12_OFFSET       0x010f /* Channel 12 Priority Register */
+
+#define KINETIS_DMA_TCD_OFFSET(n)         (0x0000+((n) << 5))
+#define KINETIS_DMA_TCD_SADDR_OFFSET      0x0000 /* TCD Source Address */
+#define KINETIS_DMA_TCD_SOFF_OFFSET       0x0004 /* TCD Signed Source Address Offset */
+#define KINETIS_DMA_TCD_ATTR_OFFSET       0x0006 /* TCD Transfer Attributes */
+#define KINETIS_DMA_TCD_NBYTES_OFFSET     0x0008 /* TCD Minor Byte Count */
+#define KINETIS_DMA_TCD_SLAST_OFFSET      0x000c /* TCD Last Source Address Adjustment */
+#define KINETIS_DMA_TCD_DADDR_OFFSET      0x0010 /* TCD Destination Address */
+#define KINETIS_DMA_TCD_DOFF_OFFSET       0x0014 /* TCD Signed Destination Address Offset */
+#define KINETIS_DMA_TCD_CITER_OFFSET      0x0016 /* TCD Current Minor Loop Link, Major Loop Count */
+#define KINETIS_DMA_TCD_DLASTSGA_OFFSET   0x0018 /* TCD Last Destination Address Adjustment/Scatter Gather Address */
+#define KINETIS_DMA_TCD_CSR_OFFSET        0x001c /* TCD Control and Status */
+#define KINETIS_DMA_TCD_BITER_OFFSET      0x001e /* TCD Beginning Minor Loop Link, Major Loop Count */
+
+#define KINETIS_DMA_TCD0_SADDR_OFFSET     0x0000 /* TCD Source Address */
+#define KINETIS_DMA_TCD0_SOFF_OFFSET      0x0004 /* TCD Signed Source Address Offset */
+#define KINETIS_DMA_TCD0_ATTR_OFFSET      0x0006 /* TCD Transfer Attributes */
+#define KINETIS_DMA_TCD0_NBYTES_OFFSET    0x0008 /* TCD Minor Byte Count */
+#define KINETIS_DMA_TCD0_SLAST_OFFSET     0x000c /* TCD Last Source Address Adjustment */
+#define KINETIS_DMA_TCD0_DADDR_OFFSET     0x0010 /* TCD Destination Address */
+#define KINETIS_DMA_TCD0_DOFF_OFFSET      0x0014 /* TCD Signed Destination Address Offset */
+#define KINETIS_DMA_TCD0_CITER_OFFSET     0x0016 /* TCD Current Minor Loop Link, Major Loop Count */
+#define KINETIS_DMA_TCD0_DLASTSGA_OFFSET  0x0018 /* TCD Last Destination Address Adjustment/Scatter Gather Address */
+#define KINETIS_DMA_TCD0_CSR_OFFSET       0x001c /* TCD Control and Status */
+#define KINETIS_DMA_TCD0_BITER_OFFSET     0x001e /* TCD Beginning Minor Loop Link, Major Loop Count */
+
+#define KINETIS_DMA_TCD1_SADDR_OFFSET     0x0020 /* TCD Source Address */
+#define KINETIS_DMA_TCD1_SOFF_OFFSET      0x0024 /* TCD Signed Source Address Offset */
+#define KINETIS_DMA_TCD1_ATTR_OFFSET      0x0026 /* TCD Transfer Attributes */
+#define KINETIS_DMA_TCD1_NBYTES_OFFSET    0x0028 /* TCD Minor Byte Count */
+#define KINETIS_DMA_TCD1_SLAST_OFFSET     0x002c /* TCD Last Source Address Adjustment */
+#define KINETIS_DMA_TCD1_DADDR_OFFSET     0x0030 /* TCD Destination Address */
+#define KINETIS_DMA_TCD1_DOFF_OFFSET      0x0034 /* TCD Signed Destination Address Offset */
+#define KINETIS_DMA_TCD1_CITER_OFFSET     0x0036 /* TCD Current Minor Loop Link, Major Loop Count */
+#define KINETIS_DMA_TCD1_DLASTSGA_OFFSET  0x0038 /* TCD Last Destination Address Adjustment/Scatter Gather Address */
+#define KINETIS_DMA_TCD1_CSR_OFFSET       0x003c /* TCD Control and Status */
+#define KINETIS_DMA_TCD1_BITER_OFFSET     0x003e /* TCD Beginning Minor Loop Link, Major Loop Count */
+
+#define KINETIS_DMA_TCD2_SADDR_OFFSET     0x0040 /* TCD Source Address */
+#define KINETIS_DMA_TCD2_SOFF_OFFSET      0x0044 /* TCD Signed Source Address Offset */
+#define KINETIS_DMA_TCD2_ATTR_OFFSET      0x0046 /* TCD Transfer Attributes */
+#define KINETIS_DMA_TCD2_NBYTES_OFFSET    0x0048 /* TCD Minor Byte Count */
+#define KINETIS_DMA_TCD2_SLAST_OFFSET     0x004c /* TCD Last Source Address Adjustment */
+#define KINETIS_DMA_TCD2_DADDR_OFFSET     0x0050 /* TCD Destination Address */
+#define KINETIS_DMA_TCD2_DOFF_OFFSET      0x0054 /* TCD Signed Destination Address Offset */
+#define KINETIS_DMA_TCD2_CITER_OFFSET     0x0056 /* TCD Current Minor Loop Link, Major Loop Count */
+#define KINETIS_DMA_TCD2_DLASTSGA_OFFSET  0x0058 /* TCD Last Destination Address Adjustment/Scatter Gather Address */
+#define KINETIS_DMA_TCD2_CSR_OFFSET       0x005c /* TCD Control and Status */
+#define KINETIS_DMA_TCD2_BITER_OFFSET     0x005e /* TCD Beginning Minor Loop Link, Major Loop Count */
+
+#define KINETIS_DMA_TCD3_SADDR_OFFSET     0x0060 /* TCD Source Address */
+#define KINETIS_DMA_TCD3_SOFF_OFFSET      0x0064 /* TCD Signed Source Address Offset */
+#define KINETIS_DMA_TCD3_ATTR_OFFSET      0x0066 /* TCD Transfer Attributes */
+#define KINETIS_DMA_TCD3_NBYTES_OFFSET    0x0068 /* TCD Minor Byte Count */
+#define KINETIS_DMA_TCD3_SLAST_OFFSET     0x006c /* TCD Last Source Address Adjustment */
+#define KINETIS_DMA_TCD3_DADDR_OFFSET     0x0070 /* TCD Destination Address */
+#define KINETIS_DMA_TCD3_DOFF_OFFSET      0x0074 /* TCD Signed Destination Address Offset */
+#define KINETIS_DMA_TCD3_CITER_OFFSET     0x0076 /* TCD Current Minor Loop Link, Major Loop Count */
+#define KINETIS_DMA_TCD3_DLASTSGA_OFFSET  0x0078 /* TCD Last Destination Address Adjustment/Scatter Gather Address */
+#define KINETIS_DMA_TCD3_CSR_OFFSET       0x007c /* TCD Control and Status */
+#define KINETIS_DMA_TCD3_BITER_OFFSET     0x007e /* TCD Beginning Minor Loop Link, Major Loop Count */
+
+#define KINETIS_DMA_TCD4_SADDR_OFFSET     0x0080 /* TCD Source Address */
+#define KINETIS_DMA_TCD4_SOFF_OFFSET      0x0084 /* TCD Signed Source Address Offset */
+#define KINETIS_DMA_TCD4_ATTR_OFFSET      0x0086 /* TCD Transfer Attributes */
+#define KINETIS_DMA_TCD4_NBYTES_OFFSET    0x0088 /* TCD Minor Byte Count */
+#define KINETIS_DMA_TCD4_SLAST_OFFSET     0x008c /* TCD Last Source Address Adjustment */
+#define KINETIS_DMA_TCD4_DADDR_OFFSET     0x0090 /* TCD Destination Address */
+#define KINETIS_DMA_TCD4_DOFF_OFFSET      0x0094 /* TCD Signed Destination Address Offset */
+#define KINETIS_DMA_TCD4_CITER_OFFSET     0x0096 /* TCD Current Minor Loop Link, Major Loop Count */
+#define KINETIS_DMA_TCD4_DLASTSGA_OFFSET  0x0098 /* TCD Last Destination Address Adjustment/Scatter Gather Address */
+#define KINETIS_DMA_TCD4_CSR_OFFSET       0x009c /* TCD Control and Status */
+#define KINETIS_DMA_TCD4_BITER_OFFSET     0x009e /* TCD Beginning Minor Loop Link, Major Loop Count */
+
+#define KINETIS_DMA_TCD5_SADDR_OFFSET     0x00a0 /* TCD Source Address */
+#define KINETIS_DMA_TCD5_SOFF_OFFSET      0x00a4 /* TCD Signed Source Address Offset */
+#define KINETIS_DMA_TCD5_ATTR_OFFSET      0x00a6 /* TCD Transfer Attributes */
+#define KINETIS_DMA_TCD5_NBYTES_OFFSET    0x00a8 /* TCD Minor Byte Count */
+#define KINETIS_DMA_TCD5_SLAST_OFFSET     0x00ac /* TCD Last Source Address Adjustment */
+#define KINETIS_DMA_TCD5_DADDR_OFFSET     0x00b0 /* TCD Destination Address */
+#define KINETIS_DMA_TCD5_DOFF_OFFSET      0x00b4 /* TCD Signed Destination Address Offset */
+#define KINETIS_DMA_TCD5_CITER_OFFSET     0x00b6 /* TCD Current Minor Loop Link, Major Loop Count */
+#define KINETIS_DMA_TCD5_DLASTSGA_OFFSET  0x00b8 /* TCD Last Destination Address Adjustment/Scatter Gather Address */
+#define KINETIS_DMA_TCD5_CSR_OFFSET       0x00bc /* TCD Control and Status */
+#define KINETIS_DMA_TCD5_BITER_OFFSET     0x00be /* TCD Beginning Minor Loop Link, Major Loop Count */
+
+#define KINETIS_DMA_TCD6_SADDR_OFFSET     0x00c0 /* TCD Source Address */
+#define KINETIS_DMA_TCD6_SOFF_OFFSET      0x00c4 /* TCD Signed Source Address Offset */
+#define KINETIS_DMA_TCD6_ATTR_OFFSET      0x00c6 /* TCD Transfer Attributes */
+#define KINETIS_DMA_TCD6_NBYTES_OFFSET    0x00c8 /* TCD Minor Byte Count */
+#define KINETIS_DMA_TCD6_SLAST_OFFSET     0x00cc /* TCD Last Source Address Adjustment */
+#define KINETIS_DMA_TCD6_DADDR_OFFSET     0x00d0 /* TCD Destination Address */
+#define KINETIS_DMA_TCD6_DOFF_OFFSET      0x00d4 /* TCD Signed Destination Address Offset */
+#define KINETIS_DMA_TCD6_CITER_OFFSET     0x00d6 /* TCD Current Minor Loop Link, Major Loop Count */
+#define KINETIS_DMA_TCD6_DLASTSGA_OFFSET  0x00d8 /* TCD Last Destination Address Adjustment/Scatter Gather Address */
+#define KINETIS_DMA_TCD6_CSR_OFFSET       0x00dc /* TCD Control and Status */
+#define KINETIS_DMA_TCD6_BITER_OFFSET     0x00de /* TCD Beginning Minor Loop Link, Major Loop Count */
+
+#define KINETIS_DMA_TCD7_SADDR_OFFSET     0x00e0 /* TCD Source Address */
+#define KINETIS_DMA_TCD7_SOFF_OFFSET      0x00e4 /* TCD Signed Source Address Offset */
+#define KINETIS_DMA_TCD7_ATTR_OFFSET      0x00e6 /* TCD Transfer Attributes */
+#define KINETIS_DMA_TCD7_NBYTES_OFFSET    0x00e8 /* TCD Minor Byte Count */
+#define KINETIS_DMA_TCD7_SLAST_OFFSET     0x00ec /* TCD Last Source Address Adjustment */
+#define KINETIS_DMA_TCD7_DADDR_OFFSET     0x00f0 /* TCD Destination Address */
+#define KINETIS_DMA_TCD7_DOFF_OFFSET      0x00f4 /* TCD Signed Destination Address Offset */
+#define KINETIS_DMA_TCD7_CITER_OFFSET     0x00f6 /* TCD Current Minor Loop Link, Major Loop Count */
+#define KINETIS_DMA_TCD7_DLASTSGA_OFFSET  0x00f8 /* TCD Last Destination Address Adjustment/Scatter Gather Address */
+#define KINETIS_DMA_TCD7_CSR_OFFSET       0x00fc /* TCD Control and Status */
+#define KINETIS_DMA_TCD7_BITER_OFFSET     0x00fe /* TCD Beginning Minor Loop Link, Major Loop Count */
+
+#define KINETIS_DMA_TCD8_SADDR_OFFSET     0x0100 /* TCD Source Address */
+#define KINETIS_DMA_TCD8_SOFF_OFFSET      0x0104 /* TCD Signed Source Address Offset */
+#define KINETIS_DMA_TCD8_ATTR_OFFSET      0x0106 /* TCD Transfer Attributes */
+#define KINETIS_DMA_TCD8_NBYTES_OFFSET    0x0108 /* TCD Minor Byte Count */
+#define KINETIS_DMA_TCD8_SLAST_OFFSET     0x010c /* TCD Last Source Address Adjustment */
+#define KINETIS_DMA_TCD8_DADDR_OFFSET     0x0110 /* TCD Destination Address */
+#define KINETIS_DMA_TCD8_DOFF_OFFSET      0x0114 /* TCD Signed Destination Address Offset */
+#define KINETIS_DMA_TCD8_CITER_OFFSET     0x0116 /* TCD Current Minor Loop Link, Major Loop Count */
+#define KINETIS_DMA_TCD8_DLASTSGA_OFFSET  0x0118 /* TCD Last Destination Address Adjustment/Scatter Gather Address */
+#define KINETIS_DMA_TCD8_CSR_OFFSET       0x011c /* TCD Control and Status */
+#define KINETIS_DMA_TCD8_BITER_OFFSET     0x011e /* TCD Beginning Minor Loop Link, Major Loop Count */
+
+#define KINETIS_DMA_TCD9_SADDR_OFFSET     0x0120 /* TCD Source Address */
+#define KINETIS_DMA_TCD9_SOFF_OFFSET      0x0124 /* TCD Signed Source Address Offset */
+#define KINETIS_DMA_TCD9_ATTR_OFFSET      0x0126 /* TCD Transfer Attributes */
+#define KINETIS_DMA_TCD9_NBYTES_OFFSET    0x0128 /* TCD Minor Byte Count */
+#define KINETIS_DMA_TCD9_SLAST_OFFSET     0x012c /* TCD Last Source Address Adjustment */
+#define KINETIS_DMA_TCD9_DADDR_OFFSET     0x0130 /* TCD Destination Address */
+#define KINETIS_DMA_TCD9_DOFF_OFFSET      0x0134 /* TCD Signed Destination Address Offset */
+#define KINETIS_DMA_TCD9_CITER_OFFSET     0x0136 /* TCD Current Minor Loop Link, Major Loop Count */
+#define KINETIS_DMA_TCD9_DLASTSGA_OFFSET  0x0138 /* TCD Last Destination Address Adjustment/Scatter Gather Address */
+#define KINETIS_DMA_TCD9_CSR_OFFSET       0x013c /* TCD Control and Status */
+#define KINETIS_DMA_TCD9_BITER_OFFSET     0x013e /* TCD Beginning Minor Loop Link, Major Loop Count */
+
+#define KINETIS_DMA_TCD10_SADDR_OFFSET    0x0140 /* TCD Source Address */
+#define KINETIS_DMA_TCD10_SOFF_OFFSET     0x0144 /* TCD Signed Source Address Offset */
+#define KINETIS_DMA_TCD10_ATTR_OFFSET     0x0146 /* TCD Transfer Attributes */
+#define KINETIS_DMA_TCD10_NBYTES_OFFSET   0x0148 /* TCD Minor Byte Count */
+#define KINETIS_DMA_TCD10_SLAST_OFFSET    0x014c /* TCD Last Source Address Adjustment */
+#define KINETIS_DMA_TCD10_DADDR_OFFSET    0x0150 /* TCD Destination Address */
+#define KINETIS_DMA_TCD10_DOFF_OFFSET     0x0154 /* TCD Signed Destination Address Offset */
+#define KINETIS_DMA_TCD10_CITER_OFFSET    0x0156 /* TCD Current Minor Loop Link, Major Loop Count */
+#define KINETIS_DMA_TCD10_DLASTSGA_OFFSET 0x0158 /* TCD Last Destination Address Adjustment/Scatter Gather Address */
+#define KINETIS_DMA_TCD10_CSR_OFFSET      0x015c /* TCD Control and Status */
+#define KINETIS_DMA_TCD10_BITER_OFFSET    0x015e /* TCD Beginning Minor Loop Link, Major Loop Count */
+
+#define KINETIS_DMA_TCD11_SADDR_OFFSET    0x0160 /* TCD Source Address */
+#define KINETIS_DMA_TCD11_SOFF_OFFSET     0x0164 /* TCD Signed Source Address Offset */
+#define KINETIS_DMA_TCD11_ATTR_OFFSET     0x0166 /* TCD Transfer Attributes */
+#define KINETIS_DMA_TCD11_NBYTES_OFFSET   0x0168 /* TCD Minor Byte Count */
+#define KINETIS_DMA_TCD11_SLAST_OFFSET    0x016c /* TCD Last Source Address Adjustment */
+#define KINETIS_DMA_TCD11_DADDR_OFFSET    0x0170 /* TCD Destination Address */
+#define KINETIS_DMA_TCD11_DOFF_OFFSET     0x0174 /* TCD Signed Destination Address Offset */
+#define KINETIS_DMA_TCD11_CITER_OFFSET    0x0176 /* TCD Current Minor Loop Link, Major Loop Count */
+#define KINETIS_DMA_TCD11_DLASTSGA_OFFSET 0x0178 /* TCD Last Destination Address Adjustment/Scatter Gather Address */
+#define KINETIS_DMA_TCD11_CSR_OFFSET      0x017c /* TCD Control and Status */
+#define KINETIS_DMA_TCD11_BITER_OFFSET    0x017e /* TCD Beginning Minor Loop Link, Major Loop Count */
+
+#define KINETIS_DMA_TCD12_SADDR_OFFSET    0x0180 /* TCD Source Address */
+#define KINETIS_DMA_TCD12_SOFF_OFFSET     0x0184 /* TCD Signed Source Address Offset */
+#define KINETIS_DMA_TCD12_ATTR_OFFSET     0x0186 /* TCD Transfer Attributes */
+#define KINETIS_DMA_TCD12_NBYTES_OFFSET   0x0188 /* TCD Minor Byte Count */
+#define KINETIS_DMA_TCD12_SLAST_OFFSET    0x018c /* TCD Last Source Address Adjustment */
+#define KINETIS_DMA_TCD12_DADDR_OFFSET    0x0190 /* TCD Destination Address */
+#define KINETIS_DMA_TCD12_DOFF_OFFSET     0x0194 /* TCD Signed Destination Address Offset */
+#define KINETIS_DMA_TCD12_CITER_OFFSET    0x0196 /* TCD Current Minor Loop Link, Major Loop Count */
+#define KINETIS_DMA_TCD12_DLASTSGA_OFFSET 0x0198 /* TCD Last Destination Address Adjustment/Scatter Gather Address */
+#define KINETIS_DMA_TCD12_CSR_OFFSET      0x019c /* TCD Control and Status */
+#define KINETIS_DMA_TCD12_BITER_OFFSET    0x019e /* TCD Beginning Minor Loop Link, Major Loop Count */
+
+#define KINETIS_DMA_TCD13_SADDR_OFFSET    0x01a0 /* TCD Source Address */
+#define KINETIS_DMA_TCD13_SOFF_OFFSET     0x01a4 /* TCD Signed Source Address Offset */
+#define KINETIS_DMA_TCD13_ATTR_OFFSET     0x01a6 /* TCD Transfer Attributes */
+#define KINETIS_DMA_TCD13_NBYTES_OFFSET   0x01a8 /* TCD Minor Byte Count */
+#define KINETIS_DMA_TCD13_SLAST_OFFSET    0x01ac /* TCD Last Source Address Adjustment */
+#define KINETIS_DMA_TCD13_DADDR_OFFSET    0x01b0 /* TCD Destination Address */
+#define KINETIS_DMA_TCD13_DOFF_OFFSET     0x01b4 /* TCD Signed Destination Address Offset */
+#define KINETIS_DMA_TCD13_CITER_OFFSET    0x01b6 /* TCD Current Minor Loop Link, Major Loop Count */
+#define KINETIS_DMA_TCD13_DLASTSGA_OFFSET 0x01b8 /* TCD Last Destination Address Adjustment/Scatter Gather Address */
+#define KINETIS_DMA_TCD13_CSR_OFFSET      0x01bc /* TCD Control and Status */
+#define KINETIS_DMA_TCD13_BITER_OFFSET    0x01be /* TCD Beginning Minor Loop Link, Major Loop Count */
+
+#define KINETIS_DMA_TCD14_SADDR_OFFSET    0x01c0 /* TCD Source Address */
+#define KINETIS_DMA_TCD14_SOFF_OFFSET     0x01c4 /* TCD Signed Source Address Offset */
+#define KINETIS_DMA_TCD14_ATTR_OFFSET     0x01c6 /* TCD Transfer Attributes */
+#define KINETIS_DMA_TCD14_NBYTES_OFFSET   0x01c8 /* TCD Minor Byte Count */
+#define KINETIS_DMA_TCD14_SLAST_OFFSET    0x01cc /* TCD Last Source Address Adjustment */
+#define KINETIS_DMA_TCD14_DADDR_OFFSET    0x01d0 /* TCD Destination Address */
+#define KINETIS_DMA_TCD14_DOFF_OFFSET     0x01d4 /* TCD Signed Destination Address Offset */
+#define KINETIS_DMA_TCD14_CITER_OFFSET    0x01d6 /* TCD Current Minor Loop Link, Major Loop Count */
+#define KINETIS_DMA_TCD14_DLASTSGA_OFFSET 0x01d8 /* TCD Last Destination Address Adjustment/Scatter Gather Address */
+#define KINETIS_DMA_TCD14_CSR_OFFSET      0x01dc /* TCD Control and Status */
+#define KINETIS_DMA_TCD14_BITER_OFFSET    0x01de /* TCD Beginning Minor Loop Link, Major Loop Count */
+
+#define KINETIS_DMA_TCD15_SADDR_OFFSET    0x01e0 /* TCD Source Address */
+#define KINETIS_DMA_TCD15_SOFF_OFFSET     0x01e4 /* TCD Signed Source Address Offset */
+#define KINETIS_DMA_TCD15_ATTR_OFFSET     0x01e6 /* TCD Transfer Attributes */
+#define KINETIS_DMA_TCD15_NBYTES_OFFSET   0x01e8 /* TCD Minor Byte Count */
+#define KINETIS_DMA_TCD15_SLAST_OFFSET    0x01ec /* TCD Last Source Address Adjustment */
+#define KINETIS_DMA_TCD15_DADDR_OFFSET    0x01f0 /* TCD Destination Address */
+#define KINETIS_DMA_TCD15_DOFF_OFFSET     0x01f4 /* TCD Signed Destination Address Offset */
+#define KINETIS_DMA_TCD15_CITER_OFFSET    0x01f6 /* TCD Current Minor Loop Link, Major Loop Count */
+#define KINETIS_DMA_TCD15_DLASTSGA_OFFSET 0x01f8 /* TCD Last Destination Address Adjustment/Scatter Gather Address */
+#define KINETIS_DMA_TCD15_CSR_OFFSET      0x01fc /* TCD Control and Status */
+#define KINETIS_DMA_TCD15_BITER_OFFSET    0x01fe /* TCD Beginning Minor Loop Link, Major Loop Count */
+
+/* Register Addresses *******************************************************************************/
+
+#define KINETIS_DMA_CR                    (KINETIS_DMAC_BASE+KINETIS_DMA_CR_OFFSET)
+#define KINETIS_DMA_ES                    (KINETIS_DMAC_BASE+KINETIS_DMA_ES_OFFSET)
+#define KINETIS_DMA_ERQ                   (KINETIS_DMAC_BASE+KINETIS_DMA_ERQ_OFFSET)
+#define KINETIS_DMA_EEI                   (KINETIS_DMAC_BASE+KINETIS_DMA_EEI_OFFSET)
+#define KINETIS_DMA_CEEI                  (KINETIS_DMAC_BASE+KINETIS_DMA_CEEI_OFFSET)
+#define KINETIS_DMA_SEEI                  (KINETIS_DMAC_BASE+KINETIS_DMA_SEEI_OFFSET)
+#define KINETIS_DMA_CERQ                  (KINETIS_DMAC_BASE+KINETIS_DMA_CERQ_OFFSET)
+#define KINETIS_DMA_SERQ                  (KINETIS_DMAC_BASE+KINETIS_DMA_SERQ_OFFSET)
+#define KINETIS_DMA_CDNE                  (KINETIS_DMAC_BASE+KINETIS_DMA_CDNE_OFFSET)
+#define KINETIS_DMA_SSRT                  (KINETIS_DMAC_BASE+KINETIS_DMA_SSRT_OFFSET)
+#define KINETIS_DMA_CERR                  (KINETIS_DMAC_BASE+KINETIS_DMA_CERR_OFFSET)
+#define KINETIS_DMA_CINT                  (KINETIS_DMAC_BASE+KINETIS_DMA_CINT_OFFSET)
+#define KINETIS_DMA_INT                   (KINETIS_DMAC_BASE+KINETIS_DMA_INT_OFFSET)
+#define KINETIS_DMA_ERR                   (KINETIS_DMAC_BASE+KINETIS_DMA_ERR_OFFSET)
+#define KINETIS_DMA_HRS                   (KINETIS_DMAC_BASE+KINETIS_DMA_HRS_OFFSET)
+
+#define KINETIS_DMA_DCHPRI3               (KINETIS_DMAC_BASE+KINETIS_DMA_DCHPRI3_OFFSET)
+#define KINETIS_DMA_DCHPRI2               (KINETIS_DMAC_BASE+KINETIS_DMA_DCHPRI2_OFFSET)
+#define KINETIS_DMA_DCHPRI1               (KINETIS_DMAC_BASE+KINETIS_DMA_DCHPRI1_OFFSET)
+#define KINETIS_DMA_DCHPRI0               (KINETIS_DMAC_BASE+KINETIS_DMA_DCHPRI0_OFFSET)
+#define KINETIS_DMA_DCHPRI7               (KINETIS_DMAC_BASE+KINETIS_DMA_DCHPRI7_OFFSET)
+#define KINETIS_DMA_DCHPRI6               (KINETIS_DMAC_BASE+KINETIS_DMA_DCHPRI6_OFFSET)
+#define KINETIS_DMA_DCHPRI5               (KINETIS_DMAC_BASE+KINETIS_DMA_DCHPRI5_OFFSET)
+#define KINETIS_DMA_DCHPRI4               (KINETIS_DMAC_BASE+KINETIS_DMA_DCHPRI4_OFFSET)
+#define KINETIS_DMA_DCHPRI11              (KINETIS_DMAC_BASE+KINETIS_DMA_DCHPRI11_OFFSET)
+#define KINETIS_DMA_DCHPRI10              (KINETIS_DMAC_BASE+KINETIS_DMA_DCHPRI10_OFFSET)
+#define KINETIS_DMA_DCHPRI9               (KINETIS_DMAC_BASE+KINETIS_DMA_DCHPRI9_OFFSET)
+#define KINETIS_DMA_DCHPRI8               (KINETIS_DMAC_BASE+KINETIS_DMA_DCHPRI8_OFFSET)
+#define KINETIS_DMA_DCHPRI15              (KINETIS_DMAC_BASE+KINETIS_DMA_DCHPRI15_OFFSET)
+#define KINETIS_DMA_DCHPRI14              (KINETIS_DMAC_BASE+KINETIS_DMA_DCHPRI14_OFFSET)
+#define KINETIS_DMA_DCHPRI13              (KINETIS_DMAC_BASE+KINETIS_DMA_DCHPRI13_OFFSET)
+#define KINETIS_DMA_DCHPRI12              (KINETIS_DMAC_BASE+KINETIS_DMA_DCHPRI12_OFFSET)
+
+#define KINETIS_DMA_TCD_BASE(n)           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD_OFFSET(n))
+
+#define KINETIS_DMA_TCD_SADDR(n)          (KINETIS_DMA_TCD_BASE(n)+KINETIS_DMA_TCD_SADDR_OFFSET)
+#define KINETIS_DMA_TCD_SOFF(n)           (KINETIS_DMA_TCD_BASE(n)+KINETIS_DMA_TCD_SOFF_OFFSET)
+#define KINETIS_DMA_TCD_ATTR(n)           (KINETIS_DMA_TCD_BASE(n)+KINETIS_DMA_TCD_ATTR_OFFSET)
+#define KINETIS_DMA_TCD_NBYTES(n)         (KINETIS_DMA_TCD_BASE(n)+KINETIS_DMA_TCD_NBYTES_OFFSET)
+#define KINETIS_DMA_TCD_SLAST(n)          (KINETIS_DMA_TCD_BASE(n)+KINETIS_DMA_TCD_SLAST_OFFSET)
+#define KINETIS_DMA_TCD_DADDR(n)          (KINETIS_DMA_TCD_BASE(n)+KINETIS_DMA_TCD_DADDR_OFFSET)
+#define KINETIS_DMA_TCD_DOFF(n)           (KINETIS_DMA_TCD_BASE(n)+KINETIS_DMA_TCD_DOFF_OFFSET)
+#define KINETIS_DMA_TCD_CITER(n)          (KINETIS_DMA_TCD_BASE(n)+KINETIS_DMA_TCD_CITER_OFFSET)
+#define KINETIS_DMA_TCD_DLASTSGA(n)       (KINETIS_DMA_TCD_BASE(n)+KINETIS_DMA_TCD_DLASTSGA_OFFSET)
+#define KINETIS_DMA_TCD_CSR(n)            (KINETIS_DMA_TCD_BASE(n)+KINETIS_DMA_TCD_CSR_OFFSET)
+#define KINETIS_DMA_TCD_BITER(n)          (KINETIS_DMA_TCD_BASE(n)+KINETIS_DMA_TCD_BITER_OFFSET)
+
+#define KINETIS_DMA_TCD0_SADDR            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD0_SADDR_OFFSET)
+#define KINETIS_DMA_TCD0_SOFF             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD0_SOFF_OFFSET)
+#define KINETIS_DMA_TCD0_ATTR             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD0_ATTR_OFFSET)
+#define KINETIS_DMA_TCD0_NBYTES           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD0_NBYTES_OFFSET)
+#define KINETIS_DMA_TCD0_SLAST            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD0_SLAST_OFFSET)
+#define KINETIS_DMA_TCD0_DADDR            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD0_DADDR_OFFSET)
+#define KINETIS_DMA_TCD0_DOFF             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD0_DOFF_OFFSET)
+#define KINETIS_DMA_TCD0_CITER            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD0_CITER_OFFSET)
+#define KINETIS_DMA_TCD0_DLASTSGA         (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD0_DLASTSGA_OFFSET)
+#define KINETIS_DMA_TCD0_CSR              (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD0_CSR_OFFSET)
+#define KINETIS_DMA_TCD0_BITER            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD0_BITER_OFFSET)
+
+#define KINETIS_DMA_TCD1_SADDR            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD1_SADDR_OFFSET)
+#define KINETIS_DMA_TCD1_SOFF             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD1_SOFF_OFFSET)
+#define KINETIS_DMA_TCD1_ATTR             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD1_ATTR_OFFSET)
+#define KINETIS_DMA_TCD1_NBYTES           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD1_NBYTES_OFFSET)
+#define KINETIS_DMA_TCD1_SLAST            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD1_SLAST_OFFSET)
+#define KINETIS_DMA_TCD1_DADDR            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD1_DADDR_OFFSET)
+#define KINETIS_DMA_TCD1_DOFF             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD1_DOFF_OFFSET)
+#define KINETIS_DMA_TCD1_CITER            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD1_CITER_OFFSET)
+#define KINETIS_DMA_TCD1_DLASTSGA         (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD1_DLASTSGA_OFFSET)
+#define KINETIS_DMA_TCD1_CSR              (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD1_CSR_OFFSET)
+#define KINETIS_DMA_TCD1_BITER            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD1_BITER_OFFSET)
+
+#define KINETIS_DMA_TCD2_SADDR            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD2_SADDR_OFFSET)
+#define KINETIS_DMA_TCD2_SOFF             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD2_SOFF_OFFSET)
+#define KINETIS_DMA_TCD2_ATTR             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD2_ATTR_OFFSET)
+#define KINETIS_DMA_TCD2_NBYTES           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD2_NBYTES_OFFSET)
+#define KINETIS_DMA_TCD2_SLAST            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD2_SLAST_OFFSET)
+#define KINETIS_DMA_TCD2_DADDR            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD2_DADDR_OFFSET)
+#define KINETIS_DMA_TCD2_DOFF             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD2_DOFF_OFFSET)
+#define KINETIS_DMA_TCD2_CITER            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD2_CITER_OFFSET)
+#define KINETIS_DMA_TCD2_DLASTSGA         (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD2_DLASTSGA_OFFSET)
+#define KINETIS_DMA_TCD2_CSR_             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD2_CSR_OFFSET)
+#define KINETIS_DMA_TCD2_BITER            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD2_BITER_OFFSET)
+
+#define KINETIS_DMA_TCD3_SADDR            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD3_SADDR_OFFSET)
+#define KINETIS_DMA_TCD3_SOFF             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD3_SOFF_OFFSET)
+#define KINETIS_DMA_TCD3_ATTR             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD3_ATTR_OFFSET)
+#define KINETIS_DMA_TCD3_NBYTES           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD3_NBYTES_OFFSET)
+#define KINETIS_DMA_TCD3_SLAST            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD3_SLAST_OFFSET)
+#define KINETIS_DMA_TCD3_DADDR            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD3_DADDR_OFFSET)
+#define KINETIS_DMA_TCD3_DOFF             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD3_DOFF_OFFSET)
+#define KINETIS_DMA_TCD3_CITER            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD3_CITER_OFFSET)
+#define KINETIS_DMA_TCD3_DLASTSGA         (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD3_DLASTSGA_OFFSET
+#define KINETIS_DMA_TCD3_CSR              (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD3_CSR_OFFSET)
+#define KINETIS_DMA_TCD3_BITER            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD3_BITER_OFFSET)
+
+#define KINETIS_DMA_TCD4_SADDR            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD4_SADDR_OFFSET)
+#define KINETIS_DMA_TCD4_SOFF             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD4_SOFF_OFFSET)
+#define KINETIS_DMA_TCD4_ATTR             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD4_ATTR_OFFSET0)
+#define KINETIS_DMA_TCD4_NBYTES           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD4_NBYTES_OFFSET)
+#define KINETIS_DMA_TCD4_SLAST            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD4_SLAST_OFFSET)
+#define KINETIS_DMA_TCD4_DADDR            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD4_DADDR_OFFSET)
+#define KINETIS_DMA_TCD4_DOFF             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD4_DOFF_OFFSET)
+#define KINETIS_DMA_TCD4_CITER            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD4_CITER_OFFSET)
+#define KINETIS_DMA_TCD4_DLASTSGA         (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD4_DLASTSGA_OFFSET)
+#define KINETIS_DMA_TCD4_CSR              (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD4_CSR_OFFSET)
+#define KINETIS_DMA_TCD4_BITER            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD4_BITER_OFFSET)
+
+#define KINETIS_DMA_TCD5_SADDR            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD5_SADDR_OFFSET)
+#define KINETIS_DMA_TCD5_SOFF             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD5_SOFF_OFFSET)
+#define KINETIS_DMA_TCD5_ATTR             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD5_ATTR_OFFSET)
+#define KINETIS_DMA_TCD5_NBYTES           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD5_NBYTES_OFFSET)
+#define KINETIS_DMA_TCD5_SLAST            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD5_SLAST_OFFSET)
+#define KINETIS_DMA_TCD5_DADDR            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD5_DADDR_OFFSET)
+#define KINETIS_DMA_TCD5_DOFF             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD5_DOFF_OFFSET)
+#define KINETIS_DMA_TCD5_CITER            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD5_CITER_OFFSET)
+#define KINETIS_DMA_TCD5_DLASTSGA         (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD5_DLASTSGA_OFFSET)
+#define KINETIS_DMA_TCD5_CSR              (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD5_CSR_OFFSET)
+#define KINETIS_DMA_TCD5_BITER            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD5_BITER_OFFSET)
+
+#define KINETIS_DMA_TCD6_SADDR            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD6_SADDR_OFFSET)
+#define KINETIS_DMA_TCD6_SOFF             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD6_SOFF_OFFSET)
+#define KINETIS_DMA_TCD6_ATTR             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD6_ATTR_OFFSET)
+#define KINETIS_DMA_TCD6_NBYTES           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD6_NBYTES_OFFSET)
+#define KINETIS_DMA_TCD6_SLAST            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD6_SLAST_OFFSET)
+#define KINETIS_DMA_TCD6_DADDR            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD6_DADDR_OFFSET)
+#define KINETIS_DMA_TCD6_DOFF             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD6_DOFF_OFFSET)
+#define KINETIS_DMA_TCD6_CITER            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD6_CITER_OFFSET)
+#define KINETIS_DMA_TCD6_DLASTSGA         (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD6_DLASTSGA_OFFSET)
+#define KINETIS_DMA_TCD6_CSR              (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD6_CSR_OFFSET)
+#define KINETIS_DMA_TCD6_BITER            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD6_BITER_OFFSET)
+
+#define KINETIS_DMA_TCD7_SADDR            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD7_SADDR_OFFSET)
+#define KINETIS_DMA_TCD7_SOFF             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD7_SOFF_OFFSET)
+#define KINETIS_DMA_TCD7_ATTR             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD7_ATTR_OFFSET)
+#define KINETIS_DMA_TCD7_NBYTES           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD7_NBYTES_OFFSET)
+#define KINETIS_DMA_TCD7_SLAST            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD7_SLAST_OFFSET)
+#define KINETIS_DMA_TCD7_DADDR            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD7_DADDR_OFFSET)
+#define KINETIS_DMA_TCD7_DOFF             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD7_DOFF_OFFSET)
+#define KINETIS_DMA_TCD7_CITER            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD7_CITER_OFFSET)
+#define KINETIS_DMA_TCD7_DLASTSGA_        (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD7_DLASTSGA_OFFSET)
+#define KINETIS_DMA_TCD7_CSR              (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD7_CSR_OFFSET)
+#define KINETIS_DMA_TCD7_BITER            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD7_BITER_OFFSET)
+
+#define KINETIS_DMA_TCD8_SADDR            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD8_SADDR_OFFSET)
+#define KINETIS_DMA_TCD8_SOFF             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD8_SOFF_OFFSET)
+#define KINETIS_DMA_TCD8_ATTR             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD8_ATTR_OFFSET)
+#define KINETIS_DMA_TCD8_NBYTES           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD8_NBYTES_OFFSET)
+#define KINETIS_DMA_TCD8_SLAST            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD8_SLAST_OFFSET)
+#define KINETIS_DMA_TCD8_DADDR            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD8_DADDR_OFFSET)
+#define KINETIS_DMA_TCD8_DOFF             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD8_DOFF_OFFSET)
+#define KINETIS_DMA_TCD8_CITER            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD8_CITER_OFFSET)
+#define KINETIS_DMA_TCD8_DLASTSGA         (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD8_DLASTSGA_OFFSET)
+#define KINETIS_DMA_TCD8_CSR              (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD8_CSR_OFFSET)
+#define KINETIS_DMA_TCD8_BITER            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD8_BITER_OFFSET)
+
+#define KINETIS_DMA_TCD9_SADDR            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD9_SADDR_OFFSET)
+#define KINETIS_DMA_TCD9_SOFF             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD9_SOFF_OFFSET)
+#define KINETIS_DMA_TCD9_ATTR             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD9_ATTR_OFFSET)
+#define KINETIS_DMA_TCD9_NBYTES           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD9_NBYTES_OFFSET)
+#define KINETIS_DMA_TCD9_SLAST            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD9_SLAST_OFFSET)
+#define KINETIS_DMA_TCD9_DADDR            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD9_DADDR_OFFSET)
+#define KINETIS_DMA_TCD9_DOFF             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD9_DOFF_OFFSET)
+#define KINETIS_DMA_TCD9_CITER            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD9_CITER_OFFSET)
+#define KINETIS_DMA_TCD9_DLASTSGA         (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD9_DLASTSGA_OFFSET)
+#define KINETIS_DMA_TCD9_CSR              (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD9_CSR_OFFSET)
+#define KINETIS_DMA_TCD9_BITER            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD9_BITER_OFFSET)
+
+#define KINETIS_DMA_TCD10_SADDR           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD10_SADDR_OFFSET)
+#define KINETIS_DMA_TCD10_SOFF            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD10_SOFF_OFFSET)
+#define KINETIS_DMA_TCD10_ATTR            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD10_ATTR_OFFSET)
+#define KINETIS_DMA_TCD10_NBYTES          (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD10_NBYTES_OFFSET)
+#define KINETIS_DMA_TCD10_SLAST           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD10_SLAST_OFFSET)
+#define KINETIS_DMA_TCD10_DADDR           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD10_DADDR_OFFSET)
+#define KINETIS_DMA_TCD10_DOFF            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD10_DOFF_OFFSET)
+#define KINETIS_DMA_TCD10_CITER           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD10_CITER_OFFSET)
+#define KINETIS_DMA_TCD10_DLASTSGA        (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD10_DLASTSGA_OFFSET)
+#define KINETIS_DMA_TCD10_CSR             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD10_CSR_OFFSET)
+#define KINETIS_DMA_TCD10_BITER           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD10_BITER_OFFSET)
+
+#define KINETIS_DMA_TCD11_SADDR           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD11_SADDR_OFFSET)
+#define KINETIS_DMA_TCD11_SOFF            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD11_SOFF_OFFSET)
+#define KINETIS_DMA_TCD11_ATTR            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD11_ATTR_OFFSET)
+#define KINETIS_DMA_TCD11_NBYTES          (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD11_NBYTES_OFFSET)
+#define KINETIS_DMA_TCD11_SLAST           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD11_SLAST_OFFSET)
+#define KINETIS_DMA_TCD11_DADDR           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD11_DADDR_OFFSET)
+#define KINETIS_DMA_TCD11_DOFF            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD11_DOFF_OFFSET)
+#define KINETIS_DMA_TCD11_CITER           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD11_CITER_OFFSET)
+#define KINETIS_DMA_TCD11_DLASTSGA        (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD11_DLASTSGA_OFFSET)
+#define KINETIS_DMA_TCD11_CSR             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD11_CSR_OFFSET)
+#define KINETIS_DMA_TCD11_BITER           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD11_BITER_OFFSET)
+
+#define KINETIS_DMA_TCD12_SADDR           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD12_SADDR_OFFSET)
+#define KINETIS_DMA_TCD12_SOFF            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD12_SOFF_OFFSET)
+#define KINETIS_DMA_TCD12_ATTR            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD12_ATTR_OFFSET)
+#define KINETIS_DMA_TCD12_NBYTES          (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD12_NBYTES_OFFSET)
+#define KINETIS_DMA_TCD12_SLAST           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD12_SLAST_OFFSET)
+#define KINETIS_DMA_TCD12_DADDR           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD12_DADDR_OFFSET)
+#define KINETIS_DMA_TCD12_DOFF            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD12_DOFF_OFFSET)
+#define KINETIS_DMA_TCD12_CITER           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD12_CITER_OFFSET)
+#define KINETIS_DMA_TCD12_DLASTSGA        (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD12_DLASTSGA_OFFSET)
+#define KINETIS_DMA_TCD12_CSR             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD12_CSR_OFFSET)
+#define KINETIS_DMA_TCD12_BITER           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD12_BITER_OFFSET)
+
+#define KINETIS_DMA_TCD13_SADDR           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD13_SADDR_OFFSET)
+#define KINETIS_DMA_TCD13_SOFF            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD13_SOFF_OFFSET)
+#define KINETIS_DMA_TCD13_ATTR            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD13_ATTR_OFFSET)
+#define KINETIS_DMA_TCD13_NBYTES          (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD13_NBYTES_OFFSET)
+#define KINETIS_DMA_TCD13_SLAST           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD13_SLAST_OFFSET)
+#define KINETIS_DMA_TCD13_DADDR           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD13_DADDR_OFFSET)
+#define KINETIS_DMA_TCD13_DOFF            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD13_DOFF_OFFSET)
+#define KINETIS_DMA_TCD13_CITER           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD13_CITER_OFFSET)
+#define KINETIS_DMA_TCD13_DLASTSGA        (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD13_DLASTSGA_OFFSET)
+#define KINETIS_DMA_TCD13_CSR             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD13_CSR_OFFSET)
+#define KINETIS_DMA_TCD13_BITER           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD13_BITER_OFFSET)
+
+#define KINETIS_DMA_TCD14_SADDR           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD14_SADDR_OFFSET)
+#define KINETIS_DMA_TCD14_SOFF            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD14_SOFF_OFFSET)
+#define KINETIS_DMA_TCD14_ATTR            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD14_ATTR_OFFSET)
+#define KINETIS_DMA_TCD14_NBYTES          (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD14_NBYTES_OFFSET)
+#define KINETIS_DMA_TCD14_SLAST           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD14_SLAST_OFFSET)
+#define KINETIS_DMA_TCD14_DADDR           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD14_DADDR_OFFSET)
+#define KINETIS_DMA_TCD14_DOFF            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD14_DOFF_OFFSET)
+#define KINETIS_DMA_TCD14_CITER           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD14_CITER_OFFSET)
+#define KINETIS_DMA_TCD14_DLASTSGA        (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD14_DLASTSGA_OFFSET)
+#define KINETIS_DMA_TCD14_CSR             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD14_CSR_OFFSET)
+#define KINETIS_DMA_TCD14_BITER           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD14_BITER_OFFSET)
+
+#define KINETIS_DMA_TCD15_SADDR           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD15_SADDR_OFFSET)
+#define KINETIS_DMA_TCD15_SOFF            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD15_SOFF_OFFSET)
+#define KINETIS_DMA_TCD15_ATTR            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD15_ATTR_OFFSET)
+#define KINETIS_DMA_TCD15_NBYTES          (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD15_NBYTES_OFFSET)
+#define KINETIS_DMA_TCD15_SLAST           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD15_SLAST_OFFSET)
+#define KINETIS_DMA_TCD15_DADDR           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD15_DADDR_OFFSET)
+#define KINETIS_DMA_TCD15_DOFF            (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD15_DOFF_OFFSET)
+#define KINETIS_DMA_TCD15_CITER           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD15_CITER_OFFSET)
+#define KINETIS_DMA_TCD15_DLASTSGA        (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD15_DLASTSGA_OFFSET)
+#define KINETIS_DMA_TCD15_CSR             (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD15_CSR_OFFSET)
+#define KINETIS_DMA_TCD15_BITER           (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD15_BITER_OFFSET)
+
+/* Register Bit Definitions *************************************************************************/
+
+/* Control Register */
+#define DMA_CR_
+/* Error Status Register */
+#define DMA_ES_
+/* Enable Request Register */
+#define DMA_ERQ_
+/* Enable Error Interrupt Register */
+#define DMA_EEI_
+/* Clear Enable Error Interrupt Register */
+#define DMA_CEEI_
+/* Set Enable Error Interrupt Register */
+#define DMA_SEEI_
+/* Clear Enable Request Register */
+#define DMA_CERQ_
+/* Set Enable Request Register */
+#define DMA_SERQ_
+/* Clear DONE Status Bit Register */
+#define DMA_CDNE_
+/* Set START Bit Register */
+#define DMA_SSRT_
+/* Clear Error Register */
+#define DMA_CERR_
+/* Clear Interrupt Request Register */
+#define DMA_CINT_
+/* Interrupt Request Register */
+#define DMA_INT_
+/* Error Register */
+#define DMA_ERR_
+/* Hardware Request Status Register */
+#define DMA_HRS_
+/* Channel n Priority Register */
+#define DMA_DCHPRI_
+
+/* TCD Source Address */
+#define DMA_TCD_SADDR_
+/* TCD Signed Source Address Offset */
+#define DMA_TCD_SOFF_
+/* TCD Transfer Attributes */
+#define DMA_TCD_ATTR_
+/* TCD Minor Byte Count */
+#define DMA_TCD_NBYTES_
+/* TCD Last Source Address Adjustment */
+#define DMA_TCD_SLAST_
+/* TCD Destination Address */
+#define DMA_TCD_DADDR_
+/* TCD Signed Destination Address Offset */
+#define DMA_TCD_DOFF_
+/* TCD Current Minor Loop Link, Major Loop Count */
+#define DMA_TCD_CITER_
+/* TCD Last Destination Address Adjustment/Scatter Gather Address */
+#define DMA_TCD_DLASTSGA_
+/* TCD Control and Status */
+#define DMA_TCD_CSR_
+ /* TCD Beginning Minor Loop Link, Major Loop Count */
+#define DMA_TCD_BITER_
+
+
+                (1 << nn)  /* Bit nn:  
+_SHIFT          (nn)       /* Bits nn-nn: 
+_MASK           (nn << nn)
+
+/****************************************************************************************************
+ * Public Types
+ ****************************************************************************************************/
+
+/****************************************************************************************************
+ * Public Data
+ ****************************************************************************************************/
+
+/****************************************************************************************************
+ * Public Functions
+ ****************************************************************************************************/
+
+#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_DMA_H */
diff --git a/nuttx/arch/arm/src/kinetis/kinetis_dmamux.h b/nuttx/arch/arm/src/kinetis/kinetis_dmamux.h
new file mode 100644
index 000000000..0db25305d
--- /dev/null
+++ b/nuttx/arch/arm/src/kinetis/kinetis_dmamux.h
@@ -0,0 +1,111 @@
+/********************************************************************************************
+ * arch/arm/src/kinetis/kinetis_dmamux.h
+ *
+ *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ********************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_DMAMUX_H
+#define __ARCH_ARM_SRC_KINETIS_KINETIS_DMAMUX_H
+
+/********************************************************************************************
+ * Included Files
+ ********************************************************************************************/
+
+#include <nuttx/config.h>
+
+#include "chip.h"
+
+/********************************************************************************************
+ * Pre-processor Definitions
+ ********************************************************************************************/
+
+/* Register Offsets *************************************************************************/
+
+#define KINETIS_DMAMUX_CHCFG_OFFSET(n)  (n)    /* Channel n Configuration Register */
+#define KINETIS_DMAMUX_CHCFG0_OFFSET    0x0000 /* Channel 0 Configuration Register */
+#define KINETIS_DMAMUX_CHCFG1_OFFSET    0x0001 /* Channel 1 Configuration Register */
+#define KINETIS_DMAMUX_CHCFG2_OFFSET    0x0002 /* Channel 2 Configuration Register */
+#define KINETIS_DMAMUX_CHCFG3_OFFSET    0x0003 /* Channel 3 Configuration Register */
+#define KINETIS_DMAMUX_CHCFG4_OFFSET    0x0004 /* Channel 4 Configuration Register */
+#define KINETIS_DMAMUX_CHCFG5_OFFSET    0x0005 /* Channel 5 Configuration Register */
+#define KINETIS_DMAMUX_CHCFG6_OFFSET    0x0006 /* Channel 6 Configuration Register */
+#define KINETIS_DMAMUX_CHCFG7_OFFSET    0x0007 /* Channel 7 Configuration Register */
+#define KINETIS_DMAMUX_CHCFG8_OFFSET    0x0008 /* Channel 8 Configuration Register */
+#define KINETIS_DMAMUX_CHCFG9_OFFSET    0x0009 /* Channel 9 Configuration Register */
+#define KINETIS_DMAMUX_CHCFG10_OFFSET   0x000a /* Channel 10 Configuration Register */
+#define KINETIS_DMAMUX_CHCFG11_OFFSET   0x000b /* Channel 11 Configuration Register */
+#define KINETIS_DMAMUX_CHCFG12_OFFSET   0x000c /* Channel 12 Configuration Register */
+#define KINETIS_DMAMUX_CHCFG13_OFFSET   0x000d /* Channel 13 Configuration Register */
+#define KINETIS_DMAMUX_CHCFG14_OFFSET   0x000e /* Channel 14 Configuration Register */
+#define KINETIS_DMAMUX_CHCFG15_OFFSET   0x000f /* Channel 15 Configuration Register */
+
+/* Register Addresses ***********************************************************************/
+
+#define KINETIS_DMAMUX_CHCFG(n)         (KINETIS_DMAMUX0_BASE+KINETIS_DMAMUX_CHCFG_OFFSET(n))
+#define KINETIS_DMAMUX_CHCFG0           (KINETIS_DMAMUX0_BASE+KINETIS_DMAMUX_CHCFG0_OFFSET)
+#define KINETIS_DMAMUX_CHCFG1           (KINETIS_DMAMUX0_BASE+KINETIS_DMAMUX_CHCFG1_OFFSET)
+#define KINETIS_DMAMUX_CHCFG2           (KINETIS_DMAMUX0_BASE+KINETIS_DMAMUX_CHCFG2_OFFSET)
+#define KINETIS_DMAMUX_CHCFG3           (KINETIS_DMAMUX0_BASE+KINETIS_DMAMUX_CHCFG3_OFFSET)
+#define KINETIS_DMAMUX_CHCFG4           (KINETIS_DMAMUX0_BASE+KINETIS_DMAMUX_CHCFG4_OFFSET)
+#define KINETIS_DMAMUX_CHCFG5           (KINETIS_DMAMUX0_BASE+KINETIS_DMAMUX_CHCFG5_OFFSET)
+#define KINETIS_DMAMUX_CHCFG6           (KINETIS_DMAMUX0_BASE+KINETIS_DMAMUX_CHCFG6_OFFSET)
+#define KINETIS_DMAMUX_CHCFG7           (KINETIS_DMAMUX0_BASE+KINETIS_DMAMUX_CHCFG7_OFFSET)
+#define KINETIS_DMAMUX_CHCFG8           (KINETIS_DMAMUX0_BASE+KINETIS_DMAMUX_CHCFG8_OFFSET)
+#define KINETIS_DMAMUX_CHCFG9           (KINETIS_DMAMUX0_BASE+KINETIS_DMAMUX_CHCFG9_OFFSET)
+#define KINETIS_DMAMUX_CHCFG10          (KINETIS_DMAMUX0_BASE+KINETIS_DMAMUX_CHCFG10_OFFSET)
+#define KINETIS_DMAMUX_CHCFG11          (KINETIS_DMAMUX0_BASE+KINETIS_DMAMUX_CHCFG11_OFFSET)
+#define KINETIS_DMAMUX_CHCFG12          (KINETIS_DMAMUX0_BASE+KINETIS_DMAMUX_CHCFG12_OFFSET)
+#define KINETIS_DMAMUX_CHCFG13          (KINETIS_DMAMUX0_BASE+KINETIS_DMAMUX_CHCFG13_OFFSET)
+#define KINETIS_DMAMUX_CHCFG14          (KINETIS_DMAMUX0_BASE+KINETIS_DMAMUX_CHCFG14_OFFSET)
+#define KINETIS_DMAMUX_CHCFG15          (KINETIS_DMAMUX0_BASE+KINETIS_DMAMUX_CHCFG15_OFFSET)
+
+/* Register Bit Definitions *****************************************************************/
+/* Channel n Configuration Register */
+
+#define DMAMUX_CHCFG_SOURCE_SHIFT       (0)       /* Bits 0-5: DMA Channel Source (slot) */
+#define DMAMUX_CHCFG_SOURCE_MASK        (63 << DMAMUX_CHCFG_SOURCE_SHIFT)
+#define DMAMUX_CHCFG_TRIG               (1 << 6)  /* Bit 6:  DMA Channel Trigger Enable */
+#define DMAMUX_CHCFG_ENBL               (1 << 7)  /* Bit 7:  DMA Channel Enable */
+
+/********************************************************************************************
+ * Public Types
+ ********************************************************************************************/
+
+/********************************************************************************************
+ * Public Data
+ ********************************************************************************************/
+
+/********************************************************************************************
+ * Public Functions
+ ********************************************************************************************/
+
+#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_DMAMUX_H */