Cosmetic

git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3499 42af7a65-404d-4744-a932-0658087f49c3

4 files changed, 27 insertions, 3 deletions

diff --git a/nuttx/ChangeLog b/nuttx/ChangeLog
index b5e54083d..c4222df07 100644
--- a/nuttx/ChangeLog
+++ b/nuttx/ChangeLog
@@ -1685,4 +1685,7 @@
 		} >sram
 		+  __exidx_end = ABSOLUTE(.);
 
+	* arch/arm/src/lpc17xx: Correct some typos/bugs in configuration of LPC17xx
+	  UART2 and UART3.
+
 
diff --git a/nuttx/arch/arm/include/lpc17xx/irq.h b/nuttx/arch/arm/include/lpc17xx/irq.h
index 7807e0260..aebdc3159 100755
--- a/nuttx/arch/arm/include/lpc17xx/irq.h
+++ b/nuttx/arch/arm/include/lpc17xx/irq.h
@@ -115,7 +115,7 @@
 #define LPC17_IRQ_I2C0          (LPC17_IRQ_EXTINT+10) /* I2C0 SI (state change) */
 #define LPC17_IRQ_I2C1          (LPC17_IRQ_EXTINT+11) /* I2C1 SI (state change) */
 #define LPC17_IRQ_I2C2          (LPC17_IRQ_EXTINT+12) /* I2C2 SI (state change) */
-#define LPC17_IRQ_SPIF           (LPC17_IRQ_EXTINT+13) /* SPI SPI Interrupt Flag (SPIF)
+#define LPC17_IRQ_SPIF          (LPC17_IRQ_EXTINT+13) /* SPI SPI Interrupt Flag (SPIF)
                                                        * Mode Fault (MODF) */
 #define LPC17_IRQ_SSP0          (LPC17_IRQ_EXTINT+14) /* SSP0 Tx FIFO half empty of SSP0
                                                        * Rx FIFO half full of SSP0
diff --git a/nuttx/arch/arm/src/lpc17xx/lpc17_serial.c b/nuttx/arch/arm/src/lpc17xx/lpc17_serial.c
index f5c20aca6..146e985eb 100755
--- a/nuttx/arch/arm/src/lpc17xx/lpc17_serial.c
+++ b/nuttx/arch/arm/src/lpc17xx/lpc17_serial.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/lpc17xx/lpc17_serial.c
  *
- *   Copyright (C) 2010 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2010-2011 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
  *
  * Redistribution and use in source and binary forms, with or without
@@ -595,7 +595,7 @@ static inline uint32_t lpc17_uartcclkdiv(uint32_t baud)
 }
 
 /************************************************************************************
- * Name: lpc17_uart0config, uart1config, uart2config, nad uart3config
+ * Name: lpc17_uart0config, uart1config, uart2config, and uart3config
  *
  * Descrption:
  *   Configure the UART.  UART0/1/2/3 peripherals are configured using the following
@@ -1283,6 +1283,7 @@ void up_earlyserialinit(void)
 #endif
   up_disableuartint(&g_uart0priv, NULL);
 #endif
+
 #ifdef CONFIG_LPC17_UART1
   g_uart1priv.cclkdiv = lpc17_uartcclkdiv(CONFIG_UART1_BAUD);
 #ifndef CONFIG_UART1_SERIAL_CONSOLE
@@ -1290,6 +1291,7 @@ void up_earlyserialinit(void)
 #endif
   up_disableuartint(&g_uart1priv, NULL);
 #endif
+
 #ifdef CONFIG_LPC17_UART2
   g_uart2priv.cclkdiv = lpc17_uartcclkdiv(CONFIG_UART2_BAUD);
 #ifndef CONFIG_UART2_SERIAL_CONSOLE
@@ -1297,6 +1299,7 @@ void up_earlyserialinit(void)
 #endif
   up_disableuartint(&g_uart2priv, NULL);
 #endif
+
 #ifdef CONFIG_LPC17_UART3
   g_uart3priv.cclkdiv = lpc17_uartcclkdiv(CONFIG_UART3_BAUD);
 #ifndef CONFIG_UART3_SERIAL_CONSOLE
diff --git a/nuttx/configs/lpcxpresso-lpc1768/README.txt b/nuttx/configs/lpcxpresso-lpc1768/README.txt
index dfa875fa6..b3f3aa875 100755
--- a/nuttx/configs/lpcxpresso-lpc1768/README.txt
+++ b/nuttx/configs/lpcxpresso-lpc1768/README.txt
@@ -538,6 +538,24 @@ selected as follow:
 

 Where <subdir> is one of the following:

 

+  nsh:

+    Configures the NuttShell (nsh) located at examples/nsh.  The

+    Configuration enables both the serial and telnet NSH interfaces.

+    Support for the board's SPI-based MicroSD card is included

+    (but not passing tests as of this writing).

+

   ostest:

     This configuration directory, performs a simple OS test using

     examples/ostest.

+

+	NOTE: The OSTest runs on the LPCXpresso if it is not installed

+	on the base board (using an add-on MAX232 RS232 driver connected

+	to:

+

+      P0[0]/RD1/TXD3/SDA1  J6-9

+      P0[1]/TD1/RXD3/SCL   J6-10

+

+	I suspect that this test does not run on with the base board

+	attached because OSTest blasts out a lot of serial data and

+	overruns the FTDI chip before it has a chance to establish the

+	connection with the host.