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| author | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2013-02-13 15:19:47 +0000 |
|---|---|---|
| committer | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2013-02-13 15:19:47 +0000 |
| commit | d32f956730f3e4ffa9e244163f9646d9f6049305 (patch) | |
| tree | 4cf718863f27564207693b15a1339e25860db85f /nuttx/arch/arm/include/lpc17xx | |
| parent | 28cc69fa4a5d63a398a8f0ad485b95c4f373be42 (diff) | |
| download | px4-nuttx-d32f956730f3e4ffa9e244163f9646d9f6049305.tar.gz px4-nuttx-d32f956730f3e4ffa9e244163f9646d9f6049305.tar.bz2 px4-nuttx-d32f956730f3e4ffa9e244163f9646d9f6049305.zip | |
A few fixes for LPC1788 compilation (more needed)
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5649 42af7a65-404d-4744-a932-0658087f49c3
Diffstat (limited to 'nuttx/arch/arm/include/lpc17xx')
| -rw-r--r-- | nuttx/arch/arm/include/lpc17xx/chip.h | 36 |
1 files changed, 18 insertions, 18 deletions
diff --git a/nuttx/arch/arm/include/lpc17xx/chip.h b/nuttx/arch/arm/include/lpc17xx/chip.h index c22c6aa60..3880268c9 100644 --- a/nuttx/arch/arm/include/lpc17xx/chip.h +++ b/nuttx/arch/arm/include/lpc17xx/chip.h @@ -218,8 +218,8 @@ # undef LPC176x /* Not LPC175/6 family */ # define LPC178x 1 /* LPC177/8 family */ # define LPC17_FLASH_SIZE (128*1024) /* 128Kb */ -# define LPC17_SRAM_SIZE (32*1024) /* 32Kb */ -# define LPC17_CPUSRAM_SIZE (8*1024) +# define LPC17_SRAM_SIZE (40*1024) /* 40Kb */ +# define LPC17_CPUSRAM_SIZE (32*1024) # define LPC17_HAVE_BANK0 1 /* Have Peripheral SRAM bank 0 */ # undef LPC17_HAVE_BANK1 /* No Peripheral SRAM bank 1 */ # define LPC17_NETHCONTROLLERS 1 /* One Ethernet controller */ @@ -234,8 +234,8 @@ # undef LPC176x /* Not LPC175/6 family */ # define LPC178x 1 /* LPC177/8 family */ # define LPC17_FLASH_SIZE (128*1024) /* 128Kb */ -# define LPC17_SRAM_SIZE (32*1024) /* 32Kb */ -# define LPC17_CPUSRAM_SIZE (8*1024) +# define LPC17_SRAM_SIZE (40*1024) /* 40Kb */ +# define LPC17_CPUSRAM_SIZE (32*1024) # define LPC17_HAVE_BANK0 1 /* Have Peripheral SRAM bank 0*/ # undef LPC17_HAVE_BANK1 /* Have Peripheral SRAM bank 1 */ # define LPC17_NETHCONTROLLERS 1 /* One Ethernet controller */ @@ -250,8 +250,8 @@ # undef LPC176x /* Not LPC175/6 family */ # define LPC178x 1 /* LPC177/8 family */ # define LPC17_FLASH_SIZE (256*1024) /* 256Kb */ -# define LPC17_SRAM_SIZE (64*1024) /* 64Kb */ -# define LPC17_CPUSRAM_SIZE (16*1024) +# define LPC17_SRAM_SIZE (80*1024) /* 80Kb */ +# define LPC17_CPUSRAM_SIZE (64*1024) # define LPC17_HAVE_BANK0 1 /* Have Peripheral SRAM bank 0 */ # undef LPC17_HAVE_BANK1 /* Have Peripheral SRAM bank 1 */ # define LPC17_NETHCONTROLLERS 1 /* One Ethernet controller */ @@ -266,8 +266,8 @@ # undef LPC176x /* Not LPC175/6 family */ # define LPC178x 1 /* LPC177/8 family */ # define LPC17_FLASH_SIZE (512*1024) /* 512Kb */ -# define LPC17_SRAM_SIZE (64*1024) /* 64Kb */ -# define LPC17_CPUSRAM_SIZE (32*1024) +# define LPC17_SRAM_SIZE (96*1024) /* 96Kb */ +# define LPC17_CPUSRAM_SIZE (64*1024) # define LPC17_HAVE_BANK0 1 /* Have Peripheral SRAM bank 0 */ # define LPC17_HAVE_BANK1 1 /* Have Peripheral SRAM bank 1 */ # undef LPC17_NETHCONTROLLERS /* One Ethernet controller */ @@ -282,8 +282,8 @@ # undef LPC176x /* Not LPC175/6 family */ # define LPC178x 1 /* LPC177/8 family */ # define LPC17_FLASH_SIZE (512*1024) /* 512Kb */ -# define LPC17_SRAM_SIZE (64*1024) /* 64Kb */ -# define LPC17_CPUSRAM_SIZE (32*1024) +# define LPC17_SRAM_SIZE (96*1024) /* 64Kb */ +# define LPC17_CPUSRAM_SIZE (64*1024) # define LPC17_HAVE_BANK0 1 /* Have Peripheral SRAM bank 0 */ # define LPC17_HAVE_BANK1 1 /* Have Peripheral SRAM bank 1 */ # define LPC17_NETHCONTROLLERS 1 /* One Ethernet controller */ @@ -298,8 +298,8 @@ # undef LPC176x /* Not LPC175/6 family */ # define LPC178x 1 /* LPC177/8 family */ # define LPC17_FLASH_SIZE (256*1024) /* 256Kb */ -# define LPC17_SRAM_SIZE (64*1024) /* 64Kb */ -# define LPC17_CPUSRAM_SIZE (16*1024) +# define LPC17_SRAM_SIZE (80*1024) /* 80Kb */ +# define LPC17_CPUSRAM_SIZE (64*1024) # define LPC17_HAVE_BANK0 1 /* Have Peripheral SRAM bank 0 */ # undef LPC17_HAVE_BANK1 /* Have Peripheral SRAM bank 1 */ # undef LPC17_NETHCONTROLLERS /* One Ethernet controller */ @@ -314,8 +314,8 @@ # undef LPC176x /* Not LPC175/6 family */ # define LPC178x 1 /* LPC177/8 family */ # define LPC17_FLASH_SIZE (256*1024) /* 256Kb */ -# define LPC17_SRAM_SIZE (64*1024) /* 64Kb */ -# define LPC17_CPUSRAM_SIZE (16*1024) +# define LPC17_SRAM_SIZE (80*1024) /* 80Kb */ +# define LPC17_CPUSRAM_SIZE (64*1024) # define LPC17_HAVE_BANK0 1 /* Have Peripheral SRAM bank 0 */ # undef LPC17_HAVE_BANK1 /* Have Peripheral SRAM bank 1 */ # define LPC17_NETHCONTROLLERS 1 /* One Ethernet controller */ @@ -330,8 +330,8 @@ # undef LPC176x /* Not LPC175/6 family */ # define LPC178x 1 /* LPC177/8 family */ # define LPC17_FLASH_SIZE (512*1024) /* 512Kb */ -# define LPC17_SRAM_SIZE (64*1024) /* 64Kb */ -# define LPC17_CPUSRAM_SIZE (32*1024) +# define LPC17_SRAM_SIZE (96*1024) /* 96Kb */ +# define LPC17_CPUSRAM_SIZE (64*1024) # define LPC17_HAVE_BANK0 1 /* Have Peripheral SRAM bank 0 */ # define LPC17_HAVE_BANK1 1 /* Have Peripheral SRAM bank 1 */ # undef LPC17_NETHCONTROLLERS /* One Ethernet controller */ @@ -346,8 +346,8 @@ # undef LPC176x /* Not LPC175/6 family */ # define LPC178x 1 /* LPC177/8 family */ # define LPC17_FLASH_SIZE (512*1024) /* 512Kb */ -# define LPC17_SRAM_SIZE (64*1024) /* 64Kb */ -# define LPC17_CPUSRAM_SIZE (32*1024) +# define LPC17_SRAM_SIZE (96*1024) /* 96Kb */ +# define LPC17_CPUSRAM_SIZE (64*1024) # define LPC17_HAVE_BANK0 1 /* Have Peripheral SRAM bank 0 */ # define LPC17_HAVE_BANK1 1 /* Have Peripheral SRAM bank 1 */ # define LPC17_NETHCONTROLLERS 1 /* One Ethernet controller */ |