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| author | Gregory Nutt <gnutt@nuttx.org> | 2013-04-16 18:00:59 -0600 |
|---|---|---|
| committer | Gregory Nutt <gnutt@nuttx.org> | 2013-04-16 18:00:59 -0600 |
| commit | 9255670a9d9fab07e941008aa9e9edbf5b460c0b (patch) | |
| tree | f31c4ec2141db41f31b1de70af701d45b695e3a7 /nuttx/arch/arm/include/nuc1xx/chip.h | |
| parent | 82b1ed85155de4cac47551adb2363cc36b8806d0 (diff) | |
| download | px4-nuttx-9255670a9d9fab07e941008aa9e9edbf5b460c0b.tar.gz px4-nuttx-9255670a9d9fab07e941008aa9e9edbf5b460c0b.tar.bz2 px4-nuttx-9255670a9d9fab07e941008aa9e9edbf5b460c0b.zip | |
Fix major misthink in Cortex-M0 port: The Cortex-M0 has no BASEPRI register. We have to revert to using the nasty PRIMASK register
Diffstat (limited to 'nuttx/arch/arm/include/nuc1xx/chip.h')
| -rw-r--r-- | nuttx/arch/arm/include/nuc1xx/chip.h | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/nuttx/arch/arm/include/nuc1xx/chip.h b/nuttx/arch/arm/include/nuc1xx/chip.h index bfc018947..6a7e6e087 100644 --- a/nuttx/arch/arm/include/nuc1xx/chip.h +++ b/nuttx/arch/arm/include/nuc1xx/chip.h @@ -646,9 +646,6 @@ #define NVIC_SYSH_PRIORITY_MAX 0x00 /* Zero is maximum priority */ #define NVIC_SYSH_PRIORITY_STEP 0x40 /* Five bits of interrupt priority used */ -#define NVIC_SYSH_DISABLE_PRIORITY (NVIC_SYSH_PRIORITY_MAX + NVIC_SYSH_PRIORITY_STEP) -#define NVIC_SYSH_SVCALL_PRIORITY NVIC_SYSH_PRIORITY_MAX - /************************************************************************************ * Public Types ************************************************************************************/ |