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author | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2013-02-16 16:32:19 +0000 |
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committer | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2013-02-16 16:32:19 +0000 |
commit | b78eb3e4bbd9a44cb38e6cd5f7fdde4e22a183f4 (patch) | |
tree | 82e3a9b70e21bda79f4a26bf36dd755dcb4160a9 /nuttx/arch/arm/include/nuc1xx/irq.h | |
parent | 54c9fa75c9466f4676d12105dbf4026aeb92adb7 (diff) | |
download | px4-nuttx-b78eb3e4bbd9a44cb38e6cd5f7fdde4e22a183f4.tar.gz px4-nuttx-b78eb3e4bbd9a44cb38e6cd5f7fdde4e22a183f4.tar.bz2 px4-nuttx-b78eb3e4bbd9a44cb38e6cd5f7fdde4e22a183f4.zip |
First cut at support for Cortex-M0
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5655 42af7a65-404d-4744-a932-0658087f49c3
Diffstat (limited to 'nuttx/arch/arm/include/nuc1xx/irq.h')
-rw-r--r-- | nuttx/arch/arm/include/nuc1xx/irq.h | 108 |
1 files changed, 108 insertions, 0 deletions
diff --git a/nuttx/arch/arm/include/nuc1xx/irq.h b/nuttx/arch/arm/include/nuc1xx/irq.h new file mode 100644 index 000000000..fcea3e165 --- /dev/null +++ b/nuttx/arch/arm/include/nuc1xx/irq.h @@ -0,0 +1,108 @@ +/************************************************************************************ + * arch/arm/include/nuc1xx/irq.h + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt <gnutt@nuttx.org> + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/* This file should never be included directed but, rather, only indirectly through + * nuttx/irq.h + */ + +#ifndef __ARCH_ARM_INCLUDE_NUC1XX_IRQ_H +#define __ARCH_ARM_INCLUDE_NUC1XX_IRQ_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include <nuttx/config.h> + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* IRQ numbers. The IRQ number corresponds vector number and hence map directly to + * bits in the NVIC. This does, however, waste several words of memory in the IRQ + * to handle mapping tables. + */ + +/* Processor Exceptions (vectors 0-15) */ + +#define NUC_IRQ_RESERVED (0) /* Reserved vector (only used with CONFIG_DEBUG) */ + /* Vector 0: Reset stack pointer value */ + /* Vector 1: Reset (not handler as an IRQ) */ +#define NUC_IRQ_NMI (2) /* Vector 2: Non-Maskable Interrupt (NMI) */ +#define NUC_IRQ_HARDFAULT (3) /* Vector 3: Hard fault */ + /* Vector 4-10: Reserved */ +#define NUC_IRQ_SVCALL (11) /* Vector 11: SVC call */ + /* Vector 12-13: Reserved */ +#define NUC_IRQ_PENDSV (14) /* Vector 14: Pendable system service request */ +#define NUC_IRQ_SYSTICK (15) /* Vector 15: System tick */ + +/* External interrupts (vectors >= 16). These definitions are chip-specific */ + +#define NUC_IRQ_INTERRUPT (16) + +#if defined(CONFIG_ARCH_CHIP_NUC120) +# include <arch/nuc1xx/nuc120_irq.h> +#else +# error "Unrecognized NUC chip" +#endif + +/************************************************************************************ + * Public Types + ************************************************************************************/ + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ +#ifdef __cplusplus +#define EXTERN extern "C" +extern "C" { +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +#undef EXTERN +#ifdef __cplusplus +} +#endif +#endif /* __ASSEMBLY__ */ + +#endif /* __ARCH_ARM_INCLUDE_NUC1XX_IRQ_H */ + |