STM32F103C4 and F103C8 chip support from Laurent Latil

1 files changed, 64 insertions, 0 deletions

diff --git a/nuttx/arch/arm/include/stm32/chip.h b/nuttx/arch/arm/include/stm32/chip.h
index 0d49de5bb..5bf286d6b 100644
--- a/nuttx/arch/arm/include/stm32/chip.h
+++ b/nuttx/arch/arm/include/stm32/chip.h
@@ -445,6 +445,39 @@
 #  define STM32_NRNG                     0   /* No random number generator (RNG) */
 #  define STM32_NDCMI                    0   /* No digital camera interface (DCMI) */
 
+/* STM32 F103 Low Density Family *************************************************/
+
+/* STM32F103C4 & STM32F103C6 */
+#elif defined(CONFIG_ARCH_CHIP_STM32F103C4)
+#  define CONFIG_STM32_STM32F10XX        1   /* STM32F10xxx family */
+#  define CONFIG_STM32_LOWDENSITY        1   /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 16/32 Kbytes */
+#  undef  CONFIG_STM32_MEDIUMDENSITY         /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 64/128 Kbytes */
+#  undef  CONFIG_STM32_HIGHDENSITY           /* STM32F100x, STM32F101x, and STM32F103x w/ 256/512 Kbytes */
+#  undef  CONFIG_STM32_VALUELINE             /* STM32F100x */
+#  undef  CONFIG_STM32_CONNECTIVITYLINE      /* STM32F105x and STM32F107x */
+#  undef  CONFIG_STM32_STM32F20XX            /* STM32F205x and STM32F207x */
+#  undef  CONFIG_STM32_STM32F30XX           /* STM32F30xxx family */
+#  undef  CONFIG_STM32_STM32F40XX            /* STM32F405xx and STM32407xx families */
+#  define STM32_NFSMC                    0   /* FSMC */
+#  define STM32_NATIM                    1   /* One advanced timer TIM1 */
+#  define STM32_NGTIM                    2   /* General timers TIM2,3 */
+#  define STM32_NBTIM                    0   /* No basic timer */
+#  define STM32_NDMA                     1   /* DMA1 */
+#  define STM32_NSPI                     1   /* SPI1 */
+#  define STM32_NI2S                     0   /* No I2S */
+#  define STM32_NUSART                   2   /* USART1-2 */
+#  define STM32_NI2C                     1   /* I2C1 */
+#  define STM32_NCAN                     1   /* bxCAN1 */
+#  define STM32_NSDIO                    0   /* No SDIO */
+#  define STM32_NUSBOTG                  0   /* No USB OTG FS/HS */
+#  define STM32_NGPIO                    37  /* GPIOA-C */
+#  define STM32_NADC                     2   /* ADC1-2 */
+#  define STM32_NDAC                     0   /* No DAC */
+#  define STM32_NCRC                     1   /* CRC */
+#  define STM32_NTHERNET                 0   /* No ethernet */
+#  define STM32_NRNG                     0   /* No random number generator (RNG) */
+#  define STM32_NDCMI                    0   /* No digital camera interface (DCMI) */
+
 /* STM32 F103 Medium Density Family *************************************************/
 /* STM32F103RB is in the Medium-density performance line and is provided in 64 pin
  * packages with 128K Flash, USB, CAN, 7 timers, 2 ADCs, 9 com. interfaces
@@ -484,6 +517,37 @@
 #  define STM32_NRNG                     0   /* No random number generator (RNG) */
 #  define STM32_NDCMI                    0   /* No digital camera interface (DCMI) */
 
+/* STM32F103C8, STM32F103CB (Medium-density performance line and is provided in 48 pin package) */
+#elif defined(CONFIG_ARCH_CHIP_STM32F103C8)
+#  define CONFIG_STM32_STM32F10XX        1   /* STM32F10xxx family */
+#  undef  CONFIG_STM32_LOWDENSITY            /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 16/32 Kbytes */
+#  define CONFIG_STM32_MEDIUMDENSITY     1   /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 64/128 Kbytes */
+#  undef  CONFIG_STM32_HIGHDENSITY           /* STM32F100x, STM32F101x, and STM32F103x w/ 256/512 Kbytes */
+#  undef  CONFIG_STM32_VALUELINE             /* STM32F100x */
+#  undef  CONFIG_STM32_CONNECTIVITYLINE      /* STM32F105x and STM32F107x */
+#  undef  CONFIG_STM32_STM32F20XX            /* STM32F205x and STM32F207x */
+#  undef  CONFIG_STM32_STM32F30XX           /* STM32F30xxx family */
+#  undef  CONFIG_STM32_STM32F40XX            /* STM32F405xx and STM32407xx families */
+#  define STM32_NFSMC                    0   /* FSMC */
+#  define STM32_NATIM                    1   /* One advanced timer TIM1 */
+#  define STM32_NGTIM                    3   /* General timers TIM2,3,4 */
+#  define STM32_NBTIM                    0   /* No basic timer */
+#  define STM32_NDMA                     1   /* DMA1 */
+#  define STM32_NSPI                     2   /* SPI1-2 */
+#  define STM32_NI2S                     0   /* No I2S */
+#  define STM32_NUSART                   3   /* USART1-3 */
+#  define STM32_NI2C                     2   /* I2C1-2 */
+#  define STM32_NCAN                     1   /* bxCAN1 */
+#  define STM32_NSDIO                    0   /* No SDIO */
+#  define STM32_NUSBOTG                  0   /* No USB OTG FS/HS */
+#  define STM32_NGPIO                    37  /* GPIOA-C */
+#  define STM32_NADC                     2   /* ADC1-2 */
+#  define STM32_NDAC                     0   /* No DAC */
+#  define STM32_NCRC                     1   /* CRC */
+#  define STM32_NTHERNET                 0   /* No ethernet */
+#  define STM32_NRNG                     0   /* No random number generator (RNG) */
+#  define STM32_NDCMI                    0   /* No digital camera interface (DCMI) */
+
 /* STM32 F103 High Density Family ***************************************************/
 /* STM32F103RC, STM32F103RD, and STM32F103RE are all provided in 64 pin packages and
  * differ only in the available FLASH and SRAM.