diff options
| author | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2011-05-27 15:26:52 +0000 |
|---|---|---|
| committer | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2011-05-27 15:26:52 +0000 |
| commit | be85acd0f71ce088b4e1584e6ce485015288f63c (patch) | |
| tree | c282e67081fdd2164b636f646cb75909d1bc137e /nuttx/arch/arm/include | |
| parent | cfc63f3cffcdcb89261c4bfc065d5591f5b6b561 (diff) | |
| download | px4-nuttx-be85acd0f71ce088b4e1584e6ce485015288f63c.tar.gz px4-nuttx-be85acd0f71ce088b4e1584e6ce485015288f63c.tar.bz2 px4-nuttx-be85acd0f71ce088b4e1584e6ce485015288f63c.zip | |
Rename all lpc313x to lpc31xx
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3644 42af7a65-404d-4744-a932-0658087f49c3
Diffstat (limited to 'nuttx/arch/arm/include')
| -rwxr-xr-x | nuttx/arch/arm/include/lpc31xx/irq.h (renamed from nuttx/arch/arm/include/lpc313x/irq.h) | 74 |
1 files changed, 37 insertions, 37 deletions
diff --git a/nuttx/arch/arm/include/lpc313x/irq.h b/nuttx/arch/arm/include/lpc31xx/irq.h index d3879e1d2..7e11025bb 100755 --- a/nuttx/arch/arm/include/lpc313x/irq.h +++ b/nuttx/arch/arm/include/lpc31xx/irq.h @@ -1,7 +1,7 @@ /**************************************************************************** - * arch/arm/include/lpc313x/irq.h + * arch/arm/include/lpc31xx/irq.h * - * Copyright (C) 2009-2010 Gregory Nutt. All rights reserved. + * Copyright (C) 2009-2011 Gregory Nutt. All rights reserved. * Author: Gregory Nutt <spudmonkey@racsa.co.cr> * * Redistribution and use in source and binary forms, with or without @@ -37,8 +37,8 @@ * only indirectly through nuttx/irq.h */ -#ifndef __ARCH_ARM_INCLUDE_LPC313X_IRQ_H -#define __ARCH_ARM_INCLUDE_LPC313X_IRQ_H +#ifndef __ARCH_ARM_INCLUDE_LPC31XX_IRQ_H +#define __ARCH_ARM_INCLUDE_LPC31XX_IRQ_H /**************************************************************************** * Included Files @@ -48,41 +48,41 @@ * Definitions ****************************************************************************/ -/* LPC313X Interrupts */ +/* LPC31XX Interrupts */ - /* IRQ0: Reserved */ -#define LPC313X_IRQ_IRQ0 0 /* IRQ1: Event router cascaded IRQ0 */ -#define LPC313X_IRQ_IRQ1 1 /* IRQ2: Event router cascaded IRQ1 */ -#define LPC313X_IRQ_IRQ2 2 /* IRQ3: Event router cascaded IRQ2 */ -#define LPC313X_IRQ_IRQ3 3 /* IRQ4: Event router cascaded IRQ3 */ -#define LPC313X_IRQ_TMR0 4 /* IRQ5: Timer 0 Interrupt */ -#define LPC313X_IRQ_TMR1 5 /* IRQ6: Timer 1 Interrupt */ -#define LPC313X_IRQ_TMR2 6 /* IRQ7: Timer 2 Interrupt */ -#define LPC313X_IRQ_TMR3 7 /* IRQ8: Timer 3 Interrupt */ -#define LPC313X_IRQ_ADC 8 /* IRQ9: ADC 10-bit */ -#define LPC313X_IRQ_UART 9 /* IRQ10: UART */ -#define LPC313X_IRQ_I2C0 10 /* IRQ11: I2C0 */ -#define LPC313X_IRQ_I2C1 11 /* IRQ12: I2C1 */ -#define LPC313X_IRQ_I2STX0 12 /* IRQ13: I2S0 Transmit */ -#define LPC313X_IRQ_I2STX1 13 /* IRQ14: I2S1 Transmit */ -#define LPC313X_IRQ_I2SRX0 14 /* IRQ15: I2S0 Receive */ -#define LPC313X_IRQ_I2SRX1 15 /* IRQ16: I2S1 Receive */ + /* IRQ0: Reserved */ +#define LPC31_IRQ_IRQ0 0 /* IRQ1: Event router cascaded IRQ0 */ +#define LPC31_IRQ_IRQ1 1 /* IRQ2: Event router cascaded IRQ1 */ +#define LPC31_IRQ_IRQ2 2 /* IRQ3: Event router cascaded IRQ2 */ +#define LPC31_IRQ_IRQ3 3 /* IRQ4: Event router cascaded IRQ3 */ +#define LPC31_IRQ_TMR0 4 /* IRQ5: Timer 0 Interrupt */ +#define LPC31_IRQ_TMR1 5 /* IRQ6: Timer 1 Interrupt */ +#define LPC31_IRQ_TMR2 6 /* IRQ7: Timer 2 Interrupt */ +#define LPC31_IRQ_TMR3 7 /* IRQ8: Timer 3 Interrupt */ +#define LPC31_IRQ_ADC 8 /* IRQ9: ADC 10-bit */ +#define LPC31_IRQ_UART 9 /* IRQ10: UART */ +#define LPC31_IRQ_I2C0 10 /* IRQ11: I2C0 */ +#define LPC31_IRQ_I2C1 11 /* IRQ12: I2C1 */ +#define LPC31_IRQ_I2STX0 12 /* IRQ13: I2S0 Transmit */ +#define LPC31_IRQ_I2STX1 13 /* IRQ14: I2S1 Transmit */ +#define LPC31_IRQ_I2SRX0 14 /* IRQ15: I2S0 Receive */ +#define LPC31_IRQ_I2SRX1 15 /* IRQ16: I2S1 Receive */ /* IRQ17: Reserved */ -#define LPC313X_IRQ_LCD 17 /* IRQ18: LCD Interface */ -#define LPC313X_IRQ_SPISMS 18 /* IRQ19: SPI SMS */ -#define LPC313X_IRQ_SPITX 19 /* IRQ20: SPI Transmit */ -#define LPC313X_IRQ_SPIRX 20 /* IRQ21: SPI Receive */ -#define LPC313X_IRQ_SPIOVF 21 /* IRQ22: SPI Overflow */ -#define LPC313X_IRQ_SPI 22 /* IRQ23: SPI */ -#define LPC313X_IRQ_DMA 23 /* IRQ24: DMA */ -#define LPC313X_IRQ_NAND 24 /* IRQ25: NAND FLASH Controller */ -#define LPC313X_IRQ_MCI 25 /* IRQ26: MCI */ -#define LPC313X_IRQ_USBOTG 26 /* IRQ27: USB OTG */ -#define LPC313X_IRQ_ISRAM0 27 /* IRQ28: ISRAM0 MRC Finished */ -#define LPC313X_IRQ_ISRAM1 28 /* IRQ29: ISRAM1 MRC Finished */ +#define LPC31_IRQ_LCD 17 /* IRQ18: LCD Interface */ +#define LPC31_IRQ_SPISMS 18 /* IRQ19: SPI SMS */ +#define LPC31_IRQ_SPITX 19 /* IRQ20: SPI Transmit */ +#define LPC31_IRQ_SPIRX 20 /* IRQ21: SPI Receive */ +#define LPC31_IRQ_SPIOVF 21 /* IRQ22: SPI Overflow */ +#define LPC31_IRQ_SPI 22 /* IRQ23: SPI */ +#define LPC31_IRQ_DMA 23 /* IRQ24: DMA */ +#define LPC31_IRQ_NAND 24 /* IRQ25: NAND FLASH Controller */ +#define LPC31_IRQ_MCI 25 /* IRQ26: MCI */ +#define LPC31_IRQ_USBOTG 26 /* IRQ27: USB OTG */ +#define LPC31_IRQ_ISRAM0 27 /* IRQ28: ISRAM0 MRC Finished */ +#define LPC31_IRQ_ISRAM1 28 /* IRQ29: ISRAM1 MRC Finished */ -#define LPC313X_IRQ_SYSTIMER LPC313X_IRQ_TMR0 -#define NR_IRQS (LPC313X_IRQ_ISRAM1+1) +#define LPC31_IRQ_SYSTIMER LPC31_IRQ_TMR0 +#define NR_IRQS (LPC31_IRQ_ISRAM1+1) /**************************************************************************** * Public Types @@ -114,5 +114,5 @@ extern "C" { #endif #endif -#endif /* __ARCH_ARM_INCLUDE_LPC313X_IRQ_H */ +#endif /* __ARCH_ARM_INCLUDE_LPC31XX_IRQ_H */ |