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| author | Gregory Nutt <gnutt@nuttx.org> | 2013-04-16 18:00:59 -0600 |
|---|---|---|
| committer | Gregory Nutt <gnutt@nuttx.org> | 2013-04-16 18:00:59 -0600 |
| commit | 9255670a9d9fab07e941008aa9e9edbf5b460c0b (patch) | |
| tree | f31c4ec2141db41f31b1de70af701d45b695e3a7 /nuttx/arch/arm/src/armv6-m/up_initialstate.c | |
| parent | 82b1ed85155de4cac47551adb2363cc36b8806d0 (diff) | |
| download | px4-nuttx-9255670a9d9fab07e941008aa9e9edbf5b460c0b.tar.gz px4-nuttx-9255670a9d9fab07e941008aa9e9edbf5b460c0b.tar.bz2 px4-nuttx-9255670a9d9fab07e941008aa9e9edbf5b460c0b.zip | |
Fix major misthink in Cortex-M0 port: The Cortex-M0 has no BASEPRI register. We have to revert to using the nasty PRIMASK register
Diffstat (limited to 'nuttx/arch/arm/src/armv6-m/up_initialstate.c')
| -rw-r--r-- | nuttx/arch/arm/src/armv6-m/up_initialstate.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/nuttx/arch/arm/src/armv6-m/up_initialstate.c b/nuttx/arch/arm/src/armv6-m/up_initialstate.c index 97c048ef4..62c1d2780 100644 --- a/nuttx/arch/arm/src/armv6-m/up_initialstate.c +++ b/nuttx/arch/arm/src/armv6-m/up_initialstate.c @@ -139,6 +139,6 @@ void up_initial_state(struct tcb_s *tcb) /* Enable or disable interrupts, based on user configuration */ #ifdef CONFIG_SUPPRESS_INTERRUPTS - xcp->regs[REG_BASEPRI] = NVIC_SYSH_DISABLE_PRIORITY; + xcp->regs[REG_PRIMASK] = 1; #endif /* CONFIG_SUPPRESS_INTERRUPTS */ } |