lm3s6918 update

git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1775 42af7a65-404d-4744-a932-0658087f49c3

5 files changed, 112 insertions, 12 deletions

diff --git a/nuttx/arch/arm/src/common/arm.h b/nuttx/arch/arm/src/common/arm.h
index e3e97f9ad..07b21de64 100644
--- a/nuttx/arch/arm/src/common/arm.h
+++ b/nuttx/arch/arm/src/common/arm.h
@@ -1,7 +1,7 @@
 /************************************************************************************
  * arch/arm/src/common/arm.h
  *
- *   Copyright (C) 2007, 2008 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2009 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
  *
  * Redistribution and use in source and binary forms, with or without
@@ -44,9 +44,9 @@
 # include <sys/types.h>
 #endif
 
-/**************************************************************************
- * Conditional Compilation
- **************************************************************************/
+/************************************************************************************
+ * Definitions
+ ************************************************************************************/
 
 #undef CONFIG_ALIGNMENT_TRAP
 #undef CONFIG_DCACHE_WRITETHROUGH
@@ -54,10 +54,6 @@
 #undef CONFIG_DCACHE_DISABLE
 #undef CONFIG_ICACHE_DISABLE
 
-/************************************************************************************
- * Definitions
- ************************************************************************************/
-
 /* ARM9EJS **************************************************************************/
 
 /* PSR bits */
diff --git a/nuttx/arch/arm/src/common/cortexm3_psr.h b/nuttx/arch/arm/src/common/cortexm3_psr.h
new file mode 100644
index 000000000..1ea3c85e6
--- /dev/null
+++ b/nuttx/arch/arm/src/common/cortexm3_psr.h
@@ -0,0 +1,91 @@
+/************************************************************************************
+ * arch/arm/src/common/cortexm3_psr.h
+ *
+ *   Copyright (C) 2009 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_COMMON_CORTEXM_PSR_H
+#define __ARCH_ARM_SRC_COMMON_CORTEXM_PSR_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#ifndef __ASSEMBLY__
+# include <sys/types.h>
+#endif
+
+/************************************************************************************
+ * Definitions
+ ************************************************************************************/
+
+/* Application Program Status Register (APSR) */
+
+#define CORTEXM3_APSR_Q           (1 << 27) /* Bit 27: Sticky saturation flag */
+#define CORTEXM3_APSR_V           (1 << 28) /* Bit 28: Overflow flag */
+#define CORTEXM3_APSR_C           (1 << 29) /* Bit 29: Carry/borrow flag */
+#define CORTEXM3_APSR_Z           (1 << 30) /* Bit 30: Zero flag */
+#define CORTEXM3_APSR_N           (1 << 31) /* Bit 31: Negative, less than flag */
+
+/* Interrupt Program Status Register (IPSR) */
+
+#define CORTEMX_IPSR_ISR_SHIFT    0         /* Bits 8-0: ISR number */
+#define CORTEMX_IPSR_ISR_MASK     (0x1ff << CORTEMX_IPSR_ISR_SHIFT)
+
+/* Execution PSR Register (EPSR) */
+
+#define CORTEMX_EPSR_ICIIT1_SHIFT 10        /* Bits 15-10: Interrupt-Continuable-Instruction/If-Then bits */
+#define CORTEMX_EPSR_ICIIT1_MASK  (3 << CORTEMX_EPSR_ICIIT1_SHIFT)
+#define CORTEMX_EPSR_T            (1 << 24) /* Bit 24: T-bit */
+#define CORTEMX_EPSR_ICIIT2_SHIFT 25        /* Bits 26-25: Interrupt-Continuable-Instruction/If-Then bits */
+#define CORTEMX_EPSR_ICIIT2_MASK  (3 << CORTEMX_EPSR_ICIIT2_SHIFT)
+
+/* Save xPSR bits */
+
+#define CORTEMX_IPSR_ISR_SHIFT    0         /* Bits 8-0: ISR number */
+#define CORTEMX_IPSR_ISR_MASK     (0x1ff << CORTEMX_IPSR_ISR_SHIFT)
+#define CORTEMX_EPSR_ICIIT1_SHIFT 25        /* Bits 15-10: Interrupt-Continuable-Instruction/If-Then bits */
+#define CORTEMX_EPSR_ICIIT1_MASK  (3 << CORTEMX_EPSR_ICIIT_SHIFT)
+#define CORTEMX_EPSR_T            (1 << 24) /* Bit 24: T-bit */
+#define CORTEMX_EPSR_ICIIT2_SHIFT 25        /* Bits 26-25: Interrupt-Continuable-Instruction/If-Then bits */
+#define CORTEMX_EPSR_ICIIT2_MASK  (3 << CORTEMX_EPSR_ICIIT_SHIFT)
+#define CORTEXM3_APSR_Q           (1 << 27) /* Bit 27: Sticky saturation flag */
+#define CORTEXM3_APSR_V           (1 << 28) /* Bit 28: Overflow flag */
+#define CORTEXM3_APSR_C           (1 << 29) /* Bit 29: Carry/borrow flag */
+#define CORTEXM3_APSR_Z           (1 << 30) /* Bit 30: Zero flag */
+#define CORTEXM3_APSR_N           (1 << 31) /* Bit 31: Negative, less than flag */
+
+/************************************************************************************
+ * Inline Functions
+ ************************************************************************************/
+
+#endif  /* __ARCH_ARM_SRC_COMMON_CORTEXM_PSR_H */
diff --git a/nuttx/arch/arm/src/common/up_assert.c b/nuttx/arch/arm/src/common/up_assert.c
index 294fce44c..8460c6b71 100644
--- a/nuttx/arch/arm/src/common/up_assert.c
+++ b/nuttx/arch/arm/src/common/up_assert.c
@@ -132,7 +132,12 @@ static inline void up_registerdump(void)
                  regs, ptr[0], ptr[1], ptr[2], ptr[3],
                  ptr[4], ptr[5], ptr[6], ptr[7]);
         }
+
+#ifdef __thumb2__
+      lldbg("xPSR: %08x\n", current_regs[REG_XPSR]);
+#else
       lldbg("CPSR: %08x\n", current_regs[REG_CPSR]);
+#endif
     }
 }
 #else
diff --git a/nuttx/arch/arm/src/common/up_doirq.c b/nuttx/arch/arm/src/common/up_doirq.c
index 293b9fdc4..b863ec0c5 100644
--- a/nuttx/arch/arm/src/common/up_doirq.c
+++ b/nuttx/arch/arm/src/common/up_doirq.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/common/up_doirq.c
  *
- *   Copyright (C) 2007, 2008 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2009 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
  *
  * Redistribution and use in source and binary forms, with or without
@@ -66,7 +66,7 @@
  * Public Functions
  ****************************************************************************/
 
-void up_doirq(int irq, uint32* regs)
+uint32 *up_doirq(int irq, uint32* regs)
 {
   up_ledon(LED_INIRQ);
 #ifdef CONFIG_SUPPRESS_INTERRUPTS
@@ -89,6 +89,13 @@ void up_doirq(int irq, uint32* regs)
 
        irq_dispatch(irq, regs);
 
+       /* If a context switch occurred while processing the interrupt
+        * then current_regs may have value (depending upon the implementaton
+        * of context switching for te particular chip.
+        */
+
+       regs = current_regs;
+
        /* Indicate that we are no long in an interrupt handler */
 
        current_regs = NULL;
@@ -101,4 +108,5 @@ void up_doirq(int irq, uint32* regs)
     }
   up_ledoff(LED_INIRQ);
 #endif
+  return regs;
 }
diff --git a/nuttx/arch/arm/src/common/up_internal.h b/nuttx/arch/arm/src/common/up_internal.h
index f1f5e252b..430631853 100644
--- a/nuttx/arch/arm/src/common/up_internal.h
+++ b/nuttx/arch/arm/src/common/up_internal.h
@@ -1,7 +1,7 @@
 /****************************************************************************
  * common/up_internal.h
  *
- *   Copyright (C) 2007, 2008 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2009 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
  *
  * Redistribution and use in source and binary forms, with or without
@@ -122,7 +122,7 @@ extern void up_boot(void);
 extern void up_copystate(uint32 *dest, uint32 *src);
 extern void up_dataabort(uint32 *regs);
 extern void up_decodeirq(uint32 *regs);
-extern void up_doirq(int irq, uint32 *regs);
+extern uint32 *up_doirq(int irq, uint32 *regs);
 extern void up_fullcontextrestore(uint32 *regs) __attribute__ ((noreturn));
 extern void up_irqinitialize(void);
 extern void up_prefetchabort(uint32 *regs);