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| author | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2011-08-09 15:05:58 +0000 |
|---|---|---|
| committer | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2011-08-09 15:05:58 +0000 |
| commit | 9b626c0d1d250559f51ae78ced353c4ed9cea5ea (patch) | |
| tree | ff70b7de82caf7e890809fe8b3f32ce317783ae0 /nuttx/arch/arm/src/kinetis/kinetis_memorymap.h | |
| parent | 038a423fecbfa2dc08a8aff223ae10576ec30bae (diff) | |
| download | px4-nuttx-9b626c0d1d250559f51ae78ced353c4ed9cea5ea.tar.gz px4-nuttx-9b626c0d1d250559f51ae78ced353c4ed9cea5ea.tar.bz2 px4-nuttx-9b626c0d1d250559f51ae78ced353c4ed9cea5ea.zip | |
Add Kinetis MPU and AIPS header files
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3857 42af7a65-404d-4744-a932-0658087f49c3
Diffstat (limited to 'nuttx/arch/arm/src/kinetis/kinetis_memorymap.h')
| -rw-r--r--[-rwxr-xr-x] | nuttx/arch/arm/src/kinetis/kinetis_memorymap.h | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/nuttx/arch/arm/src/kinetis/kinetis_memorymap.h b/nuttx/arch/arm/src/kinetis/kinetis_memorymap.h index bcc5e73e8..957b7b7e1 100755..100644 --- a/nuttx/arch/arm/src/kinetis/kinetis_memorymap.h +++ b/nuttx/arch/arm/src/kinetis/kinetis_memorymap.h @@ -95,7 +95,7 @@ /* Peripheral Bridge 0 Memory Map ***************************************************/ -# define KINETIS_PBRIDGE0_BASE 0x40000000 /* Peripheral bridge 0 (AIPS-Lite 0) */ +# define KINETIS_AIPS0_BASE 0x40000000 /* Peripheral bridge 0 (AIPS-Lite 0) */ # define KINETIS_XBAR_BASE 0x40004000 /* Crossbar switch */ # define KINETIS_DMAC_BASE 0x40008000 /* DMA controller */ # define KINETIS_DMADESC_BASE 0x40009000 /* DMA controller transfer control descriptors */ @@ -150,7 +150,7 @@ /* Peripheral Bridge 1 Memory Map ***************************************************/ -# define KINETIS_PBRIDGE1_BASE 0x40080000 /* Peripheral bridge 1 (AIPS-Lite 1) */ +# define KINETIS_AIPS1_BASE 0x40080000 /* Peripheral bridge 1 (AIPS-Lite 1) */ # define KINETIS_FLEXCAN1_BASE 0x400a4000 /* FlexCAN 1 */ # define KINETIS_SPI2_BASE 0x400ac000 /* SPI 2 */ # define KINETIS_SDHC_BASE 0x400b1000 /* SDHC */ @@ -226,7 +226,7 @@ /* Peripheral Bridge 0 Memory Map ***************************************************/ -# define KINETIS_PBRIDGE0_BASE 0x40000000 /* Peripheral bridge 0 (AIPS-Lite 0) */ +# define KINETIS_AIPS0_BASE 0x40000000 /* Peripheral bridge 0 (AIPS-Lite 0) */ # define KINETIS_XBAR_BASE 0x40004000 /* Crossbar switch */ # define KINETIS_DMAC_BASE 0x40008000 /* DMA controller */ # define KINETIS_DMADESC_BASE 0x40009000 /* DMA controller transfer control descriptors */ @@ -281,7 +281,7 @@ /* Peripheral Bridge 1 Memory Map ***************************************************/ -# define KINETIS_PBRIDGE1_BASE 0x40080000 /* Peripheral bridge 1 (AIPS-Lite 1) */ +# define KINETIS_AIPS1_BASE 0x40080000 /* Peripheral bridge 1 (AIPS-Lite 1) */ # define KINETIS_RNGB_BASE 0x400a0000 /* Random number generator (RNGB) */ # define KINETIS_FLEXCAN1_BASE 0x400a4000 /* FlexCAN 1 */ # define KINETIS_SPI2_BASE 0x400ac000 /* DSPI 2 */ |