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author | Gregory Nutt <gnutt@nuttx.org> | 2013-04-16 18:00:59 -0600 |
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committer | Gregory Nutt <gnutt@nuttx.org> | 2013-04-16 18:00:59 -0600 |
commit | 9255670a9d9fab07e941008aa9e9edbf5b460c0b (patch) | |
tree | f31c4ec2141db41f31b1de70af701d45b695e3a7 /nuttx/arch/arm/src/kl/chip.h | |
parent | 82b1ed85155de4cac47551adb2363cc36b8806d0 (diff) | |
download | px4-nuttx-9255670a9d9fab07e941008aa9e9edbf5b460c0b.tar.gz px4-nuttx-9255670a9d9fab07e941008aa9e9edbf5b460c0b.tar.bz2 px4-nuttx-9255670a9d9fab07e941008aa9e9edbf5b460c0b.zip |
Fix major misthink in Cortex-M0 port: The Cortex-M0 has no BASEPRI register. We have to revert to using the nasty PRIMASK register
Diffstat (limited to 'nuttx/arch/arm/src/kl/chip.h')
-rw-r--r-- | nuttx/arch/arm/src/kl/chip.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/nuttx/arch/arm/src/kl/chip.h b/nuttx/arch/arm/src/kl/chip.h index 2f24e1501..0f4df66c9 100644 --- a/nuttx/arch/arm/src/kl/chip.h +++ b/nuttx/arch/arm/src/kl/chip.h @@ -46,7 +46,7 @@ #include <arch/kl/chip.h> -/* Define the number of interrupt vectors that needed to be support for this chip */ +/* Define the number of interrupt vectors that need to be supported for this chip */ #define ARMV6M_PERIPHERAL_INTERRUPTS 32 |