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| author | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2013-03-05 00:31:43 +0000 |
|---|---|---|
| committer | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2013-03-05 00:31:43 +0000 |
| commit | d1b5dcf2deac5613a03a84156176d9f2d4d16cca (patch) | |
| tree | 565d28df20e121e19ceb535d45eaffba101be995 /nuttx/arch/arm/src/lm/chip/lm_gpio.h | |
| parent | 0c0a42b4f872dd43cd782f9066f0aeb11dc0df1b (diff) | |
| download | px4-nuttx-d1b5dcf2deac5613a03a84156176d9f2d4d16cca.tar.gz px4-nuttx-d1b5dcf2deac5613a03a84156176d9f2d4d16cca.tar.bz2 px4-nuttx-d1b5dcf2deac5613a03a84156176d9f2d4d16cca.zip | |
Add LM4F120 pin configuration header file
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5705 42af7a65-404d-4744-a932-0658087f49c3
Diffstat (limited to 'nuttx/arch/arm/src/lm/chip/lm_gpio.h')
| -rw-r--r-- | nuttx/arch/arm/src/lm/chip/lm_gpio.h | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/nuttx/arch/arm/src/lm/chip/lm_gpio.h b/nuttx/arch/arm/src/lm/chip/lm_gpio.h index ebb5aa94f..3fdf5086f 100644 --- a/nuttx/arch/arm/src/lm/chip/lm_gpio.h +++ b/nuttx/arch/arm/src/lm/chip/lm_gpio.h @@ -481,6 +481,30 @@ #endif /* LM_NPORTS */ +/* GPIO Register Bitfield Definitions ***********************************************/ + +#ifdef LM4F +# define GPIO_PCTL_PMC_SHIFT(n) ((n) << 2) +# define GPIO_PCTL_PMC_MASK(n) (15 << GPIO_PCTL_PMC_SHIFT(n)) + +# define GPIO_PCTL_PMC0_SHIFT (0) /* Bits 0-3: Port Mux Control 0 */ +# define GPIO_PCTL_PMC0_MASK (15 << GPIO_PCTL_PMC0_SHIFT) +# define GPIO_PCTL_PMC1_SHIFT (4) /* Bits 4-7: Port Mux Control 0 */ +# define GPIO_PCTL_PMC1_MASK (15 << GPIO_PCTL_PMC1_SHIFT) +# define GPIO_PCTL_PMC2_SHIFT (8) /* Bits 8-11: Port Mux Control 0 */ +# define GPIO_PCTL_PMC2_MASK (15 << GPIO_PCTL_PMC2_SHIFT) +# define GPIO_PCTL_PMC3_SHIFT (12) /* Bits 12-15: Port Mux Control 0 */ +# define GPIO_PCTL_PMC3_MASK (15 << GPIO_PCTL_PMC3_SHIFT) +# define GPIO_PCTL_PMC4_SHIFT (16) /* Bits 16-19: Port Mux Control 0 */ +# define GPIO_PCTL_PMC4_MASK (15 << GPIO_PCTL_PMC4_SHIFT) +# define GPIO_PCTL_PMC5_SHIFT (20) /* Bits 20-23: Port Mux Control 0 */ +# define GPIO_PCTL_PMC5_MASK (15 << GPIO_PCTL_PMC5_SHIFT) +# define GPIO_PCTL_PMC6_SHIFT (24) /* Bits 24-27: Port Mux Control 0 */ +# define GPIO_PCTL_PMC6_MASK (15 << GPIO_PCTL_PMC6_SHIFT) +# define GPIO_PCTL_PMC7_SHIFT (28) /* Bits 28-31: Port Mux Control 0 */ +# define GPIO_PCTL_PMC7_MASK (15 << GPIO_PCTL_PMC7_SHIFT) +#endif + /************************************************************************************ * Public Types ************************************************************************************/ |