Add interrupt control logic

git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@2733 42af7a65-404d-4744-a932-0658087f49c3

1 files changed, 10 insertions, 0 deletions

diff --git a/nuttx/arch/arm/src/lpc17xx/chip.h b/nuttx/arch/arm/src/lpc17xx/chip.h
index 0a921c4cf..90e3c422f 100755
--- a/nuttx/arch/arm/src/lpc17xx/chip.h
+++ b/nuttx/arch/arm/src/lpc17xx/chip.h
@@ -168,6 +168,16 @@
 
 #include "lpc17_memorymap.h"
 
+/* NVIC priority levels *************************************************************/
+/* Each priority field holds a priority value, 0-31. The lower the value, the greater
+ * the priority of the corresponding interrupt. The processor implements only
+ * bits[7:3] of each field, bits[2:0] read as zero and ignore writes.
+ */
+
+#define NVIC_SYSH_PRIORITY_MIN     0xf8 /* All bits[7:3] set is minimum priority */
+#define NVIC_SYSH_PRIORITY_DEFAULT 0x80 /* Midpoint is the default */
+#define NVIC_SYSH_PRIORITY_MAX     0x00 /* Zero is maximum priority */
+
 /************************************************************************************
  * Public Types
  ************************************************************************************/