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authorpatacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3>2013-03-31 18:13:19 +0000
committerpatacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3>2013-03-31 18:13:19 +0000
commited2c0a934f03d6e35b03846502bda98f94681886 (patch)
tree1b8a46633f2a5046313d88c405ced24d4ecc35d3 /nuttx/arch/arm/src/lpc17xx/chip/lpc17_gpdma.h
parentaf1390c3974d0ea6aa1cacb07d90a9f8f422db65 (diff)
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Several fixes for open1788 SDCARD DMA
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5803 42af7a65-404d-4744-a932-0658087f49c3
Diffstat (limited to 'nuttx/arch/arm/src/lpc17xx/chip/lpc17_gpdma.h')
-rw-r--r--nuttx/arch/arm/src/lpc17xx/chip/lpc17_gpdma.h17
1 files changed, 13 insertions, 4 deletions
diff --git a/nuttx/arch/arm/src/lpc17xx/chip/lpc17_gpdma.h b/nuttx/arch/arm/src/lpc17xx/chip/lpc17_gpdma.h
index dc80b8e05..a915559b9 100644
--- a/nuttx/arch/arm/src/lpc17xx/chip/lpc17_gpdma.h
+++ b/nuttx/arch/arm/src/lpc17xx/chip/lpc17_gpdma.h
@@ -562,10 +562,19 @@
# define DMACH_CONFIG_DSTPER_MAT3p1 (DMA_REQ_MAT3p1 << DMACH_CONFIG_DSTPER_SHIFT)
#define DMACH_CONFIG_XFRTYPE_SHIFT (11) /* Bits 11-13: Type of transfer */
#define DMACH_CONFIG_XFRTYPE_MASK (7 << DMACH_CONFIG_XFRTYPE_SHIFT)
-# define DMACH_CONFIG_XFRTYPE_M2M (0 << DMACH_CONFIG_XFRTYPE_SHIFT) /* Memory to memory DMA */
-# define DMACH_CONFIG_XFRTYPE_M2P (1 << DMACH_CONFIG_XFRTYPE_SHIFT) /* Memory to peripheral DMA */
-# define DMACH_CONFIG_XFRTYPE_P2M (2 << DMACH_CONFIG_XFRTYPE_SHIFT) /* Peripheral to memory DMA */
-# define DMACH_CONFIG_XFRTYPE_P2P (3 << DMACH_CONFIG_XFRTYPE_SHIFT) /* Peripheral to peripheral DMA */
+ /* Flow controller = DMA controller */
+# define DMACH_CONFIG_XFRTYPE_M2M (0 << DMACH_CONFIG_XFRTYPE_SHIFT) /* Memory to memory */
+# define DMACH_CONFIG_XFRTYPE_M2P (1 << DMACH_CONFIG_XFRTYPE_SHIFT) /* Memory to peripheral */
+# define DMACH_CONFIG_XFRTYPE_P2M (2 << DMACH_CONFIG_XFRTYPE_SHIFT) /* Peripheral to memory */
+# define DMACH_CONFIG_XFRTYPE_P2P (3 << DMACH_CONFIG_XFRTYPE_SHIFT) /* Peripheral to peripheral */
+#ifdef LPC178x
+ /* Flow controller = Dest peripheral */
+# define DMACH_CONFIG_XFRTYPE_M2M_DC (4 << DMACH_CONFIG_XFRTYPE_SHIFT) /* Memory to memory */
+# define DMACH_CONFIG_XFRTYPE_M2P_DC (5 << DMACH_CONFIG_XFRTYPE_SHIFT) /* Memory to peripheral */
+ /* Flow controller = Source peripheral */
+# define DMACH_CONFIG_XFRTYPE_P2M_SC (6 << DMACH_CONFIG_XFRTYPE_SHIFT) /* Peripheral to memory */
+# define DMACH_CONFIG_XFRTYPE_P2P_SC (7 << DMACH_CONFIG_XFRTYPE_SHIFT) /* Peripheral to peripheral */
+#endif
#define DMACH_CONFIG_IE (1 << 14) /* Bit 14: Interrupt error mask */
#define DMACH_CONFIG_ITC (1 << 15) /* Bit 15: Terminal count interrupt mask */
#define DMACH_CONFIG_L (1 << 16) /* Bit 16: Lock */