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| author | Gregory Nutt <gnutt@nuttx.org> | 2013-04-08 18:35:51 -0600 |
|---|---|---|
| committer | Gregory Nutt <gnutt@nuttx.org> | 2013-04-08 18:35:51 -0600 |
| commit | 06f824b36d8f1accc00cd66cb06697a9fe25b0b2 (patch) | |
| tree | 393a0552778a3fe9af7ba0ee0d82021edb75f133 /nuttx/arch/arm/src/lpc17xx/chip/lpc17_lcd.h | |
| parent | 35c1e939e6378761a187a4aff65e7e6e4e51bc90 (diff) | |
| download | px4-nuttx-06f824b36d8f1accc00cd66cb06697a9fe25b0b2.tar.gz px4-nuttx-06f824b36d8f1accc00cd66cb06697a9fe25b0b2.tar.bz2 px4-nuttx-06f824b36d8f1accc00cd66cb06697a9fe25b0b2.zip | |
LPC1788 framebuffer LCD now works! From Rommel Marcelo
Diffstat (limited to 'nuttx/arch/arm/src/lpc17xx/chip/lpc17_lcd.h')
| -rw-r--r-- | nuttx/arch/arm/src/lpc17xx/chip/lpc17_lcd.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/nuttx/arch/arm/src/lpc17xx/chip/lpc17_lcd.h b/nuttx/arch/arm/src/lpc17xx/chip/lpc17_lcd.h index 7ac1d3a61..d7b919cb6 100644 --- a/nuttx/arch/arm/src/lpc17xx/chip/lpc17_lcd.h +++ b/nuttx/arch/arm/src/lpc17xx/chip/lpc17_lcd.h @@ -206,6 +206,8 @@ #define LCD_INTMSK_VCOMPIM (1 << 3) /* Bit 3: Vertical compare interrupt enable */ #define LCD_INTMSK_BERIM (1 << 4) /* Bit 4: AHB Master error interrupt enable */ /* Bits 5-31: Reserved */ +#define LCD_INTMSK_ALL (0x1e) + /* LCD_INTRAW - Raw Interrupt Status Register */ /* Bits 0: Reserved */ #define LCD_INTRAW_FUFRIS (1 << 1) /* Bit 1: FIFO Undeflow raw interrupt status */ @@ -213,6 +215,8 @@ #define LCD_INTRAW_VCOMPRIS (1 << 3) /* Bit 3: Vertical compare interrupt status */ #define LCD_INTRAW_BERRAW (1 << 4) /* Bit 4: AHB Master bus error interrupt status */ /* Bits 5-31: Reserved */ +#define LCD_INTRAW_ALL (0x1e) + /* LCD_INTSTAT - Masked Interrupt Status Register */ /* Bits 0: Reserved */ #define LCD_INTSTAT_FUFMIS (1 << 1) /* Bit 1: FIFO Undeflow raw interrupt status */ @@ -220,6 +224,8 @@ #define LCD_INTSTAT_VCOMPMIS (1 << 3) /* Bit 3: Vertical compare interrupt status */ #define LCD_INTSTAT_BERMIS (1 << 4) /* Bit 4: AHB Master bus error interrupt status */ /* Bits 15-31: Reserved */ +#define LCD_INTSTAT_ALL (0x1e) + /* LCD_INTCLR - Interrupt Clear Register */ /* Bits 0: Reserved */ #define LCD_INTCLR_FUFIC (1 << 1) /* Bit 1: FIFO Undeflow raw interrupt clear */ @@ -227,6 +233,8 @@ #define LCD_INTCLR_VCOMPIC (1 << 3) /* Bit 3: Vertical compare interrupt clear */ #define LCD_INTCLR_BERIC (1 << 4) /* Bit 4: AHB Master bus error interrupt clear */ /* Bits 15-31: Reserved */ +#define LCD_INTCLR_ALL (0x1e) + /* Upper and Lower Panel Address register has no bitfields */ /* * Upper Panel Current Address register (LCDUPCURR) |