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| author | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2010-11-12 04:21:23 +0000 |
|---|---|---|
| committer | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2010-11-12 04:21:23 +0000 |
| commit | a5e4206d13b4b8b21551fe8dc21adb2439813519 (patch) | |
| tree | 45156eb517b27738db059556bcc1021bf29b3248 /nuttx/arch/arm/src/lpc17xx/lpc17_ethernet.h | |
| parent | 16a217cd260c1274fbe26c1c59f6aac5d00daf18 (diff) | |
| download | px4-nuttx-a5e4206d13b4b8b21551fe8dc21adb2439813519.tar.gz px4-nuttx-a5e4206d13b4b8b21551fe8dc21adb2439813519.tar.bz2 px4-nuttx-a5e4206d13b4b8b21551fe8dc21adb2439813519.zip | |
Add PHY init logic
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3100 42af7a65-404d-4744-a932-0658087f49c3
Diffstat (limited to 'nuttx/arch/arm/src/lpc17xx/lpc17_ethernet.h')
| -rwxr-xr-x | nuttx/arch/arm/src/lpc17xx/lpc17_ethernet.h | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/nuttx/arch/arm/src/lpc17xx/lpc17_ethernet.h b/nuttx/arch/arm/src/lpc17xx/lpc17_ethernet.h index 81b517f54..58533c227 100755 --- a/nuttx/arch/arm/src/lpc17xx/lpc17_ethernet.h +++ b/nuttx/arch/arm/src/lpc17xx/lpc17_ethernet.h @@ -185,7 +185,7 @@ #define ETH_MAC2_FD (1 << 0) /* Bit 0: Full duplex */
#define ETH_MAC2_FLC (1 << 1) /* Bit 1: Frame length checking */
-#define ETH_MAC2_HFE (1 << 2) /* Bit 2: Huge fram enable */
+#define ETH_MAC2_HFE (1 << 2) /* Bit 2: Huge frame enable */
#define ETH_MAC2_DCRC (1 << 3) /* Bit 3: Delayed CRC */
#define ETH_MAC2_CRCEN (1 << 4) /* Bit 4: CRC enable */
#define ETH_MAC2_PADCRCEN (1 << 5) /* Bit 5: Pad/CRC enable */
@@ -238,7 +238,7 @@ #define ETH_MCFG_SCANINC (1 << 0) /* Bit 0: Scan increment */
#define ETH_MCFG_SUPPRE (1 << 1) /* Bit 1: Suppress preamble */
-#define ETH_MCFG_CLKSEL_SHIFT (2) /* Bits 2-5:Clock select */
+#define ETH_MCFG_CLKSEL_SHIFT (2) /* Bits 2-5: Clock select */
#define ETH_MCFG_CLKSEL_MASK (15 << ETH_MCFG_CLKSEL_SHIFT)
# define ETH_MCFG_CLKSEL_DIV4 (0 << ETH_MCFG_CLKSEL_SHIFT)
# define ETH_MCFG_CLKSEL_DIV6 (2 << ETH_MCFG_CLKSEL_SHIFT)
@@ -316,7 +316,7 @@ #define ETH_CMD_RXEN (1 << 0) /* Bit 0: Receive enable */
#define ETH_CMD_TXEN (1 << 1) /* Bit 1: Transmit enable */
- /* Bit 2: Reserved */
+ /* Bit 2: Reserved */
#define ETH_CMD_REGRST (1 << 3) /* Bit 3: Reset host registers */
#define ETH_CMD_TXRST (1 << 4) /* Bit 4: Reset transmit datapath */
#define ETH_CMD_RXRST (1 << 5) /* Bit 5: Reset receive datapath */
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