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authorpatacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3>2013-01-18 20:25:32 +0000
committerpatacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3>2013-01-18 20:25:32 +0000
commit773fedfda3778f9dd224f035a46bd378435e82e4 (patch)
tree71da4b24ed3db7272a46d8e89d2c9fab29894f0c /nuttx/arch/arm/src/lpc17xx/lpc17_gpio.h
parent8606eb53ff4105795a9feb7c42a677b8b26042ef (diff)
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More LPC1788 register definitions from Rommel Marcelo
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5535 42af7a65-404d-4744-a932-0658087f49c3
Diffstat (limited to 'nuttx/arch/arm/src/lpc17xx/lpc17_gpio.h')
-rw-r--r--nuttx/arch/arm/src/lpc17xx/lpc17_gpio.h233
1 files changed, 233 insertions, 0 deletions
diff --git a/nuttx/arch/arm/src/lpc17xx/lpc17_gpio.h b/nuttx/arch/arm/src/lpc17xx/lpc17_gpio.h
index dad14bc9e..f3a003255 100644
--- a/nuttx/arch/arm/src/lpc17xx/lpc17_gpio.h
+++ b/nuttx/arch/arm/src/lpc17xx/lpc17_gpio.h
@@ -46,6 +46,8 @@
# include <stdint.h>
#endif
+#include <arch/lpc17xx/chip.h>
+
#include "chip/lpc17_gpio.h"
#include "chip/lpc17_pinconn.h"
#include "chip/lpc17_pinconfig.h"
@@ -55,6 +57,8 @@
************************************************************************************/
/* Bit-encoded input to lpc17_configgpio() ******************************************/
+#if defined(LPC176x)
+
/* Encoding: FFFx MMOV PPPN NNNN
*
* Pin Function: FFF
@@ -165,10 +169,153 @@
#define GPIO_PIN30 (30 << GPIO_PIN_SHIFT)
#define GPIO_PIN31 (31 << GPIO_PIN_SHIFT)
+#elif defined(LPC178x)
+
+/* Encoding: TT FFFF MMOV PPPN NNNN
+ Encoding: TTTT TTTT FFFF MMOV PPPN NNNN
+ */
+/* Encoding: FFFF MMOV PPPN NNNN
+ *
+ * Pin Function: FFFF
+ * Pin Mode bits: MM
+ * Open drain: O (output pins)
+ * Initial value: V (output pins)
+ * Port number: PPP (0-4)
+ * Pin number: NNNNN (0-31)
+ */
+
+/* Pin Function bits: FFFF
+ * Only meaningful when the GPIO function is GPIO_PIN
+ */
+
+#define GPIO_FUNC_SHIFT (12) /* Bits 12-15: GPIO mode */
+#define GPIO_FUNC_MASK (15 << GPIO_FUNC_SHIFT)
+# define GPIO_INPUT (0 << GPIO_FUNC_SHIFT) /* 0000 GPIO input pin */
+# define GPIO_INTFE (1 << GPIO_FUNC_SHIFT) /* 0001 GPIO interrupt falling edge */
+# define GPIO_INTRE (2 << GPIO_FUNC_SHIFT) /* 0010 GPIO interrupt rising edge */
+# define GPIO_INTBOTH (3 << GPIO_FUNC_SHIFT) /* 0011 GPIO interrupt both edges */
+# define GPIO_OUTPUT (4 << GPIO_FUNC_SHIFT) /* 0100 GPIO outpout pin */
+# define GPIO_ALT1 (5 << GPIO_FUNC_SHIFT) /* 0101 Alternate function 1 */
+# define GPIO_ALT2 (6 << GPIO_FUNC_SHIFT) /* 0110 Alternate function 2 */
+# define GPIO_ALT3 (7 << GPIO_FUNC_SHIFT) /* 0111 Alternate function 3 */
+
+# define GPIO_ALT4 (8 << GPIO_FUNC_SHIFT) /* 1000 Alternate function 4 */
+# define GPIO_ALT5 (9 << GPIO_FUNC_SHIFT) /* 1001 Alternate function 5 */
+# define GPIO_ALT6 (10 << GPIO_FUNC_SHIFT) /* 1010 Alternate function 6 */
+# define GPIO_ALT7 (11 << GPIO_FUNC_SHIFT) /* 1011 Alternate function 7 */
+
+/* Options for each IOCON Types */
+//~ #define GPIO_TYPE_SHIFT (16)
+//~ #define GPIO_TYPE_MASK (3 << GPIO_TYPE_SHIFT)
+//~ # define GPIO_HYSTERIS (<< 0 << )
+//~ # define GPIO_INVERTED (<< 1 << )
+//~ # define GPIO_SLEW (<< 2 << )
+//~ # define GPIO_ADMODE (<< 3 << )
+//~ # define GPIO_FILTER (<< 4 << )
+//~ # define GPIO_DACEN (<< 5 << )
+//~ # define GPIO_I2CHS (<< 6 << )
+//~ # define GPIO_HIDRIVE (<< 7 << )
+
+#define GPIO_EDGE_SHIFT (13) /* Bits 13-14: Interrupt edge bits */
+#define GPIO_EDGE_MASK (3 << GPIO_EDGE_SHIFT)
+
+#define GPIO_INOUT_MASK GPIO_OUTPUT
+#define GPIO_FE_MASK GPIO_INTFE
+#define GPIO_RE_MASK GPIO_INTRE
+
+#define GPIO_ISGPIO(ps) ((uint16_t(ps) & GPIO_FUNC_MASK) <= GPIO_OUTPUT)
+#define GPIO_ISALT(ps) ((uint16_t(ps) & GPIO_FUNC_MASK) > GPIO_OUTPUT)
+#define GPIO_ISINPUT(ps) (((ps) & GPIO_FUNC_MASK) == GPIO_INPUT)
+#define GPIO_ISOUTPUT(ps) (((ps) & GPIO_FUNC_MASK) == GPIO_OUTPUT)
+#define GPIO_ISINORINT(ps) (((ps) & GPIO_INOUT_MASK) == 0)
+#define GPIO_ISOUTORALT(ps) (((ps) & GPIO_INOUT_MASK) != 0)
+#define GPIO_ISINTERRUPT(ps) (GPIO_ISOUTPUT(ps) && !GPIO_ISINPUT(ps))
+#define GPIO_ISFE(ps) (((ps) & GPIO_FE_MASK) != 0)
+#define GPIO_ISRE(ps) (((ps) & GPIO_RE_MASK) != 0)
+
+/* Pin Mode: MM */
+
+#define GPIO_PUMODE_SHIFT (10) /* Bits 10-11: Pin pull-up mode */
+#define GPIO_PUMODE_MASK (3 << GPIO_PUMODE_SHIFT)
+# define GPIO_PULLUP (0 << GPIO_PUMODE_SHIFT) /* Pull-up resistor enabled */
+# define GPIO_REPEATER (1 << GPIO_PUMODE_SHIFT) /* Repeater mode enabled */
+# define GPIO_FLOAT (2 << GPIO_PUMODE_SHIFT) /* Neither pull-up nor -down */
+# define GPIO_PULLDN (3 << GPIO_PUMODE_SHIFT) /* Pull-down resistor enabled */
+
+/* Open drain: O */
+
+#define GPIO_OPEN_DRAIN (1 << 9) /* Bit 9: Open drain mode */
+
+/* Initial value: V */
+
+#define GPIO_VALUE (1 << 8) /* Bit 8: Initial GPIO output value */
+#define GPIO_VALUE_ONE GPIO_VALUE
+#define GPIO_VALUE_ZERO (0)
+
+/* Port number: PPP (0-5) */
+
+#define GPIO_PORT_SHIFT (5) /* Bit 5-7: Port number */
+#define GPIO_PORT_MASK (7 << GPIO_PORT_SHIFT)
+# define GPIO_PORT0 (0 << GPIO_PORT_SHIFT)
+# define GPIO_PORT1 (1 << GPIO_PORT_SHIFT)
+# define GPIO_PORT2 (2 << GPIO_PORT_SHIFT)
+# define GPIO_PORT3 (3 << GPIO_PORT_SHIFT)
+# define GPIO_PORT4 (4 << GPIO_PORT_SHIFT)
+# define GPIO_PORT5 (5 << GPIO_PORT_SHIFT)
+
+#define GPIO_NPORTS 6
+
+/* Pin number: NNNNN (0-31) */
+
+#define GPIO_PIN_SHIFT 0 /* Bits 0-4: GPIO number: 0-31 */
+#define GPIO_PIN_MASK (31 << GPIO_PIN_SHIFT)
+#define GPIO_PIN0 (0 << GPIO_PIN_SHIFT)
+#define GPIO_PIN1 (1 << GPIO_PIN_SHIFT)
+#define GPIO_PIN2 (2 << GPIO_PIN_SHIFT)
+#define GPIO_PIN3 (3 << GPIO_PIN_SHIFT)
+#define GPIO_PIN4 (4 << GPIO_PIN_SHIFT)
+#define GPIO_PIN5 (5 << GPIO_PIN_SHIFT)
+#define GPIO_PIN6 (6 << GPIO_PIN_SHIFT)
+#define GPIO_PIN7 (7 << GPIO_PIN_SHIFT)
+#define GPIO_PIN8 (8 << GPIO_PIN_SHIFT)
+#define GPIO_PIN9 (9 << GPIO_PIN_SHIFT)
+#define GPIO_PIN10 (10 << GPIO_PIN_SHIFT)
+#define GPIO_PIN11 (11 << GPIO_PIN_SHIFT)
+#define GPIO_PIN12 (12 << GPIO_PIN_SHIFT)
+#define GPIO_PIN13 (13 << GPIO_PIN_SHIFT)
+#define GPIO_PIN14 (14 << GPIO_PIN_SHIFT)
+#define GPIO_PIN15 (15 << GPIO_PIN_SHIFT)
+#define GPIO_PIN16 (16 << GPIO_PIN_SHIFT)
+#define GPIO_PIN17 (17 << GPIO_PIN_SHIFT)
+#define GPIO_PIN18 (18 << GPIO_PIN_SHIFT)
+#define GPIO_PIN19 (19 << GPIO_PIN_SHIFT)
+#define GPIO_PIN20 (20 << GPIO_PIN_SHIFT)
+#define GPIO_PIN21 (21 << GPIO_PIN_SHIFT)
+#define GPIO_PIN22 (22 << GPIO_PIN_SHIFT)
+#define GPIO_PIN23 (23 << GPIO_PIN_SHIFT)
+#define GPIO_PIN24 (24 << GPIO_PIN_SHIFT)
+#define GPIO_PIN25 (25 << GPIO_PIN_SHIFT)
+#define GPIO_PIN26 (26 << GPIO_PIN_SHIFT)
+#define GPIO_PIN27 (27 << GPIO_PIN_SHIFT)
+#define GPIO_PIN28 (28 << GPIO_PIN_SHIFT)
+#define GPIO_PIN29 (29 << GPIO_PIN_SHIFT)
+#define GPIO_PIN30 (30 << GPIO_PIN_SHIFT)
+#define GPIO_PIN31 (31 << GPIO_PIN_SHIFT)
+
+#else
+# error "Unrecognized LPC17xx family"
+#endif
+
/************************************************************************************
* Public Types
************************************************************************************/
+#ifdef LPC176x
+typedef uint16_t lpc17_pinset_t;
+#else
+typedef uint32_t lpc17_pinset_t;
+#endif
+
/************************************************************************************
* Public Data
************************************************************************************/
@@ -204,6 +351,92 @@ EXTERN const uint32_t g_odmode[GPIO_NPORTS];
* Public Functions
****************************************************************************/
+/************************************************************************************
+ * Name: lpc17_gpioirqinitialize
+ *
+ * Description:
+ * Initialize logic to support a second level of interrupt decoding for GPIO pins.
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_GPIO_IRQ
+void lpc17_gpioirqinitialize(void);
+#else
+# define lpc17_gpioirqinitialize()
+#endif
+
+/************************************************************************************
+ * Name: lpc17_configgpio
+ *
+ * Description:
+ * Configure a GPIO pin based on bit-encoded description of the pin.
+ *
+ ************************************************************************************/
+
+int lpc17_configgpio(lpc17_pinset_t cfgset);
+
+/************************************************************************************
+ * Name: lpc17_gpiowrite
+ *
+ * Description:
+ * Write one or zero to the selected GPIO pin
+ *
+ ************************************************************************************/
+
+void lpc17_gpiowrite(lpc17_pinset_t pinset, bool value);
+
+/************************************************************************************
+ * Name: lpc17_gpioread
+ *
+ * Description:
+ * Read one or zero from the selected GPIO pin
+ *
+ ************************************************************************************/
+
+bool lpc17_gpioread(lpc17_pinset_t pinset);
+
+/************************************************************************************
+ * Name: lpc17_gpioirqenable
+ *
+ * Description:
+ * Enable the interrupt for specified GPIO IRQ
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_GPIO_IRQ
+void lpc17_gpioirqenable(int irq);
+#else
+# define lpc17_gpioirqenable(irq)
+#endif
+
+/************************************************************************************
+ * Name: lpc17_gpioirqdisable
+ *
+ * Description:
+ * Disable the interrupt for specified GPIO IRQ
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_GPIO_IRQ
+void lpc17_gpioirqdisable(int irq);
+#else
+# define lpc17_gpioirqdisable(irq)
+#endif
+
+/************************************************************************************
+ * Function: lpc17_dumpgpio
+ *
+ * Description:
+ * Dump all GPIO registers associated with the base address of the provided pinset.
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_DEBUG_GPIO
+int lpc17_dumpgpio(lpc17_pinset_t pinset, const char *msg);
+#else
+# define lpc17_dumpgpio(p,m)
+#endif
+
#ifdef __cplusplus
}
#endif