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| author | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2010-06-16 15:15:30 +0000 |
|---|---|---|
| committer | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2010-06-16 15:15:30 +0000 |
| commit | 25ffc19dc6757e32685151818c4b25c73f179a70 (patch) | |
| tree | d58a1e10021b86e62947ee561ead396e46e5d97d /nuttx/arch/arm/src/lpc17xx/lpc17_gpiodbg.c | |
| parent | f9586294555a0555476179b66c9df4c29e06dd48 (diff) | |
| download | px4-nuttx-25ffc19dc6757e32685151818c4b25c73f179a70.tar.gz px4-nuttx-25ffc19dc6757e32685151818c4b25c73f179a70.tar.bz2 px4-nuttx-25ffc19dc6757e32685151818c4b25c73f179a70.zip | |
update
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@2751 42af7a65-404d-4744-a932-0658087f49c3
Diffstat (limited to 'nuttx/arch/arm/src/lpc17xx/lpc17_gpiodbg.c')
| -rwxr-xr-x | nuttx/arch/arm/src/lpc17xx/lpc17_gpiodbg.c | 18 |
1 files changed, 8 insertions, 10 deletions
diff --git a/nuttx/arch/arm/src/lpc17xx/lpc17_gpiodbg.c b/nuttx/arch/arm/src/lpc17xx/lpc17_gpiodbg.c index 5ff6ab9dc..aa2e855f5 100755 --- a/nuttx/arch/arm/src/lpc17xx/lpc17_gpiodbg.c +++ b/nuttx/arch/arm/src/lpc17xx/lpc17_gpiodbg.c @@ -49,7 +49,7 @@ #include "lpc17_gpio.h" #include "lpc17_internal.h" -#ifdef CONFIG_DEBUG +#ifdef CONFIG_DEBUG_GPIO /**************************************************************************** * Pre-processor Definitions @@ -134,22 +134,22 @@ int lpc17_dumpgpio(uint16_t pinset, const char *msg) port = (pinset & GPIO_PORT_MASK) >> GPIO_PORT_SHIFT; pin = (pinset & GPIO_PIN_MASK) >> GPIO_PIN_SHIFT; - pinsel = lpc17_pinsel(port); - pinmode = lpc17_pinmode(port); + pinsel = lpc17_pinsel(port, pin); + pinmode = lpc17_pinmode(port, pin); /* The following requires exclusive access to the GPIO registers */ flags = irqsave(); - lldbg("GPIO%c pinset: %08x base: %08x -- %s\n", - port + '0', pinset, fiobase, msg); + lldbg("GPIO%c pinset: %08x -- %s\n", + port + '0', pinset, msg); - lldbg(" PINSEL[%08x]: %08x PINMODE[%08x]: %08x ODMODE[%08x]: %08x\n" + lldbg(" PINSEL[%08x]: %08x PINMODE[%08x]: %08x ODMODE[%08x]: %08x\n", pinsel, pinsel ? getreg32(pinsel) : 0, pinmode, pinmode ? getreg32(pinmode) : 0, g_odmode[port], getreg32(g_odmode[port])); base = g_fiobase[port]; - lldbg(" FIODIR[%08x]: %08x FIOMASK[%08x]: %08x FIOPIN[%08x]: %08x\n" + lldbg(" FIODIR[%08x]: %08x FIOMASK[%08x]: %08x FIOPIN[%08x]: %08x\n", base+LPC17_FIO_DIR_OFFSET, getreg32(base+LPC17_FIO_DIR_OFFSET), base+LPC17_FIO_MASK_OFFSET, getreg32(base+LPC17_FIO_MASK_OFFSET), base+LPC17_FIO_PIN_OFFSET, getreg32(base+LPC17_FIO_PIN_OFFSET)); @@ -165,7 +165,5 @@ int lpc17_dumpgpio(uint16_t pinset, const char *msg) irqrestore(flags); return OK; } -#endif /* CONFIG_DEBUG */ - - +#endif /* CONFIG_DEBUG_GPIO */ |