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author | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2011-04-06 01:51:07 +0000 |
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committer | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2011-04-06 01:51:07 +0000 |
commit | 767a6400de3f6e709a6a453ea3c90422a316a598 (patch) | |
tree | 174d0d75436a2dbf8b0e2381a7173c7bad7f9336 /nuttx/arch/arm/src/lpc17xx/lpc17_irq.c | |
parent | 808d6faee2744a707579aec30bc34f60229acfc9 (diff) | |
download | px4-nuttx-767a6400de3f6e709a6a453ea3c90422a316a598.tar.gz px4-nuttx-767a6400de3f6e709a6a453ea3c90422a316a598.tar.bz2 px4-nuttx-767a6400de3f6e709a6a453ea3c90422a316a598.zip |
Attach mem mgmt fault handle if MPU is enabled
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3471 42af7a65-404d-4744-a932-0658087f49c3
Diffstat (limited to 'nuttx/arch/arm/src/lpc17xx/lpc17_irq.c')
-rwxr-xr-x | nuttx/arch/arm/src/lpc17xx/lpc17_irq.c | 27 |
1 files changed, 15 insertions, 12 deletions
diff --git a/nuttx/arch/arm/src/lpc17xx/lpc17_irq.c b/nuttx/arch/arm/src/lpc17xx/lpc17_irq.c index 5190c8e66..967de45d7 100755 --- a/nuttx/arch/arm/src/lpc17xx/lpc17_irq.c +++ b/nuttx/arch/arm/src/lpc17xx/lpc17_irq.c @@ -127,7 +127,7 @@ static void lpc17_dumpnvic(const char *msg, int irq) #endif /**************************************************************************** - * Name: lpc17_nmi, lpc17_mpu, lpc17_busfault, lpc17_usagefault, lpc17_pendsv, + * Name: lpc17_nmi, lpc17_busfault, lpc17_usagefault, lpc17_pendsv, * lpc17_dbgmonitor, lpc17_pendsv, lpc17_reserved * * Description: @@ -146,14 +146,6 @@ static int lpc17_nmi(int irq, FAR void *context) return 0; } -static int lpc17_mpu(int irq, FAR void *context) -{ - (void)irqsave(); - dbg("PANIC!!! MPU interrupt received\n"); - PANIC(OSERR_UNEXPECTEDISR); - return 0; -} - static int lpc17_busfault(int irq, FAR void *context) { (void)irqsave(); @@ -233,7 +225,7 @@ static int lpc17_irqinfo(int irq, uint32_t *regaddr, uint32_t *bit) else { *regaddr = NVIC_SYSHCON; - if (irq == LPC17_IRQ_MPU) + if (irq == LPC17_IRQ_MEMFAULT) { *bit = NVIC_SYSHCON_MEMFAULTENA; } @@ -312,11 +304,22 @@ void up_irqinitialize(void) /* up_prioritize_irq(LPC17_IRQ_PENDSV, NVIC_SYSH_PRIORITY_MIN); */ #endif + /* If the MPU is enabled, then attach and enable the Memory Management + * Fault handler. + */ + +#ifdef CONFIG_CORTEXM3_MPU + irq_attach(LPC17_IRQ_MEMFAULT, up_memfault); + up_enable_irq(LPC17_IRQ_MEMFAULT); +#endif + /* Attach all other processor exceptions (except reset and sys tick) */ #ifdef CONFIG_DEBUG irq_attach(LPC17_IRQ_NMI, lpc17_nmi); - irq_attach(LPC17_IRQ_MPU, lpc17_mpu); +#ifndef CONFIG_CORTEXM3_MPU + irq_attach(LPC17_IRQ_MEMFAULT, up_memfault); +#endif irq_attach(LPC17_IRQ_BUSFAULT, lpc17_busfault); irq_attach(LPC17_IRQ_USAGEFAULT, lpc17_usagefault); irq_attach(LPC17_IRQ_PENDSV, lpc17_pendsv); @@ -449,7 +452,7 @@ int up_prioritize_irq(int irq, int priority) uint32_t regval; int shift; - DEBUGASSERT(irq >= LPC17_IRQ_MPU && irq < LPC17_IRQ_NIRQS && (unsigned)priority <= NVIC_SYSH_PRIORITY_MIN); + DEBUGASSERT(irq >= LPC17_IRQ_MEMFAULT && irq < LPC17_IRQ_NIRQS && (unsigned)priority <= NVIC_SYSH_PRIORITY_MIN); if (irq < LPC17_IRQ_EXTINT) { |