Minor usb-related

git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3150 42af7a65-404d-4744-a932-0658087f49c3

1 files changed, 12 insertions, 22 deletions

diff --git a/nuttx/arch/arm/src/lpc17xx/lpc17_usbdev.c b/nuttx/arch/arm/src/lpc17xx/lpc17_usbdev.c
index 60137809a..b9bf2420c 100755
--- a/nuttx/arch/arm/src/lpc17xx/lpc17_usbdev.c
+++ b/nuttx/arch/arm/src/lpc17xx/lpc17_usbdev.c
@@ -106,7 +106,7 @@
 
 /* CLKCTRL enable bits */
 
-#define LPC17_CLKCTRL_ENABLES (USBDEV_CLK_DEVCLK|USBDEV_CLK_PORTSELCLK|USBDEV_CLK_AHBCLK)
+#define LPC17_CLKCTRL_ENABLES (USBDEV_CLK_DEVCLK|USBDEV_CLK_AHBCLK)
 
 /* Dump GPIO registers */
 
@@ -3153,9 +3153,19 @@ void up_usbinitialize(void)
 
   /* Step 2: Enable clocking on USB (USB PLL clocking was initialized in
    * in very low-level clock setup logic (see lpc17_clockconfig.c)).  We
-   * do still need to set up USBCLKCTRL -- see below.
+   * do still need to set up USBCLKCTRL to enable device and AHB clocking.
    */
 
+  lpc17_putreg(LPC17_CLKCTRL_ENABLES, LPC17_USBDEV_CLKCTRL);
+
+  /* Then wait for the clocks to be reported as "ON" */
+
+  do
+    {
+      regval = lpc17_getreg(LPC17_USBDEV_CLKST);
+    }
+  while ((regval & LPC17_CLKCTRL_ENABLES) != LPC17_CLKCTRL_ENABLES);
+
   /* Step 3: Configure I/O pins */
 
   usbdev_dumpgpio();
@@ -3228,26 +3238,6 @@ void up_usbinitialize(void)
         }
     }
 
-  /* Turn on USB power */
-
-  flags = irqsave();
-  regval = lpc17_getreg(LPC17_SYSCON_PCONP);
-  regval |= SYSCON_PCONP_PCUSB;
-  lpc17_putreg(regval, LPC17_SYSCON_PCONP);
-  irqrestore(flags);
-
-  /* Enable device and AHB clocking  */
-
-  lpc17_putreg(LPC17_CLKCTRL_ENABLES, LPC17_USBDEV_CLKCTRL);
-
-  /* And wait for the clocks to be reported as "ON" */
-
-  do
-    {
-      regval = lpc17_getreg(LPC17_USBDEV_CLKST);
-    }
-  while ((regval & LPC17_CLKCTRL_ENABLES) != LPC17_CLKCTRL_ENABLES);
-
   /* Make sure all USB interrupts are disabled and cleared */
 
   lpc17_putreg(0, LPC17_USBDEV_INTEN);