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| author | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2013-04-01 13:43:31 +0000 |
|---|---|---|
| committer | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2013-04-01 13:43:31 +0000 |
| commit | e3fe81779352589122b14c80287122aef30a2e14 (patch) | |
| tree | b023368884367ed0be578090c93bff4047a6cc78 /nuttx/arch/arm/src/lpc17xx | |
| parent | 8e9c9c4fd33836b5504ede9cacdb111d6877ef1b (diff) | |
| download | px4-nuttx-e3fe81779352589122b14c80287122aef30a2e14.tar.gz px4-nuttx-e3fe81779352589122b14c80287122aef30a2e14.tar.bz2 px4-nuttx-e3fe81779352589122b14c80287122aef30a2e14.zip | |
Add support for STM32 F427/437 chips. From Mike Smith
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5807 42af7a65-404d-4744-a932-0658087f49c3
Diffstat (limited to 'nuttx/arch/arm/src/lpc17xx')
| -rw-r--r-- | nuttx/arch/arm/src/lpc17xx/chip/lpc17_lcd.h | 2 | ||||
| -rw-r--r-- | nuttx/arch/arm/src/lpc17xx/lpc17_lcd.c | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/nuttx/arch/arm/src/lpc17xx/chip/lpc17_lcd.h b/nuttx/arch/arm/src/lpc17xx/chip/lpc17_lcd.h index 8b0e65134..7ac1d3a61 100644 --- a/nuttx/arch/arm/src/lpc17xx/chip/lpc17_lcd.h +++ b/nuttx/arch/arm/src/lpc17xx/chip/lpc17_lcd.h @@ -142,7 +142,7 @@ #define LCD_POL_PCDLO_SHIFT (0) /* Bits 0-4: Lower 5 bits of panel clock divisor */ #define LCD_POL_PCDLO_MASK (0x1f << LCD_POL_PCDLO_SHIFT) -#define LCD_POL_CLKSEL (1 << 5) /* Bit 5: Clock select- 0=CCLK, 1=LCD_CLKIN */ +#define LCD_POL_CLKSEL (1 << 5) /* Bit 5: Clock select- 0=PCLK, 1=LCD_CLKIN */ #define LCD_POL_ACB_SHIFT (6) /* Bits 6-10: AC bias pin frequency */ #define LCD_POL_ACB_MASK (0x1f << LCD_POL_ACB_SHIFT) #define LCD_POL_IVS (1 << 11) /* Bit 11: Invert vertical sync */ diff --git a/nuttx/arch/arm/src/lpc17xx/lpc17_lcd.c b/nuttx/arch/arm/src/lpc17xx/lpc17_lcd.c index 75901a2dd..cf326ea5f 100644 --- a/nuttx/arch/arm/src/lpc17xx/lpc17_lcd.c +++ b/nuttx/arch/arm/src/lpc17xx/lpc17_lcd.c @@ -626,7 +626,7 @@ int up_fbinitialize(void) regval |= LCD_POL_BCD; putreg32(regval, LPC17_LCD_POL); - /* Select the CCLK for the LCD block clock source */ + /* Select the PCLK for the LCD block clock source */ regval &= ~LCD_POL_CLKSEL; putreg32(regval, LPC17_LCD_POL); |